Patents by Inventor Lin Tsai

Lin Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11956261
    Abstract: A detection method for a malicious domain name in a domain name system (DNS) and a detection device are provided. The method includes: obtaining network connection data of an electronic device; capturing log data related to at least one domain name from the network connection data; analyzing the log data to generate at least one numerical feature related to the at least one domain name; inputting the at least one numerical feature into a multi-type prediction model, which includes a first data model and a second data model; and predicting whether a malicious domain name related to a malware or a phishing website exists in the at least one domain name by the multi-type prediction model according to the at least one numerical feature.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: April 9, 2024
    Assignee: Acer Cyber Security Incorporated
    Inventors: Chiung-Ying Huang, Yi-Chung Tseng, Ming-Kung Sun, Tung-Lin Tsai
  • Patent number: 11942543
    Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Chou Lin, Yi-Cheng Chiu, Karthick Murukesan, Yi-Min Chen, Shiuan-Jeng Lin, Wen-Chih Chiang, Chen-Chien Chang, Chih-Yuan Chan, Kuo-Ming Wu, Chun-Lin Tsai
  • Patent number: 11938509
    Abstract: A glue dispensing device comprises a base, a pressure control unit, a quantitative glue supply unit and a glue dispensing needle. The base comprises a pressure control chamber and a glue tube body, the pressure control chamber is located inside the base, the glue tube body extends from one end of the base to the other end, and the glue tube body penetrates the pressure control chamber. The pressure control unit is coupled to the pressure control chamber. The quantitative glue supply unit is disposed at one end of the base body and is coupled to the glue tube body. The glue dispensing needle is disposed at the other end of the base and is coupled to the glue tube body. The glue dispensing device uses the pressure change of the pressure control chamber to deform the glue tube body, thereby achieving quantitative glue dispensing effect with accuracy and stability. In addition, a glue dispensing method is also disclosed.
    Type: Grant
    Filed: May 20, 2022
    Date of Patent: March 26, 2024
    Assignee: Kulicke and Soffa Hi-Tech Co Ltd.
    Inventors: Lu-Min Chen, Tsung-Lin Tsai
  • Patent number: 11938508
    Abstract: A glue dispenser dispensing switch includes a switching device main body, a needle holding base, a wear-resistant plate, and a rotating device. The switching device main body is equipped with a double liquid inlet, the needle holding base is equipped with a mixed glue outlet, the wear-resistant plate is installed between the switching device main body and the needle holding base, and the wear-resistant plate is equipped with a wear-resistant plate opening. The rotating device is utilized to rotate the needle holding base or the wear-resistant plate. A mixed double-liquid glue passes through the double liquid inlet, the wear-resistant plate opening and the glue outlet to dispense a mixed glue while the double liquid inlet, the wear-resistant plate opening and the glue outlet are overlapped. In addition, a double liquid dispensing equipment is also disclosed herein.
    Type: Grant
    Filed: August 8, 2021
    Date of Patent: March 26, 2024
    Assignee: Kulicke and Soffa Hi-Tech Co., Ltd.
    Inventors: Lu-Min Chen, Mu-Huang Liu, Tsung-Lin Tsai
  • Patent number: 11942467
    Abstract: A semiconductor structure includes a first metal-dielectric-metal layer, a first dielectric layer, a first conductive layer, a second conductive layer, and a second dielectric layer. The first metal-dielectric-metal layer includes a plurality of first fingers, a plurality of second fingers, and a first dielectric material. The first fingers are electrically connected to a first voltage. The second fingers are electrically connected to a second voltage different from the first voltage, and the first fingers and the second fingers are arranged in parallel and staggeredly. The first dielectric material is between the first fingers and the second fingers. The first dielectric layer is over the first metal-dielectric-metal layer. The first conductive layer is over the first dielectric layer. The second conductive layer is over the first conductive layer. The second dielectric layer is between the first conductive layer and the second conductive layer.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: I-Sheng Chen, Yi-Jing Li, Chia-Ming Hsu, Wan-Lin Tsai, Clement Hsingjen Wann
  • Patent number: 11935769
    Abstract: The present disclosure provides a chemical supply system, including a chamber, a tubing extending into the chamber, an interlock apparatus, including a fixture for fastening the tubing, and means for determining whether the tubing is fastened by the fixture.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: March 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Fang-Pin Chiang, Tsung-Lin Tsai, Chaoyen Huang, Yi Chuan Chen
  • Publication number: 20240087962
    Abstract: A semiconductor structure and method for manufacturing thereof are provided. The semiconductor structure includes a silicon substrate having a first surface, a III-V layer on the first surface of the silicon substrate and over a first active region, and an isolation region in a portion of the III-V layer extended beyond the first active region. The first active region is in proximal to the first surface. The method includes the following operations. A silicon substrate having a first device region and a second device region is provided, a first active region is defined in the first device region, a III-V layer is formed on the silicon substrate, an isolation region is defined across a material interface in the III-V layer by an implantation operation, and an interconnect penetrating through the isolation region is formed.
    Type: Application
    Filed: November 24, 2023
    Publication date: March 14, 2024
    Inventors: MAN-HO KWAN, FU-WEI YAO, RU-YI SU, CHUN LIN TSAI, ALEXANDER KALNITSKY
  • Publication number: 20240071790
    Abstract: A multi-function device includes a machine base, a plurality of horizontal bars, at least one gantry, a plurality of processing units and at least one first conveying uni. The horizontal bars are disposed at the top of the machine base. The gantry is disposed on the machine base and disposed over the horizontal bars. The processing unit is disposed on the horizontal bars and the gantry. The first conveying unit is disposed on the machine base. Each processing unit is a processing device capable of being replaced according to actual requirements, such as a soldering flux device, a soldering device, a sucking device, a glue dipping device, a glue dispensing device, a detecting device, a cleaning device or other processing devices. The present invention can integrate different types of manufacturing devices into one device, and the quantities of the horizontal bars and the modules thereof are not limited.
    Type: Application
    Filed: September 26, 2022
    Publication date: February 29, 2024
    Inventors: Lu-Min Chen, Tsung-Lin Tsai
  • Publication number: 20240064673
    Abstract: A wireless modem and an operation method thereof are provided. The operation method of the wireless modem includes the following steps. A communication signal is buffered in a storage unit when the communication signal is received. The communication signal is a paging early indicator (PEI) signal, a paging signal or a radio resource management (RRM) signal. A synchronization procedure is performed, when a reference signal is received. The communication signal is fetched from the storage unit, when the synchronization procedure is finished. A compensation procedure is performed on the communication signal. The communication signal which is compensated is demodulated.
    Type: Application
    Filed: August 16, 2023
    Publication date: February 22, 2024
    Inventors: Nien-En WU, Yu-Hsin LIU, Shang-Lin TSAI, Lai-En FAN, Ming-Ying TU, Chen-Wei HSU
  • Patent number: 11908905
    Abstract: Various embodiments of the present disclosure are directed towards a method for forming a semiconductor structure, the method includes forming a buffer layer over a substrate. An active layer is formed on the buffer layer. A top electrode is formed on the active layer. An etch process is performed on the buffer layer and the substrate to define a plurality of pillar structures. The plurality of pillar structures include a first pillar structure laterally offset from a second pillar structure. At least portions of the first and second pillar structures are spaced laterally between sidewalls of the top electrode.
    Type: Grant
    Filed: July 18, 2022
    Date of Patent: February 20, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yao-Chung Chang, Chun Lin Tsai, Ru-Yi Su, Wei Wang, Wei-Chen Yang
  • Publication number: 20240050088
    Abstract: A surgical device has a housing having a hook portion at a distal end of the housing, an opening radially penetrating between the hook portion and the housing; a grasping structure comprising a rotating member rotatably positioned within the hook portion, having a notch radially recessed on a periphery of the rotating member, at least a portion of the notch corresponding to at least a portion of the opening; and reciprocating motion of an actuator along the axis for rotating the rotating member such that the open end of the notch is selectively connected to or misaligned with the open end of the opening.
    Type: Application
    Filed: June 28, 2023
    Publication date: February 15, 2024
    Inventors: Yi Hsi Huang, I-Lin Tsai, Kuei-Hua Chen
  • Publication number: 20240050064
    Abstract: An ultrasonic surgical holder has an assembly portion connected to at least one operating portion having an end extending toward an axial direction. An operating space is formed between the assembly portion and the operating portion. The assembly portion is designed for detachable assembling with an ultrasonic probe. The operating portion features a detachable structure that includes a surgical device to aid the operator in positioning, marking, and determining the location of the surgical operation on the body part's surface during the subsequent operation.
    Type: Application
    Filed: June 28, 2023
    Publication date: February 15, 2024
    Inventors: Yi Hsi Huang, I-Lin Tsai, Kuei-Hua Chen
  • Patent number: 11900150
    Abstract: A system and method for storing data associated with a system management interrupt (SMI) in a computer system. Notification of a system management interrupt is received on a central processing unit. The central processing unit enters a system management mode. A system management handler of a basic input output system (BIOS) is executed by a bootstrap processor of the central processing unit. The system management interrupt is initiated via the bootstrap processor. The system management interrupt data is stored in a register of the bootstrap processor. The SMI data is converted to an accessible format. The converted SMI data is stored in a memory.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: February 13, 2024
    Assignee: QUANTA COMPUTER INC.
    Inventors: Chih-Hsiang Hsu, Wei-Wei Li, Shang-Lin Tsai, Lueh-Chih Fang
  • Publication number: 20240047427
    Abstract: A semiconductor package structure includes a substrate, a redistribution layer, a first semiconductor component, a conductive pillar, and a second semiconductor component. The redistribution layer is over the substrate. The first semiconductor component is over the redistribution layer. The conductive pillar is adjacent to the first semiconductor component, wherein the first semiconductor component and the conductive pillar are surrounded by a molding material. The second semiconductor component is over the molding material, wherein the second semiconductor component is electrically coupled to the redistribution layer through the conductive pillar.
    Type: Application
    Filed: October 18, 2023
    Publication date: February 8, 2024
    Applicant: MediaTek Inc.
    Inventors: Yi-Lin Tsai, Wen-Sung Hsu, I-Hsuan Peng, Yi-Jou Lin
  • Publication number: 20240038685
    Abstract: An electronic package is provided and includes an electronic structure and a plurality of conductive pillars embedded in a cladding layer, a circuit structure formed on the cladding layer, and a reinforcing member bonded to a side surface of the cladding layer, where a plurality of electronic elements are disposed on and electrically connected to the circuit structure, such that the electronic structure electrically bridges any two of the electronic elements via the circuit structure, so as to enhance the structural strength of the electronic package and avoid warpage by means of the design of the reinforcing member.
    Type: Application
    Filed: September 22, 2022
    Publication date: February 1, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chao-Chiang Pu, Chi-Ching Ho, Yi-Min Fu, Yu-Po Wang, Fang-Lin Tsai
  • Publication number: 20240038614
    Abstract: A semiconductor package structure includes a substrate, a dummy conductive mesh structure, an interposer, an underfill material, and a semiconductor die. The substrate includes a wiring structure in dielectric layers. The dummy conductive mesh structure is embedded in the substrate and is spaced apart from the wiring structure by the dielectric layers. The interposer is disposed over the substrate. The underfill material extends between the substrate and the interposer and over the dummy conductive mesh structure. The semiconductor die is disposed over the interposer and is electrically coupled to the wiring structure through the interposer.
    Type: Application
    Filed: June 27, 2023
    Publication date: February 1, 2024
    Inventors: Yi-Lin TSAI, Nai-Wei LIU, Wen-Sung HSU
  • Publication number: 20240040933
    Abstract: The present invention discloses a metal-free perovskite film and metal-free perovskite piezoelectric nanogenerators comprising the film. The metal-free perovskite film is organic, lead-free and metal-free. The open-circuit voltage of the metal-free perovskite piezoelectric nanogenerators can reach 9˜16 V and the short-circuit current of the metal-free perovskite piezoelectric nanogenerators can reach 38˜55 nA. Also, the metal-free perovskite piezoelectric nanogenerators can be used as self-powered strain sensor of human-machine interface application and be adopted in in vitro electrical stimulation devices.
    Type: Application
    Filed: November 29, 2022
    Publication date: February 1, 2024
    Applicants: NATIONAL CENTRAL UNIVERSITY, NATIONAL TAIWAN UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Po-Kang YANG, Meng-Lin TSAI, Han-Song WU, Shih-Min WEI, Shih-Min HUANG
  • Publication number: 20240031438
    Abstract: The present invention provides a chip including a plurality of application circuits and a UART interface. The plurality of application circuits, configured to generate a plurality of data, respectively, wherein the plurality of data respectively generated by the plurality of application circuits are transmitted to another chip via the same UART interface.
    Type: Application
    Filed: July 13, 2023
    Publication date: January 25, 2024
    Applicant: MEDIATEK INC.
    Inventors: Chia-Hung Hsu, Cheng-Hao Yao, Jyun-Ji Wang, Yu-Lin Tsai
  • Patent number: 11881142
    Abstract: An image brightness adjusting method, comprising: (a) computing or predicting a first input frame rate according to at least one first input image; (b) generating a first brightness according to a first brightness curve and the first input frame rate, wherein the first brightness curve corresponds to a first frame rate; (c) generating a second brightness according to a second brightness curve and the first input frame rate, wherein the second brightness curve corresponds to a second frame rate; (d) generating a first brightness compensating curve according to the first input frame rate and a brightness difference between the first brightness and the second brightness; and (e) setting a first compensating brightness of at least one second input image according to the first brightness compensating curve.
    Type: Grant
    Filed: June 6, 2023
    Date of Patent: January 23, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventors: Yi-Chu Li, Chun-Hsing Hsieh, Yi-Lin Tsai
  • Publication number: 20240014260
    Abstract: High voltage semiconductor devices are described herein. An exemplary semiconductor device includes a substrate, a first doped region disposed in the substrate and doped with a first doping polarity, and a second doped region disposed in the substrate and horizontally outside the first doped region. The second doped region is doped with a second doping polarity opposite to the first doping polarity. The semiconductor device further includes a third doped region disposed completely within the first doped region. The third doped region is doped with the second doping polarity. The semiconductor device further includes a first isolation structure disposed over the first doped region and spaced apart from the second doped region and the third doped region, a second isolation structure disposed over the first doped region and the third doped region, and a resistor disposed over the first isolation structure.
    Type: Application
    Filed: June 12, 2023
    Publication date: January 11, 2024
    Inventors: Ru-Yi Su, Fu-Chih Yang, Chun Lin Tsai, Chih-Chang Cheng, Ruey-Hsin Liu