Abstract: A method of building upstream-and-downstream configuration of sensors includes determining two sets of geographic position data of a target sensor and a candidate sensor, obtaining pollution-associated periods according to pieces of flow field data, the sets of geographic position data and pieces of target sensing data of the target sensor to determine a pollution-associated period, calculating a correlation between target sensing data obtained by the target sensor during the pollution-associated period and candidate sensing data obtained by the candidate sensor during the associated air pollution period to obtain sensor correlations, and determining the target sensor and the candidate sensor having a upstream-and-downstream relationship with the candidate sensor being used as a satellite sensor of the target sensor when a quantity ratio of sensor correlations being larger than or equal to a correlation threshold is larger than or equal to a default ratio.

Abstract: A high-efficiency visible-light catalytic material, a preparation method and an application thereof are provided by the present application, relating to the technical field of photocatalytic materials. The present application prepares photocatalytic material Ag@AgCl/CA by compounding Ag@AgCl and calcium alginate gel, and the prepared photocatalytic material is shaped as small particles. The photocatalytic material Ag@AgCl/CA is used to degrade tetracycline antibiotics.

Abstract: A magnetoresistive random access memory (MRAM) structure is provided in the present invention, including multiple MRAM cells, and an atomic layer deposition dielectric layer between and at outer sides of the MRAM cells, wherein the material of top electrode layer is titanium nitride, and the nitrogen percentage is greater than titanium percentage and further greater than oxygen percentage in the titanium nitride, and the nitrogen percentage gradually increases inward from the top surface of top electrode layer to a depth and then start to gradually decrease to a first level and then remains constant, and the titanium percentage gradually decreases inward from the top surface of top electrode layer to the depth and then start to gradually increase to a second level and then remains constant.

Abstract: A method for fabricating semiconductor device includes the steps of first forming a bottom electrode on a substrate, forming a magnetic tunneling junction (MTJ) on the bottom electrode, and then forming a cap layer on the MTJ. Preferably, the formation of the cap layer could be accomplished by the following steps: (a) forming a first metal layer on the MTJ; (b) forming a second metal layer on the first metal layer; and (c) performing an oxidation process.

Abstract: This disclosure is directed to a pharmaceutical composition comprising sodium bicarbonate and a polymer-drug nanoaggregate having a polymer and a taxane. The polymer is water soluble and comprises at least one first terminal group modified with a hydrophobic moiety and a second terminal group modified with a hydrophilic moiety and can be a modified symmetrically or asymmetrically branched polymers. The taxane can include paclitaxel, docetaxel, cabazitaxel, larotaxel, milataxel, ortataxel, tesetaxel, derivatives therefrom or a combination thereof, which are water insoluble or poorly water soluble. Such polymer-drug nanoaggregates can improve drug solubility, stability, in vivo availability and efficacy, and reduce side effects such as renal toxicity. This invention is also directed to a process for producing the pharmaceutical composition comprising the polymer-drug nanoaggregate.

Abstract: A method for fabricating semiconductor device includes the steps of first forming a spin orbit torque (SOT) layer on a substrate, forming a magnetic tunneling junction (MTJ) stack on the SOT layer, performing a first etching process to remove part of the MTJ stack, and then performing a second etching process to remove part of the MTJ stack for forming a MTJ.

Abstract: A semiconductor device includes a bottom electrode on a substrate, a magnetic tunneling junction (MTJ) on the bottom electrode, a first cap layer on the MTJ, a second cap layer on the first cap layer, a block layer on the second cap layer, and a top electrode on the block layer. Preferably, the block layer could be made of Co-based alloy or metal nitride, in which the Co-based alloy could further include CoW alloy whereas the metal nitride could include WN.

Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.

Abstract: A method of forming a semiconductor memory device is disclosed. A top electrode layer is formed on the MTJ stack layer. A patterned buffer layer is formed to cover only the logic circuit region. A hard mask layer is formed on the top electrode layer and the patterned buffer layer. A patterned resist layer is formed on the hard mask layer. A first etching process is performed to etch the hard mask layer and the top electrode layer not covered by the patterned resist layer in the memory region and the hard mask layer, the patterned buffer layer and the top electrode layer in the logic circuit region, thereby forming a top electrode on the MTJ stack layer in the memory region and a remaining top electrode layer covering only the logic circuit region on the MTJ stack layer.

Abstract: Semiconductor structures and methods for forming the same are provided. The method includes forming a dummy gate structure over a substrate and forming a sealing layer surrounding the dummy gate structure. The method includes forming a spacer covering the sealing layer and removing the dummy gate structure to form a trench. The method further includes forming an interfacial layer and a gate dielectric layer. The method further includes forming a capping layer over the gate dielectric layer and partially oxidizing the capping layer to form a capping oxide layer. The method further includes forming a work function metal layer over the capping oxide layer and forming a gate electrode layer over the work function metal layer. In addition, a bottom surface of the capping oxide layer is higher than a bottom surface of the spacer.

Abstract: A method, apparatus, and electronic device for processing a video, a medium and a product are presented. An implementation of the method includes: acquiring a target video; selecting, from at least one preset model, a preset model as a target model; determining output data of the target model based on the target video and the target model; reselecting, in response to determining that the output data does not meet a condition corresponding to the target model, another preset model as the target model from the at least one preset model until the output data of the target model meets the condition corresponding to the target model; and determining, based on the output data, a dynamic cover from the target video.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes an interconnect structure disposed over a substrate, a first conductive feature disposed in the interconnect structure, a dielectric layer disposed on the interconnect structure, and a second conductive feature having a top portion and a bottom portion. The top portion is disposed over the dielectric layer, and the bottom portion is disposed through the dielectric layer. The structure further includes an adhesion layer disposed over the dielectric layer and the second conductive feature. The adhesion layer includes a first portion disposed on a top of the second conductive feature and a second portion disposed over the dielectric layer, the first portion has a thickness, and the second portion has a width substantially greater than the thickness.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the of the MTJ, a second spacer on another side of the MTJ, a first metal interconnection on the MTJ, and a liner adjacent to the first spacer, the second spacer, and the first metal interconnection. Preferably, each of a top surface of the MTJ and a bottom surface of the first metal interconnection includes a planar surface and two sidewalls of the first metal interconnection are aligned with two sidewalls of the MTJ.

Abstract: A method for fabricating semiconductor device includes first forming a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, performing an atomic layer deposition (ALD) process or a high-density plasma (HDP) process to form a passivation layer on the first MTJ and the second MTJ, performing an etching process to remove the passivation layer adjacent to the first MTJ and the second MTJ, and then forming an ultra low-k (ULK) dielectric layer on the passivation layer.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a cap layer adjacent to and directly contacting the MTJ, a first inter-metal dielectric (IMD) layer around the MTJ, a top electrode on the MTJ, a metal interconnection under the MTJ, and a second IMD layer around the metal interconnection. Preferably, the cap layer is a single layer structure made of dielectric material and an edge of the cap layer contacts the first IMD layer directly.

Abstract: A spheroidal graphite cast iron meeting N(5-)?250, N(5-20)/N(5-)?0.6, and N(30-)/N(5-)?0.2, wherein N(5-) represents the number (/mm2) of graphite particles having equivalent-circle diameters of 5 ?m or more, N(5-20) represents the number (/mm2) of graphite particles having equivalent-circle diameters of 5 ?m or more and less than 20 ?m, and N(30-) represents the number (/mm2) of graphite particles having equivalent-circle diameters of 30 ?m or more, among graphite particles observed in an arbitrary cross section of at least 1 mm2.

Abstract: A method of forming a memory device including forming a bottom electrode via (BEVA) in a dielectric layer, forming a magnetic tunnel junction (MTJ) multilayer structure over the BEVA, forming a top electrode on the MTJ multilayer structure, patterning the MTJ multilayer structure using the top electrode as an etch mask to form a MTJ stack, forming a first interlayer dielectric (ILD) layer over the MTJ stack, and after forming the first ILD layer, forming a ferromagnetic metal that exerts a magnetic field on the MTJ stack.

Abstract: Some implementations described herein provide a shutter disc for use during a conditioning process within a processing chamber of a deposition tool. The shutter disc described herein includes a material having a wave-shaped section to reduce heat transfer to the shutter disc and to provide relief from thermal stresses. Furthermore, the shutter disc includes a deposition of a thin-film material on a backside of the shutter disc, where a diameter of the shutter disc causes a spacing between an inner edge of the thin-film material and an outer edge of a substrate support component. The spacing prevents an accumulation of material between the thin film material and the substrate support component, reduces tilting of the shutter disc due to a placement error, and reduces heat transfer to the shutter disc.

Abstract: The present invention discloses a hydrological model considering the uncertainty of a runoff production structure and a method for quantifying influence on a surface-subsurface hydrological process. The present invention quantifies the uncertainty of runoff production structures including a surface runoff structure, an interflow structure and a base flow structure by using parameters, and constructs a hydrological model considering the uncertainty of a runoff production structure by combining an added confluence module. Compared with an original hydrological model, the hydrological model has higher precision, which is capable to quantify the uncertainty of surface runoff, interflow and base flow of the runoff production structure and its impact on the surface-subsurface hydrological process, better improve precision of runoff simulation, and enhance understanding and cognition of the basic rule of a hydrological physical process.