Abstract: A semiconductor structure is provided in the present invention, including a substrate having a device region and an alignment mark region defined thereon, a dielectric layer disposed on the substrate, a conductive via formed in the dielectric layer on the device region, a first trench formed in the dielectric layer on the alignment mark, a plurality of second trenches formed in the dielectric layer directly under the first trench and exposed from a bottom surface of the first trench, and a memory stacked structure disposed on the dielectric layer, directly covering a top surface of the conductive via and filling into the first trench and the second trench.

Abstract: The present application provides single-domain antibodies targeting BCMA, and chimeric antigen receptors (such as monovalent CAR, and multivalent CAR including bi-epitope CAR) comprising one or more anti-BCMA single-domain antibodies. Further provided are engineered immune effector cells (such as T cells) comprising the chimeric antigen receptors. Pharmaceutical compositions, kits and methods of treating cancer are also provided.

Abstract: An exemplary embodiment of the present invention provides an optical communication system. The optical communication system can comprise a self-powered sensor and an optical array. The self-powered sensor can be configured to receive a mechanical input and generate an electrical signal corresponding to the mechanical input. The optical array can be configured to receive the electrical signal and generate an optical output. The optical output can correspond to the mechanical input.

Abstract: A leveling sensor, a load port including a leveling sensor, and a method of leveling a load port using a load port are disclosed. In an embodiment, a sensor includes an accelerometer configured to detect leveling and vibration of a load port and produce a plurality of data; a plurality of indicator lights configured to display a level measurement and a level direction based on the leveling of the load port; a processor configured to process the data produced by the accelerometer; and a wired connection configured to connect the processor to an external device.

Abstract: A method for producing ?? T cells modified by a chimeric antigen receptor, comprising: transfecting K562 cells with shFPPS targeted to FPP synthase by means of a lentiviral vector, such that the expression of FPPS in the K562 cells is lowered and a K562-shFPPS cell line with reduced FPPS expression is constructed; adding the K562-shFPPS cell line into a ?? T cell culture system for co-culturing with the ?? T cells, wherein it is found that the K562-shFPPS cell line can facilitate in vitro differentiation and proliferation of the ?? T cells; and adding a CAR-expressing lentiviral vector to the ?? T cell culture system comprising the cell line for co-culturing, wherein it is found that the K562-shFPPS cell line can further effectively improve the transfection rate of CAR genes. The provided solution effectively overcomes the technical challenge of the large-scale production of CAR-?? T cells, and has a good application prospect.

Abstract: Relating to an opioid receptor agonist (1S,4S)-4-ethoxy-N-(2-((R)-9-(pyridin-2-yl)-6-oxaspiro[4.5]deca-9-yl)ethyl)-1,2,3,4-tetrahydronaphthalen-1-amine fumarate salt, a fumarate salt crystal form I thereof, and a preparation method and an application therefor.

Abstract: A magnetoresistive random access memory (MRAM), including multiple cell array regions, multiple MRAM cells disposed in the cell array region, a silicon nitride liner conformally covering on the MRAM cells, an atomic layer deposition dielectric layer covering on the silicon nitride liner in the cell array region, wherein the surface of atomic layer deposition dielectric layer is a curved surface concave downward to the silicon nitride liner at the boundary of MRAM cells, and an ultra low-k dielectric layer covering on the atomic layer deposition dielectric layer.

Abstract: A backplane connector includes a shielded design that has wafers with signal terminals supported as edge-coupled terminal pairs for differential signaling. A ground shield is mounted on each wafer and provides a U-channel that partially shields each terminal pair. The wafers omit a ground terminal between adjacent terminal pairs. An insert can be provided to help connect the ground shield to a U-shield to provide U-shaped shielding structure substantially the entire way from a tail to a contact.

Abstract: An automatic dishwashing composition is provided including a builder selected from the group consisting of carbonate, bicarbonate, citrate, silicate and mixtures thereof; a nonionic surfactant; and a dispersant polymer comprising: (a) 5 to 75 wt % of structural units of itaconic acid; (b) 10 to 85 wt % of structural units having formula I wherein each R3 is independently selected from a hydrogen and a —C(O)CH3 group; and (c) 10 to 65 wt % of structural units of (meth)acrylic acid; wherein the dispersant polymer has a lactone end group and wherein the dispersant polymer has a weight average molecular weight of 1,500 to 6,000.

Abstract: A semiconductor device includes a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, a passivation layer on the first MTJ and the second MTJ, and an ultra low-k (ULK) dielectric layer on the passivation layer. Preferably, a top surface of the passivation layer between the first MTJ and the second MTJ is lower than a top surface of the passivation layer directly on top of the first MTJ.

Abstract: Adaptive multiplexing and transmit/receive diversity. A wireless device may include multiple antennas. A first set of antennas may be used for communication. One or more trigger conditions may be determined, and additional antennas may be activated for measurement. Based on the measurement(s), a second set of antennas may be selected and used for communication.

Abstract: A memory layout structure, which is provided with multiple source lines between active areas, each source line has multiple branches electrically connecting with the active areas at opposite sides in alternating arrangement. Multiple word lines traverse through the active areas to form transistors. Multiple storage units are disposed between the word lines on the active areas in staggered array arrangement, and multiple bit lines electrically connect with all storage units on a corresponding active area, wherein each storage cell includes one of the storage unit, two of the transistors respectively at both sides of the storage unit, and two branches of the source line.

Abstract: A variable-diameter reinforcing cage for an anchor rod or pile foundation, comprising an axial rod (4), a plurality of vertical bars (2), at least two circular fixators (5) and several groups of ribs (3) which correspond to the circular fixators (5). The circular fixators (5) are all sleeved on the axial rod (4); one end of the ribs (3) is movably connected to the position of the vertical bars (2) at the same height, and the other end of the ribs (3) is movably connected to the circular fixators (5); annular hoops (6) are arranged on the periphery of the vertical bars (2) to serve as circles of latitude; fixing points are formed on the annular hoops (6) and the vertical bars (2); and the annular hoops (6) are annular spiral spring hoops of an elastic material or flexible steel wires.

Abstract: A magnetic tunnel junction (MTJ) device includes two magnetic tunnel junction elements and a magnetic shielding layer. The two magnetic tunnel junction elements are arranged side by side. The magnetic shielding layer is disposed between the magnetic tunnel junction elements. A method of forming said magnetic tunnel junction (MTJ) device includes the following steps. An interlayer including a magnetic shielding layer is formed. The interlayer is etched to form recesses in the interlayer. The magnetic tunnel junction elements fill in the recesses. Or, a method of forming said magnetic tunnel junction (MTJ) device includes the following steps. A magnetic tunnel junction layer is formed. The magnetic tunnel junction layer is patterned to form magnetic tunnel junction elements. An interlayer including a magnetic shielding layer is formed between the magnetic tunnel junction elements.

Abstract: CD73 (also known as ecto-5?-nucleotidase) inhibitor compounds are provided, as well as compositions and uses thereof for treating or preventing CD73-associated or related diseases, disorders and conditions, including cancer- and immune-related disorders. CD73 inhibitor compounds include compounds having the structure set forth in Formula I and pharmaceutically acceptable esters or salts thereof.

Abstract: Business goals may be achieved using adaptive rewarding for the personalization of contents. In response to receiving user information, personalized contents for the user can be recommended using a reinforcement learning algorithm. In response to presenting the personalized content to the user, an action by the user selecting a particular content may be received. A reward value can be calculated for the action based on a reward function. The reward function can be based, at least in part, upon the action, the selected content, and/or the user. The reward function can be based upon one or more business goals, such as user engagement, monetization, and/or security. The calculated reward value can be provided to the reinforcement learning algorithm, which can be adapted based upon the reward value for future selection of personalized contents.

Abstract: A semiconductor device preferably includes a metal-oxide semiconductor (MOS) transistor disposed on a substrate, an interlayer dielectric (ILD) layer disposed on the MOS transistor, and a magnetic tunneling junction (MTJ) disposed on the ILD layer. Preferably, a top surface of the MTJ includes a reverse V-shape while the top surface of the MTJ is also electrically connected to a source/drain region of the MOS transistor.

Abstract: A magnetic resonance spectrometer and a control apparatus for the magnetic resonance spectrometer based on an FPGA. The control apparatus includes a control unit and a conversion receiving unit. The control unit includes a clock source. A waveform generation unit and a signal receiving unit inside the control apparatus are synchronized by means of the same clock source. The control apparatus includes two working modes: a continuous wave mode and an impulse wave mode. The control apparatus can output a microwave signal which is modulated by any wave and has higher synchronism and time resolution.

Abstract: A semiconductor device includes a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate and a dummy MTJ between the first MTJ and the second MTJ, in which a bottom surface of the dummy MTJ is not connected to any metal. Preferably, the semiconductor device further includes a first metal interconnection under the first MTJ, a second metal interconnection under the second MTJ, and a first inter-metal dielectric (IMD) layer around the first metal interconnection and the second metal interconnection and directly under the dummy MTJ.