Abstract: A wire grid structure and a manufacturing method therefor, and a projection screen are provided. The manufacturing method includes: extruding a molten mixed material body in a melt extruder to a casting roll to form a casting piece; patterning the casting piece by means of an impression roll to form a precursor having a preset wire grid structure pattern, where the precursor is wound on the impression roll and has a first dimension in a height direction; stretching the precursor by a first group of stretching rolls and a second group of stretching rolls in two opposite directions along a direction perpendicular to the height direction to form the wire grid structure, a preset distance being configured between the first group of stretching rolls and the second group of stretching rolls. The wire grid structure has a second dimension in the height direction that is greater than the second dimension.

Abstract: A projector and a control method thereof are provided. The projector includes a sensor and a processor coupled to the sensor. The control method of a projector includes: measuring a distance between the sensor and an object through a sensor; and turning on or turning off a projector according to the distance and a threshold.

Abstract: The invention discloses a blockchain-based intrusion detection system for railway signal, which is built on a blockchain's distributed chain structure, without a central, trusted control center. This design mitigates the vulnerabilities associated with centralized intrusion detection centers. Additionally, by utilizing a blockchain-based distributed structure, it also eliminates the risk of a single point of failure for the intrusion detection center. Moreover, the data within the blockchain-based intrusion detection system is highly resistant to malicious tampering. This is achieved by leveraging the consensus mechanism inherent in the blockchain, which can achieve consensus among intrusion detection nodes. The current invention solves the internal evil attacks and avoid the inability to reach consensus between nodes due to internal evil, thereby affecting the intrusion detection performance; at the same time, the intrusion detection model can resist external network attacks.

Abstract: A method includes forming a memory stack over a substrate. A dielectric layer is deposited to cover the memory stack. An opening is formed in the dielectric layer. The opening does not expose the memory stack. A spin-orbit-torque (SOT) layer is formed in the opening. A free layer is formed over the dielectric layer to interconnect the memory stack and the SOT layer.

Abstract: A method for fabricating a magnetic random access memory (MRAM) device includes the steps of first forming a first magnetic tunneling junction (MTJ) on a substrate, forming a first top electrode on the first MTJ, and then forming a passivation layer around the first MTJ. Preferably, the passivation layer includes a V-shape and a valley point of the V-shape is higher than a top surface of the first top electrode.

Abstract: A semiconductor structure including the following components is provided. A first capacitor structure includes first, second, and third electrode layers and first and second dielectric layers. The second electrode layer is disposed on the first electrode layer. The top-view pattern of the second electrode layer partially overlaps the top-view pattern of the first electrode layer to have a first overlapping region. The third electrode layer is disposed on the second electrode layer. The top-view pattern of the third electrode layer partially overlaps the top-view pattern of the second electrode layer to have a second overlapping region. The first overlapping region and the second overlapping region have the same top-view area. The first dielectric layer is disposed between the first electrode layer and the second electrode layer. The second dielectric layer is disposed between the second electrode layer and the third electrode layer.

Abstract: A memory device comprises a source region, a drain region, a channel region, a gate dielectric layer, an MTJ stack, and a metal gate. The source region and the drain region are over a substrate. The channel region is between the source region and the drain region. The gate dielectric layer is over the channel region. The MTJ stack is over the gate dielectric layer. The MTJ stack comprises a first ferromagnetic layer, a second ferromagnetic layer with a switchable magnetization, and a tunnel barrier layer between the first and second ferromagnetic layers. The metal gate is over the MTJ stack.

Abstract: A current control module is employed to protect a conductive feature of a printed circuit board (PCB) from an overcurrent event by comparing a reference voltage output from a compensation circuit connected to a reference power supply to a voltage output from a conductive feature connected to a power supply which is different from the reference power supply. The reference output voltage is representative of an anticipated voltage output from the conductive feature. The current control module is configured to initiate regulation of power to the conductive feature when the voltage output from the conductive feature exceeds the reference voltage output.

Abstract: A method for fabricating a semiconductor device includes the steps of: forming a magnetic tunneling junction (MTJ) on a substrate; forming a first inter-metal dielectric (IMD) layer around the MTJ; forming a first metal interconnection adjacent to the MTJ; forming a stop layer on the first IMD layer; removing the stop layer to form an opening; and forming a channel layer in the opening to electrically connect the MTJ and the first metal interconnection.

Abstract: The present disclosure discloses a data encoding method and apparatus, a device and a medium. The data encoding method includes: obtaining a storage erasure structure determined based on an original encoding method, wherein the storage erasure structure includes a first preset number of hard disks and a second preset number of stripes, and the hard disks include data disks and check disks; grouping the second preset number of stripes in the storage erasure structure based on a first division rule to obtain different stripe groups, and grouping the data disks corresponding to different stripes in each of the stripe groups based on a second division rule to obtain different data disk groups; and updating check blocks to be updated based on the different stripe groups and the different data disk groups and according to a preset encoding rule to complete data encoding.

Abstract: A method and apparatus for generating checking data, an electronic device and a non-volatile computer-readable storage medium.

Abstract: Provided are a node matching method and apparatus, a device and a medium. The method includes: acquiring real-time state parameters of a plurality of allowed input ports and a plurality of allowed output ports of a target node; according to the real-time state parameters and a preset calculation rule, determining serial numbers of all the allowed input ports in an idle state, and determining serial numbers of all the allowed output ports in an idle state; matching the allowed input ports and the allowed output ports, which have corresponding serial numbers, to obtain matching relationships; and performing data transmission according to the matching relationships.

Abstract: A semiconductor structure includes a substrate, a first dielectric layer on the substrate, a plurality of memory stack structures on the first dielectric layer, an insulating layer conformally covering the memory stack structures and the first dielectric layer, a second dielectric layer on the insulating layer and filling the spaces between the memory stack structures, a first interconnecting structure through the second dielectric layer, wherein a top surface of the first interconnecting structure is flush with a top surface of the second dielectric layer and higher than top surfaces of the memory stack structures, a third dielectric layer on the second dielectric layer, and a plurality of second interconnecting structures through the third dielectric layer, the second dielectric layer and the insulating layer on the top surfaces of the memory stack structures to contact the top surfaces of the memory stack structures.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a spacer adjacent to the MTJ, a liner adjacent to the spacer, and a first metal interconnection on the MTJ. Preferably, the first metal interconnection includes protrusions adjacent to two sides of the MTJ and a bottom surface of the protrusions contact the liner directly.

Abstract: A near-eye display device includes a first light transmission substrate, a plurality of arrays of display units, a second light transmission substrate, and a plurality of arrays of optical elements. The arrays of display units are configured on the first light transmission substrate. An interval between two adjacent display units is a light transmission region. The second light transmission substrate is configured in a different layer from the first light transmission substrate in a stacking direction. The arrays of optical elements are configured on the second light transmission substrate. An interval between two adjacent optical elements is a light transmission region. Each display unit has a one-to-one correspondence with the optical element in the stacking direction.

Abstract: An image compensation device including a substrate and island display units is provided. The substrate includes a central area and configuration rings surrounding the central area and spaced apart from the central area at different intervals. The island display units are disposed on the substrate. One of the island display units is disposed at the central area, and the other island display units are respectively disposed at the configuration rings. Each island display unit includes a real display area and a dummy display area located around the real display area, and includes real pixels and dummy pixels. The real pixels are disposed in the real display area. The dummy pixels are disposed in the dummy display area, and a number of the dummy pixels is greater than a number of the real pixels to compensate for a display image spliced by discrete images.

Abstract: Disclosed in the present application are an image recognition method and apparatus, and a device and a medium.

Abstract: A semiconductor device includes a storage element on a substrate. The storage element has a tapered upper end structure. The tapered upper end structure includes a top electrode and a spacer surrounding the top electrode. A gap-fill dielectric layer is disposed around the spacer. A conductive cap layer covers the top electrode and the spacer. An inter-metal dielectric (IMD) layer is disposed on the conductive cap layer. A metal interconnection is disposed in the IMD layer and electrically connected to the top electrode through the conductive cap layer.

Abstract: A memory structure comprises a dielectric layer, a first ferromagnetic bottom electrode, a second ferromagnetic bottom electrode, an SOT channel layer, and an MTJ structure. The dielectric layer is over the substrate. The first ferromagnetic bottom electrode extends through the dielectric layer. The second ferromagnetic bottom electrode extends through the dielectric layer, and is spaced apart from the first ferromagnetic bottom electrode. The SOT channel layer extends from the first ferromagnetic bottom electrode to the second ferromagnetic bottom electrode. The MTJ structure is over the SOT channel layer.

Abstract: A method and an apparatus for generating image data, which relate to the technical field of image processing. The method comprises: obtaining a first pixel value of each pixel in a first image based on original pixel values of the first image acquired by an image acquisition device when ambient light brightness is greater than a first preset brightness threshold; obtaining a second pixel value of each pixel by dividing the first pixel value of this pixel by a preset multiple; the second preset brightness threshold is less than the first preset brightness threshold; obtaining a third pixel value of each pixel by adding Poisson noise based on a total system gain of the image acquisition device on the basis of the second pixel value of this pixel; generating original pixel values of a target image which corresponds to the first image for which the ambient light brightness is less than the second preset brightness threshold based on respective third pixel values.