Abstract: A magnetic separation device is provided, including a first magnetic field unit and a first separation unit disposed at a side of the first magnetic field unit. The first magnetic field unit includes a first magnetic yoke having opposite first and second surfaces, and a plurality of first magnets respectively disposed over the first and second surfaces, wherein the same magnetic poles of the plurality of first magnets face the first magnetic yoke. The first separation unit includes a body made of non-magnetic materials and a continuous piping disposed in the body, including at least one first section and at least one second section, wherein at least one second section is perpendicular to at least one first section, and at least one second section is adjacent to, and in parallel to a side of the first magnetic yoke not in contact with the plurality of first magnets.

Abstract: A vector processor is provided having an instruction set with a vector convolution function. The disclosed vector processor performs a convolution function between an input signal and a filter impulse response by obtaining a vector comprised of at least N1+N2-1 input samples; obtaining N2 time shifted versions of the vector (including a zero shifted version), wherein each time shifted version comprises Ni samples; and performing a weighted sum of the time shifted versions of the vector by a vector of Ni coefficients; and producing an output vector comprising one output value for each of the weighted sums. The vector processor performs the method, for example, in response to one or more vector convolution software instructions having a vector input. The vector can comprise a plurality of real or complex input samples and the filter impulse response can be expressed using a plurality of coefficients that are real or complex.

Abstract: A structure comprises a substrate, a mask, a buffer/nucleation layer, and a group III-V compound semiconductor material. The substrate has a top surface and has a recess from the top surface. The recess includes a sidewall. The first mask is the top surface of the substrate. The buffer/nucleation layer is along the sidewall, and has a different material composition than a material composition of the sidewall. The III-V compound semiconductor material continuously extends from inside the recess on the buffer/nucleation layer to over the first mask.

Abstract: A processor is provided having an instruction set with user-defined non-linear functions for digital pre-distortion (DPD) and other non-linear applications. A signal processing function, such as DPD, is implemented in software by obtaining at least one software instruction that performs at least one non-linear function for an input value, x, wherein the at least one non-linear function comprises at least one user-specified parameter; in response to at least one of the software instructions for at least one non-linear function having at least one user-specified parameter, performing the following steps: invoking at least one functional unit that implements the at least one software instruction to apply the non-linear function to the input value, x; and generating an output corresponding to the non-linear function for the input value, x. The user-specified parameter can optionally be loaded from memory into at least one register.

Abstract: Software Digital Front End (SoftDFE) signal processing techniques are provided. One or more digital front end (DFE) functions are performed on a signal in software by executing one or more specialized instructions on a processor to perform the one or more digital front end (DFE) functions on the signal, wherein the processor has an instruction set comprised of one or more of linear and non-linear instructions. A block of samples comprised of a plurality of data samples is optionally formed and the digital front end (DFE) functions are performed on the block of samples. The specialized instructions can include a vector convolution function, a complex exponential function, an xk function, a vector compare instruction, a vector max( ) instruction, a vector multiplication instruction, a vector addition instruction, a vector sqrt( ) instruction, a vector 1/x instruction, and a user-defined non-linear instruction.

Abstract: A semiconductor device having light-emitting diodes (LEDs) formed on a concave textured substrate is provided. A substrate is patterned and etched to form recesses. A separation layer is formed along the bottom of the recesses. An LED structure is formed along the sidewalls and, optionally, along the surface of the substrate between adjacent recesses. In these embodiments, the surface area of the LED structure is increased as compared to a planar surface. In another embodiment, the LED structure is formed within the recesses such that the bottom contact layer is non-conformal to the topology of the recesses. In these embodiments, the recesses in a silicon substrate result in a cubic structure in the bottom contact layer, such as an n-GaN layer, which has a non-polar characteristic and exhibits higher external quantum efficiency.

Abstract: A digital processor is provided having an instruction set with a complex exponential function. The digital processor evaluates a complex exponential function for an input value, x, by obtaining a complex exponential software instruction having the input value, x, as an input; and in response to the complex exponential software instruction: invoking at least one complex exponential functional unit that implements complex exponential software instructions to apply the complex exponential function to the input value, x; and generating an output corresponding to the complex exponential of the input value, x. A complex exponential function for an input value, x, can be evaluated by wrapping the input value to maintain a given range; computing a coarse approximation angle using a look-up table; scaling the coarse approximation angle to obtain an angle from 0 to ?; and computing a fine corrective value using a polynomial approximation.

Abstract: Block-based crest factor reduction (CFR) techniques are provided. An exemplary block-based crest factor reduction method comprises obtaining a block of data samples comprised of a plurality of samples; applying the block of data to a crest factor reduction block; and providing a processed block of data from the crest factor reduction block. The block-based crest factor reduction method can optionally be iteratively performed a plurality of times for the block of data. The block of data samples can comprise an expanded block having at least one cursor block. For example, at least two pre-cursor blocks and one post-cursor block can be employed. The peaks can be cancelled, for example, only in the block of data samples and in a first of the pre-cursor blocks.

Abstract: In one embodiment, a programmable vector processor performs preamble detection in a wireless communication network. Implementation of preamble detection in the vector processor is made possible by a set of vector instructions that include (i) a circular load instruction for loading vectors of received data, (ii) a correlation instruction for correlating the vectors of received data with vectors of the scrambling code to concurrently generate a plurality of complex correlations, (iii) a partial-transpose instruction for arranging vectors of the complex correlations for use by a Fast Hadamard Transform (FHT) processor, and (iv) an FHT instruction for performing FHT processing on a vector of complex correlations. Implementing preamble detection in the vector processor allows more of the received data to be processed concurrently. As a result, preamble detectors of the disclosure may detect preambles using fewer clock cycles than that of comparable preamble detectors implemented using hardware accelerators.

Abstract: A light-emitting diode (LED) device is provided. The LED device has raised semiconductor regions formed on a substrate. LED structures are formed over the raised semiconductor regions such that bottom contact layers and active layers of the LED device are conformal layers. The top contact layer has a planar surface. In an embodiment, the top contact layers are continuous over a plurality of the raised semiconductor regions while the bottom contact layers and the active layers are discontinuous between adjacent raised semiconductor regions.

Abstract: Embodiments provide for applying an order N fast Hadamard transform (FHT) of a vector U using a mixed radix FHT in a tees of a communication system, the N is a positive integer, when receiving signals from a transmitter over a channel and generating the vector U. The method includes, in an FHT module of a decoder in the receiver, planning n stages of the mixed radix FHT, where the a is a positive integer, each stage defined by corresponding logic, decomposing the order N FHT into a low order FHTs, and calculating, via the corresponding logic, each low order FHT at each stage. Input vectors of a subsequent stage are calculated in a proceeding stage, and calculated results of each low order FHT are reconstructed by the decoder to form an output vector.

Abstract: A method for controlling a rack system including a plurality of detachable chassis, where at lease one node is disposed in the chassis and a rack management controller (RMC) is disposed in the rack system. First, at least one detecting unit connected to the RMC and the node of the chassis in the rack system is provided. Next, a status message of the chassis is detected for determining whether the status of the chassis is changed. When the status is changed, the detecting unit determines whether the node corresponding to the chassis exists in the rack system. When the node exists, the detecting unit acquires a message of a field replaceable unit (FRU) of the node. Thereafter, the detecting unit transmits the message of the FRU to the RMC. Then, the RMC determines a type of the node according to the message of the FRU.

Abstract: A fan device includes a frame including an axle base and a vane including a hub disposed on the axle base pivotally and blade assemblies disposed circumferentially on the sidewall surface. The hub includes a windward side and a sidewall surface. Each blade assemblies includes a first blade and a second blade protruded from the sidewall surface radially. The second blade is farther away than the first blade from the windward side. The angle of between an extending surface of a second side edge of the second blade extending and the windward side is greater than another angle of between an extending surface of a first side edge of the first blade extending and the windward side. The gap between the partial second side edge and the windward side is less than another gap between the first side edge and the windward side.

Abstract: A liquid crystal display (LCD) system is provided. The LCD system includes a light-passable plate, an LCD panel and a controller. The light-passable plate is configured to allow natural light to pass through the light-passable plate; and the LCD panel is coupled to the light-passable plate and is configured to receive the natural light passing through the light-passable plate. Further, the controller is coupled to the LCD panel to control the LCD panel such that the natural light passing through the light-passable plate is used as backlight for operation of the LCD panel. The light-passable plate structurally supports the LCD panel in addition to providing the natural light to the LCD panel.

Abstract: A semiconductor component includes a semiconductor substrate having an opening A first dielectric liner having a first compressive stress is disposed in the opening. A second dielectric liner having a tensile stress is disposed on the first dielectric liner. A third dielectric liner having a second compressive stress disposed on the second dielectric liner.

Abstract: A semiconductor device having light-emitting diodes (LEDs) formed on a concave textured substrate is provided. A substrate is patterned and etched to form recesses. A separation layer is formed along the bottom of the recesses. An LED structure is formed along the sidewalls and, optionally, along the surface of the substrate between adjacent recesses. In these embodiments, the surface area of the LED structure is increased as compared to a planar surface. In another embodiment, the LED structure is formed within the recesses such that the bottom contact layer is non-conformal to the topology of the recesses. In these embodiments, the recesses in a silicon substrate result in a cubic structure in the bottom contact layer, such as an n-GaN layer, which has a non-polar characteristic and exhibits higher external quantum efficiency.

Abstract: Through silicon via (TSV) isolation structures are provided and suppress electrical noise such as may be propagated through a semiconductor substrate when caused by a signal carrying active TSV such as used in 3D integrated circuit packaging. The isolation TSV structures are surrounded by an oxide liner and surrounding dopant impurity regions. The surrounding dopant impurity regions may be P-type dopant impurity regions that are coupled to ground or N-type dopant impurity regions that may advantageously be coupled to VDD. The TSV isolation structure is advantageously disposed between an active, signal carrying TSV and active semiconductor devices and the TSV isolation structures may be formed in an array that isolates an active, signal carrying TSV structure from active semiconductor devices.

Abstract: Thermal responsive compositions for treating bone diseases are provided. The thermal responsive composition for treating bone diseases includes a bone growth factor and a biodegradable copolymer. The biodegradable copolymer has a structure of Formula (I) or Formula (II): A-B-BOX-B-A??Formula (I) B-A-B-(BOX-B-A-B)n-BOX-B-A-B??Formula (II) wherein, A includes a hydrophilic polyethylene glycol polymer, B includes a hydrophobic polyester polymer, BOX is a bifunctional group monomer of 2, 2?-Bis(2-oxazoline) and used for coupling the blocks A-B or B-A-B, and n is an integer and the same or more than 0.

Abstract: A data preservation method applicable to an electronic device operating with an open operating system having a data storage region includes creating a disk partition; creating an authority to access the disk partition and get linked to a group ID (GID); mounting the disk partition in a directory having a user ID (UID) and the GID; and giving authority related to the linked GID to an application having the authority, so as to access data in the disk partition having the GID. The authority, coupled with the GID, allows a specific disk partition to store data generated as a result of execution of the application. Even if the application causes a UID change later for some reason, the application bestowed with the authority can still access data through the GID, thereby preserving data.

Abstract: A method of making a semiconductor device, the method includes forming a first opening and a second opening in a substrate. The method further includes forming a conductive material in the first opening and in the second opening, the conductive material comprising a joined portion where the conductive material in the first opening and the conductive material in the second opening are electrically and thermally connected together at a first surface of the substrate. The method further includes reducing a thickness of the substrate from a second surface of the substrate, opposite the first surface, to expose the conductive material in the first opening and the conductive material in the second opening. The method further includes connecting a device to the second surface of the substrate.