Patents by Inventor M. Roberts

M. Roberts has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated quantum circuit assemblies for cooling apparatus
    Patent number: 11011693
    Abstract: Embodiments of the present disclosure describe integrated quantum circuit assemblies that include quantum circuit components pre-packaged, or integrated, with some other electronic components and mechanical attachment means for easy inclusion within a cooling apparatus. An example integrated quantum circuit assembly includes a package and mechanical attachment means for securing the package within a cryogenic chamber of a cooling apparatus. The package includes a plurality of components, such as a quantum circuit component, an attenuator, and a directional coupler, which are integral to the package. Such an integrated assembly may significantly speed up installation and may help develop systems for rapidly bringing up quantum computers.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: May 18, 2021
    Assignee: Intel Corporation
    Inventors: Lester Lampert, Ravi Pillarisetty, Nicole K. Thomas, Hubert C. George, Jeanette M. Roberts, David J. Michalak, Roman Caudillo, Thomas Francis Watson, Stephanie A. Bojarski, James S. Clarke
  • Quantum dot devices with gate interface materials
    Patent number: 10991802
    Abstract: Disclosed herein are quantum dot devices with gate interface materials, as well as related computing devices and methods. For example, a quantum dot device may include a quantum well stack, a gate interface material, and a high-k gate dielectric. The gate interface material may be disposed between the high-k gate dielectric and the quantum well stack.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: April 27, 2021
    Assignee: Intel Corporation
    Inventors: Ravi Pillarisetty, Van H. Le, Jeanette M. Roberts, David J. Michalak, James S. Clarke, Zachary R. Yoscovits
  • Apparatus and method for dynamic acousto-elasticity technique measurements at simulated subsurface pressures
    Patent number: 10983036
    Abstract: An apparatus (10) and method for performing nonlinear elasticity measurements using the dynamic acousto-elasticity technique (DAET) at simulated subsurface conditions in the laboratory, are described. The current state-of-the-art for measuring nonlinear elasticity parameters using DAET is limited to ambient pressure conditions on the bench-top. The present invention permits nonlinear parameter measurements at controlled sample internal fluid pore pressures (52) and external confining stress (44), (50) conditions.
    Type: Grant
    Filed: March 26, 2017
    Date of Patent: April 20, 2021
    Assignees: TRIAD NATIONAL SECURITY, LLC, CHEVRON U.S.A. INC.
    Inventors: Peter M. Roberts, Harvey E. Goodman, Marcel C. Remillieux
  • Gate patterning for quantum dot devices
    Patent number: 10978582
    Abstract: Disclosed herein are quantum dot devices with patterned gates, as well as related computing devices and methods. For example, a quantum dot device may include gates disposed on a quantum well stack. In some embodiments, the gates may include a first gate with a first length; two second gates with second lengths arranged such that the first gate is disposed between the second gates; and two third gates with third lengths arranged such that the second gates are disposed between the third gates; and the first, second, and third lengths may all be different. In some embodiments, the gates may include a first set of gates alternatingly arranged with a second set of gates, spacers may be disposed between gates of the first set and gates of the second set, and gates in the first or second set may include a gate dielectric having a U-shaped cross-section.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: April 13, 2021
    Assignee: Intel Corporation
    Inventors: Jeanette M. Roberts, Ravi Pillarisetty, David J. Michalak, Zachary R. Yoscovits, James S. Clarke
  • Methods for treating PTEN deficient epithelial cancers using a combination of anti-PI3KBETA and anti-immune checkpoint agents
    Patent number: 10960008
    Abstract: The present invention relates to methods for treating PTEN deficient epithelial cancers using a combination of anti-PI3Kbeta and anti-immune checkpoint agents.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: March 30, 2021
    Assignee: Dana-Farber Cancer Institute, Inc.
    Inventors: Jean Zhao, Johann Bergholz, Gordon J. Freeman, Thomas M. Roberts
  • NOTIFICATIONS ON A USER DEVICE BASED ON ACTIVITY DETECTED BY AN ACTIVITY MONITORING DEVICE
    Publication number: 20210090419
    Abstract: Methods, systems and devices are provided for motion-activated display of messages on an activity monitoring device. In one embodiment, method for presenting a message on an activity monitoring device is provided, including the following method operations: downloading a plurality of messages to the device; detecting a stationary state of the device; detecting a movement of the device from the stationary state; in response to detecting the movement from the stationary state, selecting one of a plurality of messages, and displaying the selected message on the device.
    Type: Application
    Filed: October 2, 2020
    Publication date: March 25, 2021
    Inventors: Timothy M. Roberts, Nichiketa Choudhary
  • Unified slider control for modifying multiple image properties
    Patent number: 10936173
    Abstract: Some embodiments provide a novel user interface (UI) tool that is a unified slider control, which includes multiple sliders that slide along a region. The region is a straight line in some embodiments, while it is an angular arc in other embodiments. In some embodiments, the unified slider control is used in a media editing application to allow a user to modify several different properties of the image by moving several different sliders along the region. Each slider is associated with a property of the image. A position of the slider in the region corresponds to a value of the property associated with the slider.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: March 2, 2021
    Assignee: Apple Inc.
    Inventors: Randy Ubillos, Garrett M. Johnson, Russell Y. Webb, Timothy D. Cherna, Samuel M. Roberts, Peter Warner
  • Nonce injection and observation system for detecting eavesdroppers
    Patent number: 10931695
    Abstract: An entity can disseminate nonces by introducing them into various aspects of network traffic, and then listening for them, thereby detecting eavesdroppers on the Internet. A nonce may be numeric, alphanumeric, or otherwise; nonces are contextually appropriate to how they are disseminated. Preferably, a nonce is disseminated by incorporating it into some aspect of network traffic. For example, a nonce can be placed in a network identifier such as an IP address or domain name label. Correlating the circumstances under which the nonce was disseminated and under which it was observed to “propagate”, intelligence about who is eavesdropping on what portions of the Internet can be derived. Such intelligence can be put to many uses, including reporting on eavesdroppers, routing traffic around eavesdroppers, developing reputation scores, and adopting enhanced obfuscation/privacy/security techniques.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: February 23, 2021
    Assignee: Akamai Technologies, Inc.
    Inventors: David J. Plonka, Kyle R. Rose, Laura M. Roberts
  • Bivalent bromodomain inhibitors and uses thereof
    Patent number: 10913752
    Abstract: The present invention provides bivalent inhibitors of BET bromodomains, such as compounds of Formulae (I), (II), (III), (IV), (V), and (VI). Some bromdomain-containing proteins (e.g., BRD4) have a tandem bromodomain primary structure comprising more than one bromodomain binding site (e.g., BRD4 comprises BD1 and BD2). Bivalent inhibitors of BET bromodomains provided herein can target bromodomains through advantageous multivalent interactions, and can therefore can be to treat diseases or conditions associated with bromodomain-containing proteins. The present also provides pharmaceutical compositions and kits comprising the inventive compounds, as well as methods of using the inventive compounds.
    Type: Grant
    Filed: November 23, 2016
    Date of Patent: February 9, 2021
    Assignee: Dana-Farber Cancer Institute, Inc.
    Inventors: James E. Bradner, Jun Qi, Minoru Tanaka, Justin M. Roberts
  • QUANTUM WELL STACKS FOR QUANTUM DOT DEVICES
    Publication number: 20210036110
    Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack including a quantum well layer, wherein the quantum well layer includes an isotopically purified material; a gate dielectric above the quantum well stack; and a gate metal above the gate dielectric, wherein the gate dielectric is between the quantum well layer and the gate metal.
    Type: Application
    Filed: December 17, 2017
    Publication date: February 4, 2021
    Applicant: Intel Corporation
    Inventors: Nicole K. Thomas, James S. Clarke, Jessica M. Torres, Ravi Pillarisetty, Kanwaljit Singh, Payam Amin, Hubert C. George, Jeanette M. Roberts, Roman Caudillo, David J. Michalak, Zachary R. Yoscovits, Lester Lampert
  • Quantum dot devices with fins and partially wrapped gates
    Patent number: 10910488
    Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a base; a fin extending away from the base, wherein the fin has a first side face and a second side face, and the fin includes a quantum well layer; and a gate above the fin, wherein the gate extends down along the first side face.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: February 2, 2021
    Assignee: Intel Corporation
    Inventors: Hubert C. George, Lester Lampert, James S. Clarke, Ravi Pillarisetty, Zachary R. Yoscovits, Nicole K. Thomas, Roman Caudillo, Kanwaljit Singh, David J. Michalak, Jeanette M. Roberts
  • Vertical flux bias lines coupled to vertical squid loops in superconducting qubits
    Patent number: 10879446
    Abstract: Embodiments of the present disclosure relate to quantum circuit assemblies implementing superconducting qubits, e.g., transmons, in which SQUID loops and portions of FBLs configured to magnetically couple to the SQUID loops extend substantially vertically. In contrast to conventional implementations, for a vertical SQUID according to various embodiments of the present disclosure, a line that is perpendicular to the SQUID loop is parallel to the qubit substrate. A corresponding FBL is also provided in a vertical arrangement, in order to achieve efficient magnetic coupling to the vertical SQUID loop, by ensuring that at least a portion of the FBL designed to conduct current responsible for generating magnetic field for tuning qubit frequency is substantially perpendicular to the substrate.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: December 29, 2020
    Assignee: Intel Corporation
    Inventors: Roman Caudillo, Lester Lampert, David J. Michalak, Jeanette M. Roberts, Ravi Pillarisetty, Hubert C. George, Nicole K. Thomas, James S. Clarke
  • INTEGRATED QUANTUM CIRCUIT ASSEMBLIES FOR COOLING APPARATUS
    Publication number: 20200403137
    Abstract: Embodiments of the present disclosure describe integrated quantum circuit assemblies that include quantum circuit components pre-packaged, or integrated, with some other electronic components and mechanical attachment means for easy inclusion within a cooling apparatus. An example integrated quantum circuit assembly includes a package and mechanical attachment means for securing the package within a cryogenic chamber of a cooling apparatus. The package includes a plurality of components, such as a quantum circuit component, an attenuator, and a directional coupler, which are integral to the package. Such an integrated assembly may significantly speed up installation and may help develop systems for rapidly bringing up quantum computers.
    Type: Application
    Filed: June 24, 2019
    Publication date: December 24, 2020
    Inventors: Lester Lampert, Ravi Pillarisetty, Nicole K. Thomas, Hubert C. George, Jeanette M. Roberts, David J. Michalak, Roman Caudillo, Thomas Francis Watson, Stephanie A. Bojarski, James S. Clarke
  • Data-fusing activity monitoring device
    Patent number: 10866115
    Abstract: An activity monitoring device accumulates a count of steps taken as an individual bearing the activity monitoring device travels by foot along a route, and wirelessly acquires positioning data from a discrete global-positioning device corresponding to a sequence of locations along the route. The activity monitoring device iteratively revises an estimated stride length of the individual based on the positioning data and the step count and iteratively updates a travel distance on a display of the activity monitoring device according to the step count and the estimated stride length as the individual proceeds from one location in the sequence to the next.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: December 15, 2020
    Assignee: Fitbit, Inc.
    Inventors: Shelten Gee Jao Yuen, Timothy M. Roberts, Heiko Gernot Albert Panther, Barry Christopher Burton
  • Flashing systems and methods for modular blast, ballistic, and forced entry resistant shelters
    Patent number: 10865582
    Abstract: In one embodiment, a flashing system is provided for fortifying seams between a first blast, ballistic, and forced entry resistant shelter module and a second blast, ballistic, and forced entry resistant shelter module. The system includes a first side flashing assembly for fortifying a first side seam between the first blast, ballistic, and forced entry resistant shelter module and the second blast, ballistic, and forced entry resistant shelter module, a top flashing assembly for fortifying a top seam between the first blast, ballistic, and forced entry resistant shelter module and the second blast, ballistic, and forced entry resistant shelter module, and a second side flashing assembly for fortifying a second side seam between the first blast, ballistic, and forced entry resistant shelter module and the second blast, ballistic, and forced entry resistant shelter module.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: December 15, 2020
    Assignee: UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE ARMY
    Inventors: Justin M Roberts, Craig R Ackerman
  • Support for maintenance of a fleet of vehicles with intuitive display of repair analytics
    Patent number: 10860989
    Abstract: A method is provided for supporting maintenance of a fleet of vehicles with intuitive display of repair analytics. The method includes receiving a user request for repair analytics for the fleet of vehicles via a GUI that includes a first frame with a date-range filter to enable the user to select a date range for the repair analytics. The method includes interpreting the user request to produce a query of dataset(s) for the fleet, and executing the query for data of the vehicles. The datasets include an in-service time and repair costs for the vehicles, and the data includes the same over the date range. The method includes determining, and generating a chart in a second frame of the GUI that graphically illustrates, a moving average repair cost per unit of in-service time for a plurality of time periods within the date range from the in-service time and repair costs.
    Type: Grant
    Filed: January 29, 2020
    Date of Patent: December 8, 2020
    Assignee: THE BOEING COMPANY
    Inventors: David M. Roberts, III, Gregory Urbina, Jennifer M. Kansal, Krupal K. Desai
  • Modular anti-ballistic shelter system
    Patent number: 10858855
    Abstract: The modular anti-ballistic shelter system includes two end units and, optionally, additional middle units for a wider structure. End and middle units may also stack atop each other for multi-story structures. Each unit is configured to comply with both ISO standards for size and weight, and with the U.S. Department of State Certification Standard for Forced Entry and Ballistic Resistance of Structural Systems. Each exterior wall of each end unit and each middle unit is reinforced with wall studs that penetrate the unit's structural framework of beams and frames. Even though these wall studs are welded into place, penetration of the wall studs into the beams and frames ensures acceptable blast, ballistic, and forced entry resistance even if the welds are flawed.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: December 8, 2020
    Assignee: UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE ARMY
    Inventors: Justin M Roberts, John M Hoemann, Craig R Ackerman
  • SUBSTRATE ENGINEERING FOR QUBITS
    Publication number: 20200373351
    Abstract: Embodiments of the present disclosure propose qubit substrates, as well as methods of fabricating thereof and related device assemblies. In one aspect of the present disclosure, a qubit substrate includes a base substrate of a doped semiconductor material, and a layer of a substantially intrinsic semiconductor material over the base substrate. Engineering a qubit substrate in this manner allows improving coherence times of qubits provided thereon, while, at the same time, being sufficiently mechanically robust so that it can be efficiently used in large-scale manufacturing.
    Type: Application
    Filed: September 18, 2017
    Publication date: November 26, 2020
    Applicant: Intel Corporation
    Inventors: Jeanette M. Roberts, Wesley T. Harrison, Adel A. Elsherbini, Stefano Pellerano, Zachary R. Yoscovits, Lester Lampert, Ravi Pillarisetty, Roman Caudillo, Hubert C. George, Nicole K. Thomas, David J. Michalak, Kanwaljit Singh, James S. Clarke
  • Reducing crosstalk from flux bias lines in qubit devices
    Patent number: 10847705
    Abstract: Embodiments of the present disclosure describe two approaches to providing flux bias line structures for superconducting qubit devices. The first approach, applicable to flux bias line structures that include at least one portion that terminates with a ground connection, resides in terminating such a portion with a ground connection that is electrically isolated from the common ground plane of a quantum circuit assembly. The second approach resides in providing a SQUID loop of a superconducting qubit device and a portion of the flux bias line structure over a portion of a substrate that is elevated with respect to other portions of the substrate. These approaches may be used or alone or in combination, and may improve grounding of and reduce crosstalk caused by flux bias lines in quantum circuit assemblies.
    Type: Grant
    Filed: February 15, 2018
    Date of Patent: November 24, 2020
    Assignee: Intel Corporation
    Inventors: Lester Lampert, Adel A. Elsherbini, James S. Clarke, Jeanette M. Roberts, Ravi Pillarisetty, David J. Michalak, Kanwaljit Singh, Roman Caudillo, Zachary R. Yoscovits, Nicole K. Thomas, Hubert C. George, Stefano Pellerano
  • Nectarine tree named ‘Wanectthree’
    Patent number: PP32906
    Abstract: A new and distinct variety of nectarine tree (Prunus persica nucipersica), which is denominated varietally as ‘Wanectthree’, and which produces an attractively colored yellow-fleshed, clingstone nectarine which is mature for harvesting and shipment approximately July 20 to July 29 under the ecological conditions prevailing in the San Joaquin Valley of central California.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: March 23, 2021
    Assignee: Wawona Packing Co., LLC
    Inventors: John Keith Slaughter, Kaylan M. Roberts