Patents by Inventor Mahesh
Mahesh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190273504Abstract: An integrated circuit includes a signal network and a phase detector circuit. The signal network includes an adjustable delay circuit. The adjustable delay circuit is coupled at an intersection in the signal network between branches of the signal network. The signal network generates a first signal at a first leaf node of the signal network in response to a second signal. The signal network generates a third signal at a second leaf node of the signal network in response to the second signal. The phase detector circuit compares phases of the first and third signals to generate a phase detection signal. The adjustable delay circuit adjusts a delay provided to the first signal relative to the second signal to reduce a skew between the first and third signals based on the phase detection signal indicating that the first and third signals have the skew.Type: ApplicationFiled: May 16, 2019Publication date: September 5, 2019Applicant: Altera CorporationInventors: David Mendel, Carl Ebeling, Dana How, Mahesh Iyer
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Patent number: 10402413Abstract: A processor may include a plurality of processing elements and a hardware accelerator for selecting data elements. The hardware accelerator may: access an input data set comprising a set of data elements, each data element having a score value; increment bin counters based on the score values of the set of data elements, each bin counter to count a number of data elements with an associated score value; determine a cumulative sum of count values for a sequence of bin counters, the sequence beginning with a first bin counter of the plurality of bin counters; identify a second bin counter in the sequence of bin counters at which the cumulative sum reaches a selection quantity N; and generate an output data set based on a comparison of the set of data elements to a threshold score associated with the second bin counter.Type: GrantFiled: March 31, 2017Date of Patent: September 3, 2019Assignee: Intel CorporationInventors: Mahesh Mamidipaka, Srivatsava Jandhyala, Anish N K, Nagadastagiri Reddy C, Sreenivas Subramoney
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Patent number: 10399556Abstract: Systems, methods and apparatus for controlling operation a hybrid powertrain are disclosed that use low power storage and motor/generator components in line haul operations. In one embodiment, a line haul drive cycle includes a low power motor/generator executing a power assistance operation of the hybrid powertrain powered by electricity from a low power storage responsive to a monitoring by a line haul controller of ascensions of the hybrid vehicle at or near a constant speed over an uneven terrain. The line haul drive cycle further includes the low power motor/generator executing a regenerative braking operation of the hybrid powertrain supplying captured electric energy to the low power storage responsive to a monitoring by the line haul controller of descensions of the hybrid vehicle at or near the constant speed over the uneven terrain.Type: GrantFiled: October 22, 2018Date of Patent: September 3, 2019Assignee: Cummins Inc.Inventors: Martin T. Books, Mahesh Madurai Kumar
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Patent number: 10403192Abstract: Devices and methods for error diffusion and spatiotemporal dithering are provided. By way of example, a method of operating a display includes receiving a pixel input, a set of pixel coordinates, and a current frame number. A kernel and a particular kernel bit of the kernel is selected from a set of kernels, based upon the pixel input, the pixel coordinates, the frame number, or any combination thereof. A dithered output is determined based at least in part upon the kernel bit. When the display is in a diamond pixel configuration, the dithered output is applied in accordance with a diamond pattern formed by red, blue, or red and blue pixel channels.Type: GrantFiled: July 20, 2017Date of Patent: September 3, 2019Assignee: Apple Inc.Inventors: Marc Albrecht, Mahesh B. Chappalli, Christopher P. Tann, Jim C. Chou, Guy Cote
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Patent number: 10402822Abstract: Various embodiments of the present invention are directed to methods, systems and computer program products for conducting an online transaction on a website involving sensitive information. Such embodiments provide methods, systems and computer program products to: (a) register at least one entity with a gate keeper module, the registering comprising associating the entity with a subscription level; (b) associate a sub-string of a character string with a unique token so that a direct link does not exist between the unique token and the character string; and (c) during processing of the online transaction: (i) using the unique token for intermediate steps during the processing of the online transaction; and (ii) only accessing the character string in storage memory to complete the online transaction after receiving a request from at least one registered entity associated with a subscription level associated with a privilege to receive the requested sensitive information.Type: GrantFiled: March 13, 2015Date of Patent: September 3, 2019Assignee: United Parcel Service of America, Inc.Inventors: Mahesh Sahasranaman, Robert W Plumer
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Patent number: 10405417Abstract: A packaged microelectronic component includes a substrate and a semiconductor die coupled to a top surface of the substrate. A method of attaching the packaged microelectronic component to a secondary structure entails applying a metal particle-containing material to at least one of a bottom surface of the substrate and a mounting surface of the secondary structure. The packaged microelectronic component and the secondary structure are arranged in a stacked relationship with the metal particle-containing material disposed between the bottom surface and the mounting surface. A low temperature sintering process is performed at a maximum process temperature less than a melt point of the metal particles to transform the metal particle-containing material into a sintered bond layer joining the packaged microelectronic component and the secondary structure. In an embodiment, the substrate may be a heat sink for the packaged microelectronic component and the secondary structure may be a printed circuit board.Type: GrantFiled: May 1, 2017Date of Patent: September 3, 2019Assignee: NXP USA, Inc.Inventors: Lakshminarayan Viswanathan, Lu Li, Mahesh K. Shah, Paul Richard Hart
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Patent number: 10402326Abstract: A system that includes circuitry to access memories in both coherent and non-coherent domains is disclosed. The circuitry may receive a command to access a memory included in the coherent domain and generate one or more commands to access a memory in the non-coherent domain dependent upon the received command. The circuitry may send the generated one or more commands to the memory in the non-coherent domain via communication bus.Type: GrantFiled: April 26, 2016Date of Patent: September 3, 2019Assignee: Apple Inc.Inventors: Ronald P. Hall, Mahesh K. Reddy, David J. Williamson
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Publication number: 20190268163Abstract: Data verification in federate learning is faster and simpler. As artificial intelligence grows in usage, data verification is needed to prove custody and/or control. Electronic data representing an original version of training data may be hashed to generate one or more digital signatures. The digital signatures may then be incorporated into one or more blockchains for historical documentation. Any auditor may then quickly verify and/or reproduce the training data using the digital signatures. For example, a current version of the training data may be hashed and compared to the digital signatures generated from the current version of the training data. If the digital signatures match, then the training data has not changed since its creation. However, if the digital signatures do not match, then the training data has changed since its creation. The auditor may thus flag the training data for additional investigation and scrutiny.Type: ApplicationFiled: March 13, 2019Publication date: August 29, 2019Applicant: Factom, Inc.Inventors: Jason Nadeau, Brian Deery, Paul Snow, Mahesh Paolini-Subramanya
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Patent number: 10395195Abstract: Provisioning and management of virtual machines and shared processor pools to process the virtual machines is provided. Shared processor pool(s) of processing units are established on server(s) of a cluster. The shared processor pool(s) are to process virtual machines to execute an application for which licensing cost is determined based on a number of processing units used to process the virtual machines executing the application. Provision of the virtual machines into the shared processor pool(s) and assignment of the processing units to the shared processor pool(s) is managed, which controls the number of processing units dedicated to processing the virtual machines executing the application, to thereby control licensing costs of executing the application. The managing can provision at least two virtual machines for different tenants into a common shared processor pool of the one or more shared processor pools.Type: GrantFiled: January 8, 2016Date of Patent: August 27, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jigar N. Kapasi, Niranjan Srinivasan, Mahesh Viswanathan
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Patent number: 10396123Abstract: Devices are described that include a multi-layered structure that is non-magnetic at room temperature, and which comprises alternating layers of Co and at least one other element E (that is preferably Al; or Al alloyed with Ga, Ge, Sn or combinations thereof). The composition of this structure is represented by Co1-xEx, with x being in the range from 0.45 to 0.55. The structure is in contact with a first magnetic layer that includes a Heusler compound. An MRAM element may be formed by overlying, in turn, the first magnetic layer with a tunnel barrier, and the tunnel barrier with a second magnetic layer (whose magnetic moment is switchable). Improved performance of the MRAM element may be obtained by placing an optional pinning layer between the first magnetic layer and the tunnel barrier.Type: GrantFiled: July 26, 2017Date of Patent: August 27, 2019Assignees: International Business Machines Corporation, Samsung Electronics Co., LtdInventors: Jaewoo Jeong, Stuart S. P. Parkin, Mahesh G. Samant
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Patent number: 10391972Abstract: A seat assembly comprises a seat. The seatbelt securing system further comprises a seatbelt coupled to the seat. The seatbelt comprises a first strap and a second strap. The seatbelt further comprises a latch configured to selectively secure the first strap relative to the second strap. The latch further comprises a latch sensor configured to provide a secured indication in response to detection that the latch properly secures the first strap of the seatbelt to the second strap of the seatbelt and provide an unsecured indication in response to detection that the latch does not properly secure the first strap of the seatbelt to the second strap of the seatbelt. The latch further comprises a latch indicator to provide a warning in response to the unsecured indication.Type: GrantFiled: April 18, 2018Date of Patent: August 27, 2019Assignee: The Boeing CompanyInventor: Mahesh K. Chengalva
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Patent number: 10394993Abstract: Systems and techniques are described for discretizing gate sizes during numerical synthesis. Some embodiments can receive an optimal input capacitance value for an input of an optimizable cell, wherein the input capacitance value is determined by a numerical solver that is optimizing the circuit design. Note that the circuit design may be optimized for different objective functions, e.g., best delay, minimal area under delay constraints, etc. Next, the embodiments can identify an initial library cell in a technology library whose input capacitance value is closest to the optimal input capacitance value. The embodiments can then use the initial library cell to attempt to identify a better (in terms of the objective function that is being optimized) library cell in the technology library. The delay computations used during this process are also minimized.Type: GrantFiled: August 30, 2013Date of Patent: August 27, 2019Assignee: SYNOPSYS, INC.Inventors: Amir H. Mottaez, Mahesh A. Iyer
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Patent number: 10397591Abstract: A control processor for a video encode-decode engine is provided that includes an instruction pipeline. The instruction pipeline includes an instruction fetch stage coupled to an instruction memory to fetch instructions, an instruction decoding stage coupled to the instruction fetch stage to receive the fetched instructions, and an execution stage coupled to the instruction decoding stage to receive and execute decoded instructions. The instruction decoding stage and the instruction execution stage are configured to decode and execute a set of instructions in an instruction set of the control processor that are designed specifically for accelerating video sequence encoding and encoded video bit stream decoding.Type: GrantFiled: April 11, 2015Date of Patent: August 27, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Dipan Kumar Mandal, Mihir Narendra Mody, Mahesh Madhukar Mehendale, Chaitanya Satish Ghone, Piyali Goswami, Naresh Kumar Yadav, Hetul Sanghvi, Niraj Nandan
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Publication number: 20190254671Abstract: A surgical stapling apparatus includes an end effector having an anvil assembly and a staple cartridge assembly, and an anvil buttress retention system releasably disposed on the anvil assembly. The anvil buttress retention system includes an anvil buttress and a retention member including an elongated body looped around at least a portion of the anvil buttress with a free end of the elongated body extendable through a looped end of the elongated body in an untightened configuration such that the anvil buttress retention system is slidable relative to the anvil assembly. The free end of the retention member is movable relative to and through the looped end to a tightened configuration to secure the anvil buttress retention system to the anvil assembly.Type: ApplicationFiled: February 1, 2019Publication date: August 22, 2019Inventors: Jeevan Maddur Shankarsetty, Hari Naga Mahesh Kalepu, Jitendra Bhargava Srinivas
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Publication number: 20190258885Abstract: Methods, systems, and techniques for classifying and/or detecting objects using visible and invisible light images. A visible light image and an invisible light image are received at a convolutional neural network (CNN). The visible light image depicts a region-of-interest imaged using visible light. The invisible light image depicts at least a portion of the region-of-interest imaged using invisible light, and at least one of the images depicts an object-of-interest within the portion of the region-of-interest shared between the images. The CNN then classifies and/or detects the object-of-interest using the images. The CNN may be trained to perform this classification and/or detection using pairs of visible and invisible light training images.Type: ApplicationFiled: February 19, 2019Publication date: August 22, 2019Applicant: Avigilon CorporationInventors: Kevin PIETTE, Pietro RUSSO, Mahesh SAPTHARISHI, Bo Yang YU
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Patent number: 10389053Abstract: Various apparatus and methods of electrically connecting a packaged integrated circuit to a circuit board are disclosed. In one aspect, an apparatus includes a first frame to be mounted on the circuit board and having a first end. An insulating housing is adapted to be mounted on the circuit board and positioned in the first frame. A second frame is pivotally coupled to the first frame. The second frame includes two spaced-apart rail members and a cross member coupled to and between the rail members opposite the first end of the second frame. The rail members are operable to receive the packaged integrated circuit. The second frame has at least one engagement member to engage a first portion of the insulating housing when the second frame is pivoted toward the insulating housing. A third frame is pivotally coupled to the first frame to apply force to the packaged integrated circuit.Type: GrantFiled: September 23, 2016Date of Patent: August 20, 2019Assignee: Advanced Micro Devices, Inc.Inventors: Stephen F. Heng, Mahesh S. Hardikar, Sanjay Dandia
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Patent number: 10387884Abstract: A method for preventing mobile payment is described. The method comprises generating an authorization request, via a payment module, based on sensitive data on a mobile device. The authorization request is transmitted from the payment module to an issuer system. The issuer system sends a neutralization trigger. In response to receiving the neutralization trigger, the payment module is disabled.Type: GrantFiled: March 18, 2015Date of Patent: August 20, 2019Assignee: CA, Inc.Inventors: Sharath Lakshman Kumar, Mahesh Malatesh Chitragar, Vishwanatha Salian, Stephen Prasad
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Patent number: 10389590Abstract: Techniques described herein may be used to condense a large quantity of Virtual Network Function (VNF) chains (that each correspond to a network service) into a much smaller quantity of VNF records; and extract any of the large quantity of VNF chains from the smaller quantity of network service records. This may be accomplished by assigning a Number (No.) of Services attribute and a Tier attribute into each VNF record. The No. of Services attribute and Tier attribute may enable the VNF records to reference one another such that the larger quantity of VNF chains may, in effect, be entirely represented by the much smaller quantity of VNF records, thereby conserving storage space, streamlining VNF chain management, and reducing the processing and memory capacity required to search, configure, and deploy virtual network services.Type: GrantFiled: August 17, 2017Date of Patent: August 20, 2019Assignee: Verizon Patent and Licensing Inc.Inventors: Mahesh Chapalamadugu, Raju Sharma, Manish Srivastava, Ramesh Nadella
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Patent number: 10387425Abstract: Embodiments are directed to a method for preserving temporal locality in disk-based backup systems by receiving a plurality of save streams each comprising a data stream and a metadata stream, directing the data streams to a plurality of respective data containers, and the metadata streams to a single shared metadata container, and assigning metadata streams using the shared metadata container to their own respective compression region to preserve locality at the compression region level.Type: GrantFiled: June 30, 2016Date of Patent: August 20, 2019Assignee: EMC IP Holding Company LLCInventors: Fani Jenkins, Sudhanshu Goswami, Mahesh Kamat
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Patent number: D858758Type: GrantFiled: August 22, 2016Date of Patent: September 3, 2019Assignee: StratoScientific, Inc.Inventors: Suman K. Mulumudi, Mahesh S. Mulumudi