Patents by Inventor Mahesh

Mahesh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9540941
    Abstract: A seal assembly is provided for a turbine engine and includes an annular labyrinth seal holder supported on a radially inner end of vanes A plurality of radially extending labyrinth seal elements are supported on the labyrinth seal holder, and a brush seal assembly is supported to the labyrinth seal holder downstream from the labyrinth seal elements. The brush seal assembly includes a brush seal holder and a brush seal located adjacent to an axially rearward one of the rotor arms. The brush seal holder is attached to an axially facing surface of the labyrinth seal holder. A seal plate defining a detachable labyrinth seal element extends radially inward from the axially facing surface of the labyrinth seal holder to the rearward rotor arm at a location upstream of the brush seal.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: January 10, 2017
    Assignee: Siemens Energy, Inc.
    Inventors: Mahesh Janarthanan, Jeffrey A. Kain, Mushtaq Kazi
  • Publication number: 20170005621
    Abstract: A system and method for packaging a semiconductor device that includes a wall to reduce electromagnetic coupling is presented. A semiconductor device has a substrate on which a first circuit and a second circuit are formed proximate to each other. An isolation wall of electrically conductive material is located between the first circuit and the second circuit, the isolation wall being configured to reduce inductive coupling between the first and second circuits during an operation of the semiconductor device. Several types of isolation walls are presented.
    Type: Application
    Filed: September 16, 2016
    Publication date: January 5, 2017
    Inventors: Margaret A. Szymanowski, Sarmad K. Musa, Fernando A. Santos, Mahesh K. Shah
  • Publication number: 20170000775
    Abstract: Pharmaceutical compositions comprising sulbactam or a pharmaceutically acceptable derivative thereof, and compound of Formula (I) or a stereoisomer or a pharmaceutical acceptable derivative thereof, are disclosed.
    Type: Application
    Filed: January 14, 2015
    Publication date: January 5, 2017
    Applicant: WOCKHARDT LIMITED
    Inventors: Sachin BHAGWAT, Mahesh Vithalbhai PATEL
  • Publication number: 20170003286
    Abstract: The invention relates to biomarkers for diagnosing, monitoring and/or treating tuberculosis in both immunocompetent and immunocompromised individuals with or without co-infection with HIV, monitoring the responses of individuals to anti-myco-bacterial chemotherapy, monitoring the progression of latent tuberculosis to active tuberculosis, differentiating active tuberculosis from latent tuberculosis, and from other clinical conditions that mimic tuberculosis (TB). The invention also relates to methods for diagnosing, monitoring and/or treating tuberculosis using said biomarkers. The above pertain in all aspects both to pulmonary and extrapulmonary Mycobacterium tuberculosis infections, with Mycobacterium tuberculosis being the causative organism in tuberculosis. The invention therefore finds great utility in assisting with future drug discovery efforts for tuberculosis and also provides proxy clinical end points as well as being an effective predictor of a response to treatment.
    Type: Application
    Filed: January 30, 2015
    Publication date: January 5, 2017
    Applicant: ProteinLogic Limited
    Inventors: Roslin Russell, Oliver Stegle, Mahesh Shah
  • Patent number: 9535838
    Abstract: A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: January 3, 2017
    Assignee: Intel Corporation
    Inventors: Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman, Mark B. Rosenbluth, Ajay V. Bhatt, Peter Barry, Scott Dion Rodgers, Anil Vasudevan, Sridhar Muthrasanallur, James Akiyama, Robert G. Blankenship, Ohad Falik, Avi Mendelson, Ilan Pardo, Eran Tamari, Eliezer Weissmann, Doron Shamia
  • Patent number: 9537846
    Abstract: A method, a network element, and a network include determining an authentication mechanism between two nodes in a network path; operating the network path; performing connectivity check between the two nodes in the network path; and authenticating specific frames in the connectivity check between the two nodes with the authentication mechanism responsive to the specific frames affecting a state of the network path. The frames can be Bidirectional Forwarding Detection (BFD), Continuity Check Messages (CCMs), etc. Advantageously, the method, network element, and network reduce the computational load of providing authentication while maintaining secure authentication for important frames, i.e., ones that affect the state of the network path.
    Type: Grant
    Filed: April 15, 2014
    Date of Patent: January 3, 2017
    Assignee: Ciena Corporation
    Inventors: Mahesh Jethanandani, Ankur Saxena, Ashesh Mishra
  • Patent number: 9538659
    Abstract: An embodiment of a solder wettable flange includes a flange body formed from a conductive material. The flange body has a bottom surface, a top surface, sidewalls extending between the top surface and the bottom surface, and one or more depressions extending into the flange body from the bottom surface. Each depression is defined by a depression surface that may or may not be solder wettable. During solder attachment of the flange to a substrate, the depressions may function as reservoirs for excess solder. Embodiments also include devices and systems that include such solder wettable flanges, and methods for forming the solder wettable flanges, devices, and systems.
    Type: Grant
    Filed: August 21, 2013
    Date of Patent: January 3, 2017
    Assignee: NXP USA, INC.
    Inventors: Lakshminarayan Viswanathan, Jaynal A. Molla, Mahesh K. Shah
  • Publication number: 20160377574
    Abstract: An integrated system for performing electro-blotting, probing and drying of the membrane is disclosed. The integrated system comprises a transfer unit for receiving one or more transfer sandwich holder. Each transfer sandwich holder holding a transfer sandwich comprises a gel member and the membrane. The transfer unit is configured to transfer samples from the gel member to the membrane. The integrated system also includes a probing unit for receiving the membrane therewithin. The membrane is exposed to a plurality of antibodies for binding with the samples in the membrane. A drying unit is also present for drying the membrane with hot air.
    Type: Application
    Filed: November 21, 2014
    Publication date: December 29, 2016
    Inventors: Urban Jonsson Axelsson, Lars Erik HAMMARSTRAND, Girish Kittur, Shekar Ambepu, Bharath SUBRAHMANYA, Mahesh Bhat, Kalyana Duggirala Chakravarthy
  • Patent number: 9531986
    Abstract: A method and apparatus for identifying devices using a bitmap are disclosed. In one embodiment, the method comprises: accessing a memory to obtain one or more bitmaps that map each bit location in the bitmap to an index value, where one index value is assigned to each remote wireless media device of a wireless network in a wireless communication system; and examining those bitmaps and determining at least one characteristic of a remote wireless media device and a device identifier that identifies the remote wireless media device in the wireless network based on the bit position in those bitmaps.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: December 27, 2016
    Assignee: SiBEAM, Inc.
    Inventors: In Sung Cho, Kumar Mahesh, Prakash Kamath, Jeffrey Gilbert, Rob Frizzell
  • Patent number: 9531773
    Abstract: Consistent with embodiments of the present invention, a system may be provided to provide per-subscriber stream management comprising: a client capable of receiving a playlist containing a subset of segments associated with a video asset; a video application server to request subscriber state information and to build state representations in a subscriber database on a per-subscriber basis; a media segmenter capable of providing the video asset in multiple bit rates; a subscriber state manager capable of managing the current state of one or more subscribers in a subscriber database; and a stream manager capable of requesting the assignment of bandwidth from a wireless infrastructure on a per-subscriber basis.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: December 27, 2016
    Assignee: Cisco Technology, Inc.
    Inventors: Warren Scott Wainner, Mahesh Vittal, Stinson Mathai
  • Patent number: 9529702
    Abstract: An adapter can execute a test script in parallel relative to separate tenant installations in a multi-tenant environment. Such tenant installations can be established within a cloud computing environment. Multiple tenant installations may share some installation components, such as an application server and/or a database, so that these shared installation components are not duplicated. While executing the test script in parallel, the adapter can translate selected values for each test script execution so that those values are distinguished from corresponding values within other test script executions. The values can be translated to reflect the identity of the tenant whose installation the test script execution targets. Furthermore, while executing the test scripts in parallel, the adapter can cause the test script executions to synchronize at specified points within the test script, so that all of the test script executions are guaranteed to have executed to a common point before proceeding.
    Type: Grant
    Filed: January 13, 2015
    Date of Patent: December 27, 2016
    Assignee: Oracle International Corporation
    Inventors: Ronald van Grinsven, Nagarajender Rao Katoori, Mahesh Bansal, Namita Varma, Shailesh Jain Vinayaka, John Richard Smiljanic, Michael John De Groot
  • Publication number: 20160370844
    Abstract: Approaches provided herein are directed to intelligently boosting, in a power efficient manner, CPU frequency in response to a touch gesture event. In some approaches, for example, a governor of a processor receives an instruction hint (e.g., an interaction hint or a vertical synchronization (VSYNC) hint) from a power hardware abstraction layer (HAL), the instruction hint provided in response to at least one of: a scrolling touch gesture to a user interface, and an application launch touch gesture. In another embodiment, an instruction hint is received at the governor in response to a discrete touch gesture to the user interface. In each case, a clock frequency corresponding to the processor is modified to optimize performance and user experience, while maximizing energy conservation.
    Type: Application
    Filed: June 19, 2015
    Publication date: December 22, 2016
    Applicant: Intel Corporation
    Inventor: Mahesh P. KUMAR
  • Publication number: 20160373407
    Abstract: An approach for regional firewall clustering for optimal state-sharing of different sites in a virtualized/networked (e.g., cloud) computing environment is provided. In a typical embodiment, each firewall in a given region is informed of its peer firewalls via a registration process with a centralized server. Each firewall opens up an Internet protocol (IP)-based communication channel to each of its peers in the region to share state table information. This allows for asymmetrical firewall flows through the network and allows routing protocols to ascertain the best path to a given destination without having to take firewall placement into consideration.
    Type: Application
    Filed: September 2, 2016
    Publication date: December 22, 2016
    Inventors: Robert K. Floyd, III, Baiju D. Mandalia, Robert P. Monaco, Mahesh Viswanathan
  • Publication number: 20160367569
    Abstract: The present disclosure is drawn to pharmaceutical compositions and oral dosage capsules containing testosterone undecanoate, as well as related methods of treatment. In one embodiment, the present invention provides for a pharmaceutical composition that includes a therapeutically effective amount of testosterone undecanoate and a solubilizer. The testosterone undecanoate is solubilized in the composition and is present in an amount such that it comprises about 14 wt % to about 35 wt % of the total composition.
    Type: Application
    Filed: August 14, 2015
    Publication date: December 22, 2016
    Applicant: Lipocine Inc.
    Inventors: Chandrashekar Giliyar, Basawaraj Chickmath, Nachiappan Chidambaram, Mahesh V. Patel, Srinivansan Venkateshwaran
  • Patent number: 9522884
    Abstract: The invention relates to the compounds of formula I or its pharmaceutical acceptable salts, as well as polymorphs, solvates, enantiomers, stereoisomers and hydrates thereof. The pharmaceutical compositions comprising an effective amount of compounds of formula I, and methods for treating or preventing metabolic disorders may be formulated for oral, buccal, rectal, topical, transdermal, transmucosal, intravenous, parenteral administration, syrup, or injection. Such compositions may be also used to the treatment of diabetes, lipid peroxidation, hypertriglyceridemia, metabolic disorders, free radical generated due to reactive oxygen and carbonyl groups, ionizing radiation, advanced glycation end products, kidney disease, renal complications and kidney stone disease.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: December 20, 2016
    Assignee: CELLIX BIO PRIVATE LIMITED
    Inventor: Mahesh Kandula
  • Publication number: 20160361322
    Abstract: Provided oral testosterone undecanoate compositions can be administered to hypogonadal males with a meal without the fat content of the meal substantially effecting bioavailability.
    Type: Application
    Filed: June 15, 2016
    Publication date: December 15, 2016
    Applicant: Lipocine Inc.
    Inventors: Mahesh V. Patel, Nachiappan Chidambaram, Satish K. Nachaegari
  • Publication number: 20160364722
    Abstract: A method for alternate primary account number generation is described. The method comprises receiving, from a device, an input data string containing sensitive data. The input data string comprises a first portion, a second portion, and a third portion. A plurality of values is generated using the second portion of the input data string, wherein each of the plurality of values are of a predetermined amount of numbers, each of the plurality of values having a corresponding key. A first key is selected, based on the second portion, from the plurality of values. A second key is generated using the first key. An output value is selected, based on the second key, from the plurality of values. An output data string is generated using the first portion, the output value, and the third portion.
    Type: Application
    Filed: June 9, 2015
    Publication date: December 15, 2016
    Inventors: Pradeep G. NAIR, Mahesh M. CHITRAGAR, Vishwanatha SALIAN
  • Publication number: 20160362619
    Abstract: The present invention relates to inhibition of high temperature naphthenic acid corrosion occurring in hydrocarbon processing units.
    Type: Application
    Filed: August 23, 2016
    Publication date: December 15, 2016
    Inventor: Mahesh SUBRAMANIYAM
  • Publication number: 20160365780
    Abstract: A high rotor pole switched reluctance machine (HRSRM) employs an axial and radial mirroring concept and is represented by a first Multiple Rotor Pole (MRP) formula and second Multiple Stator Pole (MSP) formula. A multiple rotor HRSRM comprises at least two rotors each having a plurality of rotor poles and at least one stator having a plurality of stator poles. The at least two rotors and the at least one stator are positioned about a central axis with the stator placed between, and laterally adjacent to the rotors. A multiple stator HRSRM comprises at least two stators having a plurality of stator poles and at least one rotor having a plurality of rotor poles. The at least two stators and at least one rotor are positioned about a central axis with the rotor placed between and laterally adjacent to the stators.
    Type: Application
    Filed: February 4, 2016
    Publication date: December 15, 2016
    Inventors: Mahesh Krishnamurthy, Mark Johnston, Trevor Creary, Piyush Desai
  • Publication number: 20160365135
    Abstract: Circuits and methods are described for a DDR memory controller where two different DQS gating modes are utilized. These gating modes together ensure that the DQS signal, driven by a DDR memory to the memory controller, is only available when read data is valid. Two types of gating logic are used: Initial DQS gating logic, and Functional DQS gating logic. The Initial gating logic has additional timing margin in the Initial DQS gating value to allow for the unknown round trip timing during initial bit levelling calibration. DQS functional gating is then optimized during further calibration to gate DQS precisely as latency and phase calibration are performed, resulting in a precise gating value for Functional DQS gating. Providing dual gating modes is especially useful when data capture is performed at half the DQS frequency in view of rising clock rates for DDR memories.
    Type: Application
    Filed: August 26, 2016
    Publication date: December 15, 2016
    Inventors: Mahesh GOPALAN, David WU, Venkat IYER