Patents by Inventor Mark D. Jaffe

Mark D. Jaffe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ON CHIP ANTENNA WITH OPENING
    Publication number: 20160308270
    Abstract: Approaches for an on-chip antenna are provided. A method includes forming an antenna in an insulator layer at a front side of a substrate. The method also includes forming a trench in the substrate underneath the antenna. The method further includes forming a fill material in the trench. The substrate is composed of a material having a first dielectric constant. The fill material has a second dielectric constant that is less than the first dielectric constant.
    Type: Application
    Filed: April 15, 2015
    Publication date: October 20, 2016
    Inventors: Hanyi Ding, Mark D. Jaffe, Alvin J. Joseph, Anthony K. Stamper
  • Backside device contact
    Patent number: 9455187
    Abstract: Methods for fabricating a backside device contact using a silicon-on-insulator substrate that includes a device layer, a buried insulator layer, and a handle wafer. A trench is formed that extends through the device layer or a trench isolation region in the device layer and that further extends partially through the buried insulator layer. A sacrificial material is deposited in the trench and, thereafter, at least one dielectric layer is formed on the device layer. An opening is formed in the at least one dielectric layer that communicates with the trench. After the opening is formed, the sacrificial material is removed from the trench with access through the opening. After the sacrificial material is removed from the trench, the trench is filled with a contact plug and the opening is filled with a contact coupled with the contact plug.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: September 27, 2016
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey P. Gambino, Mark D. Jaffe, Steven M. Shank, Anthony K. Stamper
  • SEMICONDUCTOR STRUCTURE WITH AIRGAP
    Publication number: 20160211167
    Abstract: A field effect transistor (FET) with an underlying airgap and methods of manufacture are disclosed. The method includes forming an amorphous layer at a predetermined depth of a substrate. The method further includes forming an airgap in the substrate under the amorphous layer. The method further includes forming a completely isolated transistor in an active region of the substrate, above the amorphous layer and the airgap.
    Type: Application
    Filed: March 29, 2016
    Publication date: July 21, 2016
    Inventors: Mark D. JAFFE, Alvin J. JOSEPH, Qizhi LIU, Anthony K. STAMPER
  • Silicon waveguide on bulk silicon substrate and methods of forming
    Patent number: 9385022
    Abstract: Various methods include: forming an optical waveguide in a bulk silicon layer, the optical waveguide including a set of shallow trench isolation (STI) regions overlying a silicon substrate region; ion implanting the silicon substrate to amorphize a portion of the silicon substrate; forming a set of trenches through the STI regions and into the underlying silicon substrate region; undercut etching the silicon substrate region under the STI regions through the set of trenches to form a set of cavities, wherein the at least partially amorphized portion of the silicon substrate etches at a rate less than an etch rate of the silicon substrate; and sealing the set of cavities.
    Type: Grant
    Filed: May 21, 2014
    Date of Patent: July 5, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Mark D. Jaffe, Alvin J. Joseph, Qizhi Liu, Anthony K. Stamper
  • Semiconductor structure with airgap
    Patent number: 9349793
    Abstract: A field effect transistor (FET) with an underlying airgap and methods of manufacture are disclosed. The method includes forming an amorphous layer at a predetermined depth of a substrate. The method further includes forming an airgap in the substrate under the amorphous layer. The method further includes forming a completely isolated transistor in an active region of the substrate, above the amorphous layer and the airgap.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: May 24, 2016
    Assignee: International Business Machines Corporation
    Inventors: Mark D. Jaffe, Alvin J. Joseph, Qizhi Liu, Anthony K. Stamper
  • SEMICONDUCTOR STRUCTURE WITH AIRGAP
    Publication number: 20160093523
    Abstract: A field effect transistor (FET) with an underlying airgap and methods of manufacture are disclosed. The method includes forming an amorphous layer at a predetermined depth of a substrate. The method further includes forming an airgap in the substrate under the amorphous layer. The method further includes forming a completely isolated transistor in an active region of the substrate, above the amorphous layer and the airgap.
    Type: Application
    Filed: December 9, 2015
    Publication date: March 31, 2016
    Inventors: Mark D. JAFFE, Alvin J. JOSEPH, Qizhi LIU, Anthony K. STAMPER
  • Tunable filter structures and design structures
    Patent number: 9300272
    Abstract: Tunable filter structures, methods of manufacture and design structures are disclosed. The method of forming a filter structure includes forming a piezoelectric resonance filter over a cavity structure. The forming of the piezoelectric resonance filter includes: forming an upper electrode on one side of a piezoelectric material; and forming a lower electrode on an opposing side of the piezoelectric material. The method further includes forming a micro-electro-mechanical structure (MEMS) cantilever beam at a location in which, upon actuation, makes contact with the piezoelectric resonance filter.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: March 29, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: James W. Adkisson, Panglijen Candra, Thomas J. Dunbar, Mark D. Jaffe, Robert K. Leidy, Anthony K. Stamper
  • PHOTODIODE STRUCTURES
    Publication number: 20160079451
    Abstract: Photodiode structures and methods of manufacture are disclosed. The method includes forming a waveguide structure in a dielectric layer. The method further includes forming a Ge material in proximity to the waveguide structure in a back end of the line (BEOL) metal layer. The method further includes crystallizing the Ge material into a crystalline Ge structure by a low temperature annealing process with a metal layer in contact with the Ge material.
    Type: Application
    Filed: September 11, 2014
    Publication date: March 17, 2016
    Inventors: John J. ELLIS-MONAGHAN, Jeffrey P. GAMBINO, Mark D. JAFFE, Kirk D. PETERSON
  • SWITCHABLE FILTERS AND DESIGN STRUCTURES
    Publication number: 20160072469
    Abstract: Switchable and/or tunable filters, methods of manufacture and design structures are disclosed herein. The method of forming the filters includes forming at least one piezoelectric filter structure comprising a plurality of electrodes formed on a piezoelectric substrate. The method further includes forming a micro-electro-mechanical structure (MEMS) comprising a MEMS beam formed above the piezoelectric substrate and at a location in which, upon actuation, the MEMS beam shorts the piezoelectric filter structure by contacting at least one of the plurality of electrodes.
    Type: Application
    Filed: November 13, 2015
    Publication date: March 10, 2016
    Inventors: James W. ADKISSON, Panglijen CANDRA, Thomas J. DUNBAR, Jeffrey P. GAMBINO, Mark D. JAFFE, Anthony K. STAMPER, Randy L. WOLF
  • SEMICONDUCTOR STRUCTURE WITH AIRGAP
    Publication number: 20160071925
    Abstract: A field effect transistor (FET) with an underlying airgap and methods of manufacture are disclosed. The method includes forming an amorphous layer at a predetermined depth of a substrate. The method further includes forming an airgap in the substrate under the amorphous layer. The method further includes forming a completely isolated transistor in an active region of the substrate, above the amorphous layer and the airgap.
    Type: Application
    Filed: September 8, 2014
    Publication date: March 10, 2016
    Inventors: Mark D. JAFFE, Alvin J. JOSEPH, Qizhi LIU, Anthony K. STAMPER
  • Switchable filters and design structures
    Patent number: 9252733
    Abstract: Switchable and/or tunable filters, methods of manufacture and design structures are disclosed herein. The method of forming the filters includes forming at least one piezoelectric filter structure comprising a plurality of electrodes formed on a piezoelectric substrate. The method further includes forming a micro-electro-mechanical structure (MEMS) comprising a MEMS beam formed above the piezoelectric substrate and at a location in which, upon actuation, the MEMS beam shorts the piezoelectric filter structure by contacting at least one of the plurality of electrodes.
    Type: Grant
    Filed: October 24, 2014
    Date of Patent: February 2, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James W. Adkisson, Panglijen Candra, Thomas J. Dunbar, Jeffrey P. Gambino, Mark D. Jaffe, Anthony K. Stamper, Randy L. Wolf
  • Method of manufacturing switchable filters
    Patent number: 9225311
    Abstract: Switchable and/or tunable filters, methods of manufacture and design structures are provided. The method of forming the filters includes forming at least one piezoelectric filter structure comprising a plurality of electrodes formed to be in contact with at least one piezoelectric substrate. The method further includes forming a micro-electro-mechanical structure (MEMS) comprising a MEMS beam in which, upon actuation, the MEMS beam will turn on the at least one piezoelectric filter structure by interleaving electrodes in contact with the piezoelectric substrate or sandwiching the at least one piezoelectric substrate between the electrodes.
    Type: Grant
    Filed: February 21, 2012
    Date of Patent: December 29, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James W. Adkisson, Panglijen Candra, Thomas J. Dunbar, Mark D. Jaffe, Anthony K. Stamper, Randy L. Wolf
  • SWITCHABLE FILTERS AND DESIGN STRUCTURES
    Publication number: 20150372660
    Abstract: Switchable and/or tunable filters, methods of manufacture and design structures are disclosed herein. The method of forming the filters includes forming at least one piezoelectric filter structure comprising a plurality of electrodes formed to be in contact with at least one piezoelectric substrate. The method further includes forming a micro-electro-mechanical structure (MEMS) comprising a MEMS beam in which, upon actuation, the MEMS beam will turn on the at least one piezoelectric filter structure by interleaving electrodes in contact with the piezoelectric substrate or sandwiching the at least one piezoelectric substrate between the electrodes.
    Type: Application
    Filed: August 31, 2015
    Publication date: December 24, 2015
    Inventors: James W. ADKISSON, Panglijen CANDRA, Thomas J. DUNBAR, Mark D. JAFFE, Anthony K. STAMPER, Randy L. WOLF
  • Thin body switch transistor
    Patent number: 9214561
    Abstract: An integrated recessed thin body field effect transistor (FET) and methods of manufacture are disclosed. The method includes recessing a portion of a semiconductor material. The method further includes forming at least one gate structure within the recessed portion of the semiconductor material.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: December 15, 2015
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Michel J. Abou-Khalil, Alan B. Botula, Mark D. Jaffe, Alvin J. Joseph, James A. Slinkman
  • SILICON WAVEGUIDE ON BULK SILICON SUBSTRATE AND METHODS OF FORMING
    Publication number: 20150340273
    Abstract: Various methods include: forming an optical waveguide in a bulk silicon layer, the optical waveguide including a set of shallow trench isolation (STI) regions overlying a silicon substrate region; ion implanting the silicon substrate to amorphize a portion of the silicon substrate; forming a set of trenches through the STI regions and into the underlying silicon substrate region; undercut etching the silicon substrate region under the STI regions through the set of trenches to form a set of cavities, wherein the at least partially amorphized portion of the silicon substrate etches at a rate less than an etch rate of the silicon substrate; and sealing the set of cavities.
    Type: Application
    Filed: May 21, 2014
    Publication date: November 26, 2015
    Applicant: International Business Machines Corporation
    Inventors: Mark D. Jaffe, Alvin J. Joseph, Qizhi Liu, Anthony K. Stamper
  • SWITCHABLE FILTERS AND DESIGN STRUCTURES
    Publication number: 20150318839
    Abstract: Switchable and/or tunable filters, methods of manufacture and design structures are disclosed herein. The method of forming the filters includes forming at least one piezoelectric filter structure comprising a plurality of electrodes formed on a piezoelectric substrate. The method further includes forming a fixed electrode with a plurality of fingers on the piezoelectric substrate. The method further includes forming a moveable electrode with a plurality of fingers over the piezoelectric substrate. The method further includes forming actuators aligned with one or more of the plurality of fingers of the moveable electrode.
    Type: Application
    Filed: June 30, 2015
    Publication date: November 5, 2015
    Inventors: James W. ADKISSON, Panglijen CANDRA, Thomas J. DUNBAR, Jeffrey P. GAMBINO, Mark D. JAFFE, Anthony K. STAMPER, Randy L. WOLF
  • Encapsulated sensors
    Patent number: 9171971
    Abstract: An encapsulated sensors and methods of manufacture are disclosed herein. The method includes forming an amorphous or polycrystalline material in contact with a layer of seed material. The method further includes forming an expansion space for the amorphous or polycrystalline material. The method further includes forming an encapsulation structure about the amorphous or polycrystalline material. The method further includes crystallizing the amorphous or polycrystalline material by a thermal anneal process such that the amorphous or polycrystalline material expands within the expansion space.
    Type: Grant
    Filed: October 31, 2013
    Date of Patent: October 27, 2015
    Assignee: GLOBALFOUNDRIES U.S. 2 LLC
    Inventors: John J. Ellis-Monaghan, Jeffrey P. Gambino, Mark D. Jaffe, William J. Murphy, Kirk D. Peterson, Steven M. Shank
  • High linearity SOI wafer for low-distortion circuit applications
    Patent number: 9165819
    Abstract: According to a method herein, a first side of a substrate is implanted with a first material to change a crystalline structure of the first side of the substrate from a first crystalline state to a second crystalline state, after the first material is implanted. A second material is deposited on the first side of the substrate, after the first material is implanted. A first side of an insulator layer is bonded to the second material on the first side of the substrate. Integrated circuit devices are formed on a second side of the insulator layer, opposite the first side of the insulator layer, after the insulator layer is bonded to the second material. The integrated circuit devices are thermally annealed. The first material maintains the second crystalline state of the first side of the substrate during the annealing.
    Type: Grant
    Filed: November 18, 2014
    Date of Patent: October 20, 2015
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Alan B. Botula, Jeffrey E. Hanrahan, Mark D. Jaffe, Alvin J. Joseph, Dale W. Martin, Gerd Pfeiffer, James A. Slinkman
  • BACKSIDE INTEGRATION OF RF FILTERS FOR RF FRONT END MODULES AND DESIGN STRUCTURE
    Publication number: 20150243879
    Abstract: A design structure for an integrated radio frequency (RF) filter on a backside of a semiconductor substrate includes: a device on a first side of a substrate; a radio frequency (RF) filter on a backside of the substrate; and at least one substrate conductor extending from the front side of the substrate to the backside of the substrate and electrically coupling the RF filter to the device.
    Type: Application
    Filed: May 14, 2015
    Publication date: August 27, 2015
    Inventors: James W. Adkisson, Panglijen Candra, Thomas J. Dunbar, Jeffrey P. Gambino, Mark D. Jaffe, Anthony K. Stamper, Randy L. Wolf
  • TUNABLE FILTER STRUCTURES AND DESIGN STRUCTURES
    Publication number: 20150244345
    Abstract: Tunable filter structures, methods of manufacture and design structures are disclosed. The method of forming a filter structure includes forming a piezoelectric resonance filter over a cavity structure. The forming of the piezoelectric resonance filter includes: forming an upper electrode on one side of a piezoelectric material; and forming a lower electrode on an opposing side of the piezoelectric material. The method further includes forming a micro-electro-mechanical structure (MEMS) cantilever beam at a location in which, upon actuation, makes contact with the piezoelectric resonance filter.
    Type: Application
    Filed: April 30, 2015
    Publication date: August 27, 2015
    Inventors: James W. ADKISSON, Panglijen CANDRA, Thomas J. DUNBAR, Mark D. JAFFE, Robert K. LEIDY, Anthony K. STAMPER