Patents by Inventor Masashi Fujita
Masashi Fujita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200168710Abstract: A semiconductor device in which a transistor has the characteristic of low off-state current is provided. The transistor comprises an oxide semiconductor layer having a channel region whose channel width is smaller than 70 nm. A temporal change in off-state current of the transistor over time can be represented by Formula (a2). In Formula (a2), IOFF represents the off-state current, t represents time during which the transistor is off, ? and ? are constants, ? is a constant that satisfies 0<??1, and CS is a constant that represents load capacitance of a source or a drain.Type: ApplicationFiled: January 29, 2020Publication date: May 28, 2020Inventors: Masashi TSUBUKU, Shunpei YAMAZAKI, Hidetomo KOBAYASHI, Kazuaki OHSHIMA, Masashi FUJITA, Toshihiko TAKEUCHI
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Publication number: 20200112313Abstract: An object is to provide a semiconductor device that can maintain the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units even after supply of power supply voltage is stopped. Another object is to provide a semiconductor device in which the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units can be changed at high speed. In a reconfigurable circuit, an oxide semiconductor is used for a semiconductor element that stores data on the circuit configuration, connection relation, or the like. Specifically, the oxide semiconductor is used for a channel formation region of the semiconductor element.Type: ApplicationFiled: December 6, 2019Publication date: April 9, 2020Inventors: Masashi FUJITA, Yutaka SHIONOIRI, Kiyoshi KATO, Hidetomo KOBAYASHI
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Patent number: 10559667Abstract: A semiconductor device in which a transistor has the characteristic of low off-state current is provided. The transistor comprises an oxide semiconductor layer having a channel region whose channel width is smaller than 70 nm. A temporal change in off-state current of the transistor over time can be represented by Formula (a2). In Formula (a2), IOFF represents the off-state current, t represents time during which the transistor is off, ? and ? are constants, ? is a constant that satisfies 0<??1, and CS is a constant that represents load capacitance of a source or a drain.Type: GrantFiled: August 20, 2015Date of Patent: February 11, 2020Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masashi Tsubuku, Shunpei Yamazaki, Hidetomo Kobayashi, Kazuaki Ohshima, Masashi Fujita, Toshihiko Takeuchi
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Patent number: 10505547Abstract: An object is to provide a semiconductor device that can maintain the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units even after supply of power supply voltage is stopped. Another object is to provide a semiconductor device in which the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units can be changed at high speed. In a reconfigurable circuit, an oxide semiconductor is used for a semiconductor element that stores data on the circuit configuration, connection relation, or the like. Specifically, the oxide semiconductor is used for a channel formation region of the semiconductor element.Type: GrantFiled: June 1, 2017Date of Patent: December 10, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masashi Fujita, Yutaka Shionoiri, Kiyoshi Kato, Hidetomo Kobayashi
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Patent number: 10460683Abstract: To provide a novel semiconductor device or display device. The semiconductor device includes a decoder circuit, an amplifier circuit, and an arithmetic circuit. The amplifier circuit includes a first amplifier and a second amplifier. One of the first amplifier and the second amplifier has a function of inspecting an output of the other of the first amplifier and the second amplifier. The arithmetic circuit has a function of calculating an error of a potential output from the first amplifier or the second amplifier, on the basis of a result of the inspection. The decoder circuit has a function of correcting a video signal input to the decoder circuit by subtracting the error of the potential from the video signal.Type: GrantFiled: August 23, 2017Date of Patent: October 29, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Masashi Fujita
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Publication number: 20190300367Abstract: In a method for generating a chlorine dioxide gas, the chlorine dioxide gas is continuously generated from a gel composition obtained by adding a gelling activator containing a gas generating agent, a gas generation controlling agent containing a carbonate and hydrogen peroxide, a gas generation adjusting agent, and a water-absorbent resin to a chlorite aqueous solution. This provides a method for generating a chlorine dioxide gas, a kit for generating a chlorine dioxide gas, and a gel composition which suppress the initial rapid generation of the chlorine dioxide gas and stably hold the generation of the chlorine dioxide gas for an extremely long time.Type: ApplicationFiled: April 25, 2018Publication date: October 3, 2019Applicant: AMATERA, INC.Inventors: Hiromasa FUJITA, Tetsuhiro FUJITA, Masashi FUJITA, Hiroshi TAKATOMI
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Patent number: 10290573Abstract: A semiconductor device with low power consumption is provided. The semiconductor device can serve as a current output DA converter. The semiconductor device converts a current corresponding to a digital signal into a voltage and then holds the voltage, which allows output of the analog voltage even after stopping supply of the current. A plurality of circuits that converts a current into a voltage is provided, whereby a settling time for changing the analog output voltage is reduced.Type: GrantFiled: June 22, 2016Date of Patent: May 14, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Masashi Fujita
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Patent number: 10290522Abstract: An object of the present invention is to provide a charged particle beam device that suppresses the influence of an external electromagnetic wave, even when a shielding member, such as a vacuum valve, is in the open state. To achieve the above object, a charged particle beam device including a vacuum chamber (111) having an opening (104) that surrounds a sample delivery path is proposed. The charged particle beam device includes a conductive material (118) surrounding the opening (104) for conduction between the vacuum chamber (111) and a conductive member (106) disposed on the atmosphere side. According to an embodiment of the present invention, it is possible to restrict an electromagnetic wave (117) from reaching the sample chamber via the delivery path.Type: GrantFiled: March 19, 2014Date of Patent: May 14, 2019Assignee: Hitachi High-Technologies CorporationInventors: Masashi Fujita, Masahiro Tsunoda, Katsunori Onuki, Katsuya Aibara, Seiichi Shindo, Takaaki Nishimori
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Patent number: 9972389Abstract: Provided is a highly reliable semiconductor device, a semiconductor device with a reduced circuit area, a memory element having favorable characteristics, a highly reliable memory element, or a memory element with increased storage capacity per unit volume. A semiconductor device includes a capacitor and a switching element. The capacitor includes a first electrode, a second electrode, and a dielectric. The dielectric is positioned between the first electrode and the second electrode. The switching element includes a first terminal and a second terminal. The first terminal is electrically connected to the first electrode. The following steps are sequentially performed: a first step of turning on the switching element in a first period, a second step of turning off the switching element in a second period, and a third step of turning on the switching element in a third period.Type: GrantFiled: March 6, 2017Date of Patent: May 15, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masashi Tsubuku, Masashi Fujita
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Publication number: 20180061335Abstract: To provide a novel semiconductor device or display device. The semiconductor device includes a decoder circuit, an amplifier circuit, and an arithmetic circuit. The amplifier circuit includes a first amplifier and a second amplifier. One of the first amplifier and the second amplifier has a function of inspecting an output of the other of the first amplifier and the second amplifier. The arithmetic circuit has a function of calculating an error of a potential output from the first amplifier or the second amplifier, on the basis of a result of the inspection. The decoder circuit has a function of correcting a video signal input to the decoder circuit by subtracting the error of the potential from the video signal.Type: ApplicationFiled: August 23, 2017Publication date: March 1, 2018Inventor: Masashi FUJITA
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Publication number: 20170338349Abstract: A semiconductor device that can measure a minute current. The semiconductor device includes a first transistor, a second transistor, a node, and a capacitor. The first transistor includes an oxide semiconductor in a channel formation region. The node is electrically connected to a gate of the second transistor and a first terminal of the capacitor. The node is brought into an electrically floating state by turning off the first transistor after a potential V0 is supplied. Change in a potential VFN of the node over time is expressed by Formula (1). In Formula (1), t is elapsed time after the node is brought into the electrically floating state, ? is a constant with a unit of time, and ? is a constant greater than or equal to 0.4 and less than or equal to 0.6.Type: ApplicationFiled: May 3, 2017Publication date: November 23, 2017Inventors: Masashi TSUBUKU, Kazuaki OHSHIMA, Masashi FUJITA, Daigo SHIMADA, Tsutomu MURAKAWA
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Publication number: 20170272079Abstract: An object is to provide a semiconductor device that can maintain the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units even after supply of power supply voltage is stopped. Another object is to provide a semiconductor device in which the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units can be changed at high speed. In a reconfigurable circuit, an oxide semiconductor is used for a semiconductor element that stores data on the circuit configuration, connection relation, or the like. Specifically, the oxide semiconductor is used for a channel formation region of the semiconductor element.Type: ApplicationFiled: June 1, 2017Publication date: September 21, 2017Inventors: Masashi FUJITA, Yutaka SHIONOIRI, Kiyoshi KATO, Hidetomo KOBAYASHI
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Patent number: 9762246Abstract: An object is to provide a semiconductor device that can maintain the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units even after supply of power supply voltage is stopped. Another object is to provide a semiconductor device in which the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units can be changed at high speed. In a reconfigurable circuit, an oxide semiconductor is used for a semiconductor element that stores data on the circuit configuration, connection relation, or the like. Specifically, the oxide semiconductor is used for a channel formation region of the semiconductor element.Type: GrantFiled: May 11, 2012Date of Patent: September 12, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masashi Fujita, Yutaka Shionoiri, Kiyoshi Kato, Hidetomo Kobayashi
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Patent number: 9704893Abstract: A low-power-consumption semiconductor device or the like is provided. Charge is accumulated in a node connected to a capacitor for a certain period to perform a current-voltage conversion. A gate of a transistor is connected to the node and the potential of one of a source and a drain of the transistor is changed gradually or continuously so that the potential is read when the transistor is turned on. The threshold voltage of the transistor and the capacitance value of the node are measured, so that the current-voltage conversion is performed more precisely.Type: GrantFiled: August 3, 2016Date of Patent: July 11, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Masashi Fujita
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Publication number: 20170178728Abstract: Provided is a highly reliable semiconductor device, a semiconductor device with a reduced circuit area, a memory element having favorable characteristics, a highly reliable memory element, or a memory element with increased storage capacity per unit volume. A semiconductor device includes a capacitor and a switching element. The capacitor includes a first electrode, a second electrode, and a dielectric. The dielectric is positioned between the first electrode and the second electrode. The switching element includes a first terminal and a second terminal. The first terminal is electrically connected to the first electrode. The following steps are sequentially performed: a first step of turning on the switching element in a first period, a second step of turning off the switching element in a second period, and a third step of turning on the switching element in a third period.Type: ApplicationFiled: March 6, 2017Publication date: June 22, 2017Inventors: Masashi TSUBUKU, Masashi FUJITA
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Patent number: 9647132Abstract: A semiconductor device that can measure a minute current. The semiconductor device includes a first transistor, a second transistor, a node, and a capacitor. The first transistor includes an oxide semiconductor in a channel formation region. The node is electrically connected to a gate of the second transistor and a first terminal of the capacitor. The node is brought into an electrically floating state by turning off the first transistor after a potential V0 is supplied. Change in a potential VFN of the node over time is expressed by Formula (1). In Formula (1), t is elapsed time after the node is brought into the electrically floating state, ? is a constant with a unit of time, and ? is a constant greater than or equal to 0.4 and less than or equal to 0.6.Type: GrantFiled: January 27, 2016Date of Patent: May 9, 2017Assignee: Semiconductor Energy Laboratory Co., LTD.Inventors: Masashi Tsubuku, Kazuaki Ohshima, Masashi Fujita, Daigo Shimada, Tsutomu Murakawa
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Patent number: 9633710Abstract: Provided is a highly reliable semiconductor device, a semiconductor device with a reduced circuit area, a memory element having favorable characteristics, a highly reliable memory element, or a memory element with increased storage capacity per unit volume. A semiconductor device includes a capacitor and a switching element. The capacitor includes a first electrode, a second electrode, and a dielectric. The dielectric is positioned between the first electrode and the second electrode. The switching element includes a first terminal and a second terminal. The first terminal is electrically connected to the first electrode. The following steps are sequentially performed: a first step of turning on the switching element in a first period, a second step of turning off the switching element in a second period, and a third step of turning on the switching element in a third period.Type: GrantFiled: January 15, 2016Date of Patent: April 25, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masashi Tsubuku, Masashi Fujita
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Patent number: 9601307Abstract: The present invention provides a high-throughput scanning electron microscope in which a wafer (9) is held by an electrostatic chuck (10), an image is obtained using an electron beam, and the wafer surface is measured, wherein even in a case where the temperature of the wafer (9) is changed due to the environmental temperature the electron scanning microscope is capable of preventing any loss in resolution or the deterioration of the measurement reproducibility caused by thermal shrinkage accompanied by temperature change of the wafer (9). A drill hole is provided on the rear surface of the electrostatic chuck (10), and a thermometer (34) is secured in place so that the front end is brought into elastic contact with the bottom surface of the drill hole.Type: GrantFiled: February 5, 2014Date of Patent: March 21, 2017Assignee: Hitachi High-Technologies CorporationInventors: Seiichiro Kanno, Masashi Fujita, Naoya Ishigaki, Makoto Nishihara, Kumiko Shimizu
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Publication number: 20170040344Abstract: A low-power-consumption semiconductor device or the like is provided. Charge is accumulated in a node connected to a capacitor for a certain period to perform a current-voltage conversion. A gate of a transistor is connected to the node and the potential of one of a source and a drain of the transistor is changed gradually or continuously so that the potential is read when the transistor is turned on. The threshold voltage of the transistor and the capacitance value of the node are measured, so that the current-voltage conversion is performed more precisely.Type: ApplicationFiled: August 3, 2016Publication date: February 9, 2017Inventor: Masashi FUJITA
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Patent number: 9543113Abstract: The present invention explains a charged-particle beam device for the purpose of highly accurately measuring electrostatic charge of a sample in a held state by an electrostatic chuck (105). In order to attain the object, according to the present invention, there is proposed a charged-particle beam device including an electrostatic chuck (105) for holding a sample on which a charged particle beam is irradiated and a sample chamber (102) in which the electrostatic chuck (105) is set. The charged-particle beam device includes a potential measuring device that measures potential on a side of an attraction surface for the sample of the electrostatic chuck (105) and a control device that performs potential measurement by the potential measuring device in a state in which the sample is attracted by the electrostatic chuck (105).Type: GrantFiled: January 10, 2014Date of Patent: January 10, 2017Assignee: Hitachi High-Technologies CorporationInventors: Yasushi Ebizuka, Seiichiro Kanno, Naoya Ishigaki, Masashi Fujita