Patents by Inventor Masashi Fujita

Masashi Fujita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170005669
    Abstract: A semiconductor device with low power consumption is provided. The semiconductor device can serve as a current output DA converter. The semiconductor device converts a current corresponding to a digital signal into a voltage and then holds the voltage, which allows output of the analog voltage even after stopping supply of the current. A plurality of circuits that converts a current into a voltage is provided, whereby a settling time for changing the analog output voltage is reduced.
    Type: Application
    Filed: June 22, 2016
    Publication date: January 5, 2017
    Inventor: Masashi FUJITA
  • Patent number: 9490267
    Abstract: A first field-effect transistor provided over a substrate in which an insulating region is provided over a first semiconductor region and a second semiconductor region is provided over the insulating region; an insulating layer provided over the substrate; a second field-effect transistor that is provided one flat surface of the insulating layer and includes an oxide semiconductor layer; and a control terminal are provided. The control terminal is formed in the same step as a source and a drain of the second field-effect transistor, and a voltage for controlling a threshold voltage of the first field-effect transistor is supplied to the control terminal.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: November 8, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi Fujita, Yutaka Shionoiri, Hiroyuki Tomatsu, Hidetomo Kobayashi
  • Publication number: 20160225772
    Abstract: A semiconductor device that can measure a minute current. The semiconductor device includes a first transistor, a second transistor, a node, and a capacitor. The first transistor includes an oxide semiconductor in a channel formation region. The node is electrically connected to a gate of the second transistor and a first terminal of the capacitor. The node is brought into an electrically floating state by turning off the first transistor after a potential V0 is supplied. Change in a potential VFN of the node over time is expressed by Formula (1). In Formula (1), t is elapsed time after the node is brought into the electrically floating state, ? is a constant with a unit of time, and ? is a constant greater than or equal to 0.4 and less than or equal to 0.6.
    Type: Application
    Filed: January 27, 2016
    Publication date: August 4, 2016
    Inventors: Masashi TSUBUKU, Kazuaki OHSHIMA, Masashi FUJITA, Daigo SHIMADA, Tsutomu MURAKAWA
  • Publication number: 20160217830
    Abstract: Provided is a highly reliable semiconductor device, a semiconductor device with a reduced circuit area, a memory element having favorable characteristics, a highly reliable memory element, or a memory element with increased storage capacity per unit volume. A semiconductor device includes a capacitor and a switching element. The capacitor includes a first electrode, a second electrode, and a dielectric. The dielectric is positioned between the first electrode and the second electrode. The switching element includes a first terminal and a second terminal. The first terminal is electrically connected to the first electrode. The following steps are sequentially performed: a first step of turning on the switching element in a first period, a second step of turning off the switching element in a second period, and a third step of turning on the switching element in a third period.
    Type: Application
    Filed: January 15, 2016
    Publication date: July 28, 2016
    Inventors: Masashi TSUBUKU, Masashi FUJITA
  • Patent number: 9355687
    Abstract: A storage circuit includes a volatile storage portion in which storage of a data signal is controlled by a clock signal and an inverted clock signal, and a nonvolatile storage portion in which a data signal supplied to the volatile storage portion can be held even after supply of power supply voltage is stopped. A wiring which supplies a power supply voltage and is connected to a protective circuit provided for a wiring for supplying the clock signal is provided separately from a wiring which supplies a power supply voltage and which is connected to the storage circuit. The timing of stop and restart of supply of the power supply voltage supplied to the wiring which is connected to the protective circuit is different from that of stop and restart of supply of the power supply voltage supplied to the wiring which is connected to the storage circuit.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: May 31, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Masashi Fujita
  • Publication number: 20160133433
    Abstract: An object of the present invention is to provide a charged particle beam device that suppresses the influence of an external electromagnetic wave, even when a shielding member, such as a vacuum valve, is in the open state. To achieve the above object, a charged particle beam device including a vacuum chamber (111) having an opening (104) that surrounds a sample delivery path is proposed. The charged particle beam device includes a conductive material (118) surrounding the opening (104) for conduction between the vacuum chamber (111) and a conductive member (106) disposed on the atmosphere side. According to an embodiment of the present invention, it is possible to restrict an electromagnetic wave (117) from reaching the sample chamber via the delivery path.
    Type: Application
    Filed: March 19, 2014
    Publication date: May 12, 2016
    Inventors: Masashi FUJITA, Masahiro TSUNODA, Katsunori ONUKI, Katsuya AIBARA, Seiichi SHINDO, Takaaki NISHIMORI
  • Publication number: 20160054362
    Abstract: A current measurement method with which an extremely low current can be measured is provided. In the method, a charge written to a first terminal of a capacitor through a transistor under test is retained, data on the correspondence between a potential V of the first terminal of the capacitor and Time t is generated, and a stretched exponential function represented by Formula (a1) is fitted to the data to determine parameters of Formula (a1). The derivative of Formula (a1) with respect to time gives a stretched exponential function describing an off-state current of the transistor under test. The potential of the first terminal of the capacitor is measured using an on-state current of a transistor whose gate is connected to the first terminal of the capacitor.
    Type: Application
    Filed: August 20, 2015
    Publication date: February 25, 2016
    Inventors: Masashi TSUBUKU, Shunpei YAMAZAKI, Hidetomo KOBAYASHI, Kazuaki OHSHIMA, Masashi FUJITA, Toshihiko TAKEUCHI
  • Publication number: 20150371814
    Abstract: The present invention provides a high-throughput scanning electron microscope in which a wafer (9) is held by an electrostatic chuck (10), an image is obtained using an electron beam, and the wafer surface is measured, wherein even in a case where the temperature of the wafer (9) is changed due to the environmental temperature the electron scanning microscope is capable of preventing any loss in resolution or the deterioration of the measurement reproducibility caused by thermal shrinkage accompanied by temperature change of the wafer (9). A drill hole is provided on the rear surface of the electrostatic chuck (10), and a thermometer (34) is secured in place so that the front end is brought into elastic contact with the bottom surface of the drill hole.
    Type: Application
    Filed: February 5, 2014
    Publication date: December 24, 2015
    Inventors: Seiichiro KANNO, Masashi FUJITA, Naoya ISHIGAKI, Makoto NISHIHARA, Kumiko SHIMIZU
  • Publication number: 20150357156
    Abstract: The present invention explains a charged-particle beam device for the purpose of highly accurately measuring electrostatic charge of a sample in a held state by an electrostatic chuck (105). In order to attain the object, according to the present invention, there is proposed a charged-particle beam device including an electrostatic chuck (105) for holding a sample on which a charged particle beam is irradiated and a sample chamber (102) in which the electrostatic chuck (105) is set. The charged-particle beam device includes a potential measuring device that measures potential on a side of an attraction surface for the sample of the electrostatic chuck (105) and a control device that performs potential measurement by the potential measuring device in a state in which the sample is attracted by the electrostatic chuck (105).
    Type: Application
    Filed: January 10, 2014
    Publication date: December 10, 2015
    Applicant: HITACHI HIGH-TECHNOLOGIES CORPORATION
    Inventors: Yasushi EBIZUKA, Seiichiro KANNO, Naoya ISHIGAKI, Masashi FUJITA
  • Patent number: 9115707
    Abstract: An inverter module and an integrated-inverter electric compressor using the same, which can eliminate noise interference, noise leakage, and the like attributable to a smoothing capacitor accommodated therein and which can be reduced in size and weight is provided. An inverter module (11) includes a resin module case (17); a power system board (15) provided on a bottom side of the module case (17); and a control board (19) provided on an upper side of the module case (17). A smoothing capacitor (18) connected to a power supply line for the power system board (15) is incorporated into the module case (17), and the smoothing capacitor (18) is electromagnetically shielded with respect to the power system board (15) and the control board (19).
    Type: Grant
    Filed: June 2, 2010
    Date of Patent: August 25, 2015
    Assignee: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Makoto Hattori, Hidetaka Sato, Takashi Nakagami, Kazunori Teshima, Mitsuaki Arita, Masashi Fujita
  • Patent number: 9111483
    Abstract: To provide a display device with high image quality and fewer terminals. The present invention is made with a focus on the positional relation between a serial-parallel conversion circuit and an external connection terminal for supplying a serial signal to the serial-parallel conversion circuit. The structure conceived is such that a serial-parallel conversion circuit and an external connection terminal for supplying a serial signal to the serial-parallel conversion circuit are provided close to each other so that an RC load between the serial-parallel conversion circuit and the external connection terminal is reduced.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: August 18, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroyuki Miyake, Kouhei Toyotaka, Kazunori Watanabe, Toru Tanabe, Makoto Kaneyasu, Masashi Fujita
  • Patent number: 9105446
    Abstract: An object of the present invention is to provide a charged particle beam apparatus that effectively removes electrical charges from an electrostatic chuck. In order to achieve the above object, the charged particle beam apparatus of the present invention includes a sample chamber that maintains a space containing an electrostatic chuck mechanism (5) in a vacuum state; and in which the charged particle beam apparatus includes an ultraviolet light source (6) to irradiate ultraviolet light within the sample chamber, and a irradiation target member irradiated by the ultraviolet light; and the irradiation target member is placed perpendicular to the adsorption surface of the electrostatic chuck.
    Type: Grant
    Filed: January 28, 2013
    Date of Patent: August 11, 2015
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Yasushi Ebizuka, Seiichiro Kanno, Makoto Nishihara, Masashi Fujita
  • Patent number: 9064599
    Abstract: While the supply of power is stopped, a data signal that has been held in a volatile memory section can be held in a nonvolatile memory section. In the nonvolatile memory section, a transistor having an extremely low off-state current allows a data signal to be held in the capacitor for a long period of time. Thus, the nonvolatile memory section can hold the logic state even while the supply of power is stopped. When the supply of power is started again, the data signal that has been held in the capacitor while the supply of power has been stopped is set at such a potential that malfunction does not occur by turning on the reset circuit.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: June 23, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Masashi Fujita
  • Patent number: 9054679
    Abstract: A flip-flop circuit consuming lower power than a conventional flip-flop circuit is provided. Further, a flip-flop circuit having a smaller number of transistors than a conventional flip-flop circuit to have a reduced footprint is provided. An n-channel transistor is used as a transistor which is to be turned on at a high level potential and a p-channel transistor is used as a transistor which is to be turned on at a low level potential, whereby the flip-flop circuit can operate only with a clock signal and without an inverted signal of the clock signal, and the number of transistors that operate only with a clock signal in the flip-flop circuit can be reduced.
    Type: Grant
    Filed: September 10, 2013
    Date of Patent: June 9, 2015
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Masashi Fujita
  • Patent number: 9043561
    Abstract: To provide a storage device with low power consumption. The storage device includes a plurality of cache lines. Each of the cache lines includes a data field which stores cache data; a tag which stores address data corresponding the cache data; and a valid bit which stores valid data indicating whether the cache data stored in the data field is valid or invalid. Whether power is supplied to the tag and the data field in each of the cache lines is determined based on the valid data stored in the valid bit.
    Type: Grant
    Filed: April 30, 2013
    Date of Patent: May 26, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Masashi Fujita
  • Publication number: 20150129873
    Abstract: A first field-effect transistor provided over a substrate in which an insulating region is provided over a first semiconductor region and a second semiconductor region is provided over the insulating region; an insulating layer provided over the substrate; a second field-effect transistor that is provided one flat surface of the insulating layer and includes an oxide semiconductor layer; and a control terminal are provided. The control terminal is formed in the same step as a source and a drain of the second field-effect transistor, and a voltage for controlling a threshold voltage of the first field-effect transistor is supplied to the control terminal.
    Type: Application
    Filed: January 16, 2015
    Publication date: May 14, 2015
    Inventors: Masashi FUJITA, Yutaka SHIONOIRI, Hiroyuki TOMATSU, Hidetomo KOBAYASHI
  • Publication number: 20150097123
    Abstract: An object of the present invention is to provide a charged particle beam apparatus that effectively removes electrical charges from an electrostatic chuck. In order to achieve the above object, the charged particle beam apparatus of the present invention includes a sample chamber that maintains a space containing an electrostatic chuck mechanism (5) in a vacuum state; and in which the charged particle beam apparatus includes an ultraviolet light source (6) to irradiate ultraviolet light within the sample chamber, and a irradiation target member irradiated by the ultraviolet light; and the irradiation target member is placed perpendicular to the adsorption surface of the electrostatic chuck.
    Type: Application
    Filed: January 28, 2013
    Publication date: April 9, 2015
    Inventors: Yasushi Ebizuka, Seiichiro Kanno, Makoto Nishihara, Masashi Fujita
  • Patent number: 8937304
    Abstract: A first field-effect transistor provided over a substrate in which an insulating region is provided over a first semiconductor region and a second semiconductor region is provided over the insulating region; an insulating layer provided over the substrate; a second field-effect transistor that is provided one flat surface of the insulating layer and includes an oxide semiconductor layer; and a control terminal are provided. The control terminal is formed in the same step as a source and a drain of the second field-effect transistor, and a voltage for controlling a threshold voltage of the first field-effect transistor is supplied to the control terminal.
    Type: Grant
    Filed: January 24, 2012
    Date of Patent: January 20, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi Fujita, Yutaka Shionoiri, Hiroyuki Tomatsu, Hidetomo Kobayashi
  • Publication number: 20150016179
    Abstract: While the supply of power is stopped, a data signal that has been held in a volatile memory section can be held in a nonvolatile memory section. In the nonvolatile memory section, a transistor having an extremely low off-state current allows a data signal to be held in the capacitor for a long period of time. Thus, the nonvolatile memory section can hold the logic state even while the supply of power is stopped. When the supply of power is started again, the data signal that has been held in the capacitor while the supply of power has been stopped is set at such a potential that malfunction does not occur by turning on the reset circuit.
    Type: Application
    Filed: July 17, 2014
    Publication date: January 15, 2015
    Inventor: Masashi Fujita
  • Publication number: 20140362631
    Abstract: A storage circuit includes a volatile storage portion in which storage of a data signal is controlled by a clock signal and an inverted clock signal, and a nonvolatile storage portion in which a data signal supplied to the volatile storage portion can be held even after supply of power supply voltage is stopped. A wiring which supplies a power supply voltage and is connected to a protective circuit provided for a wiring for supplying the clock signal is provided separately from a wiring which supplies a power supply voltage and which is connected to the storage circuit. The timing of stop and restart of supply of the power supply voltage supplied to the wiring which is connected to the protective circuit is different from that of stop and restart of supply of the power supply voltage supplied to the wiring which is connected to the storage circuit.
    Type: Application
    Filed: June 17, 2014
    Publication date: December 11, 2014
    Inventor: Masashi Fujita