Abstract: A cache memory having valid bits, where a circuit configuration in a memory cell of a valid bit is improved so as to perform invalidation at high speed. The invention provides a cache memory including a memory cell that has a function to perform invalidation at high speed. One mode of the invention is a semiconductor device including a memory cell of a valid bit, where two inverters are connected in series to form a loop, a drain of an N-channel transistor is connected to an output signal line of one of the inverters, a gate thereof is connected to a reset signal line of a CPU, and a source thereof is connected to a ground line. The initial value of the memory cell is determined by inputting a reset signal of the CPU to the gate.

Abstract: It is an object to provide an inspection method to enable simple and easy inspection of the electrical connecting state between a connecting terminal of a semiconductor integrated circuit over a substrate such as a glass substrate or a plastic substrate and a crimp connecting terminal of a flexible printed circuit. A crimp inspection terminal is provided to a flexible printed circuit so as to inspect all connecting terminals of the semiconductor integrated circuit over the substrate. A crimp connecting terminal and a crimp inspection terminal are connected with one connecting terminal of the semiconductor integrated circuit by thermocompression. By such a configuration, the inspection of the electrical connecting state between the connecting terminal and the crimp inspection terminal, in the other words, the inspection of conducting state can be performed by using only an external connecting terminal of the flexible printed circuit through the crimp inspection terminal.

Abstract: To provide a method for producing a quasi-crystalline particle dispersed alloy clad material which can be formed into a thick plate or a member for a structure having a specific shape, in particular, a complicated shape while maintaining quasi-crystalline particles, and can be enhanced in strength when used as a member for a structure, in particular, in strength in a high temperature environment. According to the method for producing a quasi-crystalline particle dispersed alloy clad material 1 of the present invention, a quasi-crystalline particle dispersed alloy clad material 1 is produced by forming a quasi-crystalline particle dispersed alloy containing quasi-crystalline particles dispersed in a matrix, onto a base material 2 by a clad layer forming apparatus 100 at a temperature lower than or equal to a decomposition temperature of the quasi-crystalline particles.

Abstract: The semiconductor memory device includes an initialization memory cell having a first inverter circuit including a first transistor and a second transistor, and a second inverter circuit whose input portion is connected to an output portion of the first inverter circuit and output portion is connected to an input portion of the first inverter circuit, and including a third transistor and a fourth transistor.

Abstract: An aluminum base alloy is produced by supercooling a molten alloy composed mainly of aluminum. The molten alloy contains an element capable of forming a quasicrystalline phase, an element which aids formation of the quasicrystals, and an element which stabilizes a supercooled state of the molten alloy and delays crystallization of a crystalline phase, and is composed of a mixed composition of a fine amorphous phase and an aluminum crystalline phase or an aluminum supersaturated solid solution phase, or a single phase of only an amorphous phase.

Abstract: A joined structure of different metals is usable even in a severely corrosive environments such locations susceptible to salt damage. In a joined structure of different metals, members of different metals are joined to each other in such a manner that a flange is allowed to extend in a direction from the circumferential side of one of the members along the circumference of the other member.

Abstract: A cache memory having valid bits, where a circuit configuration in a memory cell of a valid bit is improved so as to perform invalidation at high speed. The invention provides a cache memory including a memory cell that has a function to perform invalidation at high speed. One mode of the invention is a semiconductor device including a memory cell of a valid bit, where two inverters are connected in series to form a loop, a drain of an N-channel transistor is connected to an output signal line of one of the inverters, a gate thereof is connected to a reset signal line of a CPU, and a source thereof is connected to a ground line. The initial value of the memory cell is determined by inputting a reset signal of the CPU to the gate.

Abstract: A semiconductor device is provided, which comprises a rectifier circuit configured to generate a first voltage from a first signal inputted from an input terminal, a comparing circuit configured to compare a reference voltage and the first voltage inputted from the rectifier circuit and to output a second signal to a switch, and a voltage generation circuit configured to generate a second voltage from the first signal inputted from the input terminal. The rectifier circuit includes a transistor including at least a control terminal, and the voltage generation circuit inputs the second voltage to the control terminal when the switch is turned on in accordance with the second signal.

Abstract: An object is to provide a circuit configuration with which the number of transistors can be reduced and power conversion efficiency can be prevented from being reduced, in a transmitting and receiving circuit. The transmitting and receiving circuit includes a voltage doubler rectifier circuit having N stages, each of which includes a capacitor, where N is a positive integer. The voltage doubler rectifier circuit having N stages is connected to a circuit having a modulation function. In the capacitor in any one of the N stages, one electrode of the one capacitor is connected to an input terminal of the transmitting and receiving circuit, and a node to which the other electrode of the one capacitor is connected is connected to a circuit having a demodulation function. Since the transmitting and receiving circuit can be formed of fewer transistors, it can be reduced in size. Since a reduction in power conversion efficiency can be prevented, a power supply potential can be efficiently generated.

Abstract: In a scanning electron microscope, slimming is reduced by reducing a frame count. As the frame count is reduced, the amount of detected secondary electrons decreases, so that a probe current amount is increased to emit an increased amount of detected secondary electrons. A primary electron beam is scanned on a sample, a histogram is created, and the histogram is second-order differentiated to calculate a level of halftone at which a sample image changes in contrast, and to calculate the probe current amount. By adjusting the frame count suitable for the calculated probe current amount, and the contrast suitable for the sample image, the slimming of the sample is limited, and a highly visible sample image is generated for length measurement.

Abstract: Provided is a stage on which to place a sample, which is capable of performing a high-precision positioning at a short time, and which prevents an image drift of a measuring object. The stage includes: a base having a guiding unit; a table which moves in a movement direction along the guiding unit; a motion unit which provides motion in the movement direction in order to cause the table to move; and a transmission unit for transmitting the motion to the table. In the stage, the transmission unit includes a table block fixed to the table, and a motion block fixed to the motion unit; and the table block and the motion block contact each other at two points forward and backward in the movement direction while in motion, and are separated away from each other while not in motion.

Abstract: A cache memory having valid bits, where a circuit configuration in a memory cell of a valid bit is improved so as to perform invalidation at high speed. The invention provides a cache memory including a memory cell that has a function to perform invalidation at high speed. One mode of the invention is a semiconductor device including a memory cell of a valid bit, where two inverters are connected in series to form a loop, a drain of an N-channel transistor is connected to an output signal line of one of the inverters, a gate thereof is connected to a reset signal line of a CPU, and a source thereof is connected to a ground line. The initial value of the memory cell is determined by inputting a reset signal of the CPU to the gate.

Abstract: A receiver apparatus which receives streaming data transmitted from a distribution server via a network, includes: a comparison section configured to compare a time when a re-transmission process of the received streaming data is estimated to be completed with a time when an error correction process of the received streaming data is estimated to be started, when the error correction process can not be applied to the streaming data; and a re-transmission request section configured to send the distribution server a first re-transmission request for requesting that the streaming data be re-transmitted, when it is determined that the time when the re-transmission process is estimated to be completed is going to be earlier than the time when the error correction process is estimated to be started.

Abstract: A high-sensitivity measuring instrument comprising at least two sensors for detecting the same characteristics by touching a substance being measured with a specified time difference, wherein the between detection signals taken out simultaneously from respective sensors is determined, the difference between characteristic values upon elapsing the specified time difference is determined from the difference between detection signals, a reference time of measurement and a reference characteristic value at that time are preset, a time axis having a time pitch of a specified time difference is set, and a measurement value is obtained at a point in time elapsing an arbitrary time pitch from the reference time. Objective measurement characteristics can be detected by the measuring instrument not in the form of difference or variation but as an absolute value with high accuracy and sensitivity.

Abstract: To provide a foot-operated input system having a function of cursor operation, substituting a mouse, by which operation can be conducted without causing strain on the foot and body by using a radio signal, and operation efficiency of an electric device such as a computer can be improved. Using a foot-operated input system, cursor operation with foot is realized as follows. An input system using a radio signal is provided under a desk on which an electric device such as a computer is disposed. The operator wears a footwear fitted with a reader/writer, and puts the foot on wireless chips. The reader/writer receives positional information from the wireless chips through communication between the reader/writer and the wireless chips. The positional information is reflected in the position of a cursor.

Abstract: A separation column for ion chromatograph, which is packed with an organic porous ion exchanger having a three-dimensionally network structure which has a continuous pore structure comprising macropores connected with each other and, being present in the wall between them, a mesopore having a radius of 0.01 to 50 ?m, has a total pore volume of 1 to 50 ml/g, exhibits a value obtained by dividing the half width of the main peak of the pore distribution curve thereof by the radius of the peak top of the main peak of 0.5 or less, and has ion exchange groups introduced so that the exchanger has an ion-exchange capacity of 0.1 to 5000 ?g equivalent/g-dry organic porous ion exchanger. The separation column exhibits high performance capability especially for the separation and concentration of low molecular weight ions, and thus can be used for passing a sample solution through it with a reduced pressure while retaining a high capability for ion resolution.

Abstract: It is an object to provide an inspection method to enable simple and easy inspection of the electrical connecting state between a connecting terminal of a semiconductor integrated circuit over a substrate such as a glass substrate or a plastic substrate and a crimp connecting terminal of a flexible printed circuit. A crimp inspection terminal is provided to a flexible printed circuit so as to inspect all connecting terminals of the semiconductor integrated circuit over the substrate. A crimp connecting terminal and a crimp inspection terminal are connected with one connecting terminal of the semiconductor integrated circuit by thermocompression. By such a configuration, the inspection of the electrical connecting state between the connecting terminal and the crimp inspection terminal, in the other words, the inspection of conducting state can be performed by using only an external connecting terminal of the flexible printed circuit through the crimp inspection terminal.

Abstract: A WebTV (a WebTV main unit) has: a display controller for displaying a Web page including a plurality of link information in which a linked page is set and which is divided into a plurality of areas on a display unit; an area switcher for inputting an area switching command for switching an active area which is an area in a state where a user can select into the display controller; and a link switcher for inputting a link information switching command for switching active link information which is link information in a state where the user can select in the active area into the display controller based on a link information switching signal.

Abstract: In a scanning electron microscope, slimming is reduced by reducing a frame count. As the frame count is reduced, the amount of detected secondary electrons decreases, so that a probe current amount is increased to emit an increased amount of detected secondary electrons. A primary electron beam is scanned on a sample, a histogram is created, and the histogram is second-order differentiated to calculate a level of halftone at which a sample image changes in contrast, and to calculate the probe current amount. By adjusting the frame count suitable for the calculated probe current amount, and the contrast suitable for the sample image, the slimming of the sample is limited, and a highly visible sample image is generated for length measurement.

Abstract: In a scanning electron microscope, slimming is reduced by reducing a frame count. As the frame count is reduced, the amount of detected secondary electrons decreases, so that a probe current amount is increased to emit an increased amount of detected secondary electrons. A primary electron beam is scanned on a sample, a histogram is created, and the histogram is second-order differentiated to calculate a level of halftone at which a sample image changes in contrast, and to calculate the probe current amount. By adjusting the frame count suitable for the calculated probe current amount, and the contrast suitable for the sample image, the slimming of the sample is limited, and a highly visible sample image is generated for length measurement.