Patents by Inventor Masayuki Mizuno

Masayuki Mizuno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6633209
    Abstract: Here disclosed is a parallel-resonance type band-pass filter, which is employed for mobile communications equipment such as a mobile phone. According to the filter, each resonator has a single capacitor and serially connected plural inductors both of which are formed on the surface or on an inner layer of a substrate. Electromagnetic coupling between the resonators is established through electromagnetic coupling between at least a pair of inductors—the inductors of the pair belong to respective resonators. The input and the output terminals are coupled with the respective resonators via the capacitor having a properly determined capacitance. With such a simple structure, the filter also can work as an impedance transformer, with the result that the mobile communications equipment will be much smaller.
    Type: Grant
    Filed: February 25, 2002
    Date of Patent: October 14, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Kushitani, Masayuki Mizuno
  • Patent number: 6605297
    Abstract: The present invention is substances comprising coupling isomerized highly unsaturated fatty acids and/or their derivatives having an activity of specifically promoting the uncoupling respiration of mitochondria (MC) and proton leak in the MC inner membrane in cells of the main tissues producing nonshivering thermogenesis (nST), skeletal muscles, white adipose tissue (WAT) and brown adipose tissue (BAT).
    Type: Grant
    Filed: December 16, 2002
    Date of Patent: August 12, 2003
    Assignee: Janiftec, Inc.
    Inventors: Yoshitaka Nadachi, Kenji Koga, Masayuki Mizuno
  • Publication number: 20030119907
    Abstract: The present invention is substances comprising coupling isomerized highly unsaturated fatty acids and/or their derivatives having an activity of specifically promoting the uncoupling respiration of mitochondria (MC) and proton leak in the MC inner membrane in cells of the main tissues producing nonshivering thermogenesis (nST), skeletal muscles, white adipose tissue (WAT), brown adipose tissue (BAT), etc.
    Type: Application
    Filed: December 16, 2002
    Publication date: June 26, 2003
    Applicant: JANIFTEC, INC.
    Inventors: Yoshitaka Nadachi, Kenji Koga, Masayuki Mizuno
  • Patent number: 6577208
    Abstract: Disclosed is a radio frequency filter used for a mobile communication apparatus such as a mobile phone, having an inductor component, a capacitor component, and a resistor component formed of a conductor pattern. The filter includes the conductor pattern formed on the surface of dielectric layer, and an adjusting layer for adjusting the frequency characteristic of the filter formed so as to cover at least a part of the conductor pattern. In the radio frequency filter, the conductor pattern is formed and sintered, followed by adjusting the frequency characteristic of the filter. Accordingly, in the radio frequency filter, the yield of the manufacture is improved. Further, the electrode layer can be single-layered by using extra-thin lines for the conductor pattern and interdigital electrodes for the capacitor. As a result, it is possible to make the filter smaller and thinner by using intaglio-printing technique and thin-film forming technique.
    Type: Grant
    Filed: February 26, 2002
    Date of Patent: June 10, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Kushitani, Masaaki Katsumata, Masayuki Mizuno
  • Patent number: 6486716
    Abstract: The invention provides a phase compensation circuit that can carry out phase compensation grater than the variable delay time range of a variable delay circuit without increasing more than necessary the delay time of the variable delay circuit even in the case that the phase of the reference signal and the phase of the feedback signal change because of changes in the operating environment due to fluctuations in the power source voltage and fluctuations in temperature. The phase compensation circuit that compensates the phase of a clock signal provides a plurality of variable delay circuits, a first phase comparator that compares the phase of a reference signal to the phase of a feedback signal, a second phase comparator that compares the phases of the plurality of variable delay circuits, a switching circuit that switches the outputs of the plurality of variable delay circuits, and a control circuit.
    Type: Grant
    Filed: September 5, 2000
    Date of Patent: November 26, 2002
    Assignee: NEC Corporation
    Inventors: Koichiro Minami, Masayuki Mizuno
  • Publication number: 20020171510
    Abstract: Here disclosed is a parallel-resonance type band-pass filter, which is employed for mobile communications equipment such as a mobile phone. According to the filter, each resonator has a single capacitor and serially connected plural inductors both of which are formed on the surface or on an inner layer of a substrate. Electromagnetic coupling between the resonators is established through electromagnetic coupling between at least a pair of inductors—the inductors of the pair belong to respective resonators. The input and the output terminals are coupled with the respective resonators via the capacitor having a properly determined capacitance. With such a simple structure, the filter also can work as an impedance transformer, with the result that the mobile communications equipment will be much smaller.
    Type: Application
    Filed: February 25, 2002
    Publication date: November 21, 2002
    Inventors: Hiroshi Kushitani, Masayuki Mizuno
  • Publication number: 20020145487
    Abstract: Disclosed is a radio frequency filter used for a mobile communication apparatus such as a mobile phone, having an inductor component, a capacitor component, and a resistor component formed of a conductor pattern. The filter includes the conductor pattern formed on the surface of dielectric layer, and an adjusting layer for adjusting the frequency characteristic of the filter formed so as to cover at least a part of the conductor pattern. In the radio frequency filter, the conductor pattern is formed and sintered, followed by adjusting the frequency characteristic of the filter. Accordingly, in the radio frequency filter, the yield of the manufacture is improved. Further, the electrode layer can be single-layered by using extra-thin lines for the conductor pattern and interdigital electrodes for the capacitor. As a result, it is possible to make the filter smaller and thinner by using intaglio-printing technique and thin-film forming technique.
    Type: Application
    Filed: February 26, 2002
    Publication date: October 10, 2002
    Inventors: Hiroshi Kushitani, Masaaki Katsumata, Masayuki Mizuno
  • Patent number: 6433408
    Abstract: An integrated circuit is composed of a substrate, a first conductor formed on the substrate, an insulating film formed on the first conductor and the substrate, a second conductor formed on the insulating film, a first interconnection formed in the insulating film and a second interconnection formed on the insulating film. The first conductor and the second conductor constitute a pair of transmission lines. The first interconnection and the second interconnection constitute a circuit. The pair of transmission lines and the circuit are separated such that the circuit does not substantially interfere electrically with the pair of transmission lines.
    Type: Grant
    Filed: January 5, 2000
    Date of Patent: August 13, 2002
    Assignee: NEC Corporation
    Inventors: Kenichiro Anjo, Masayuki Mizuno
  • Patent number: 6414556
    Abstract: A voltage controlled oscillator comprises an oscillator connected between a power supply line and a low potential power supply voltage and having an output node for outputting an oscillation signal having a frequency changed in accordance with a voltage difference between the power supply line and the low potential power supply voltage. An nMOS transistor is connected at its drain to a high low potential power supply voltage and at its source connected to the power supply line of the oscillator. A gate electrode of the nMOS transistor is connected to receive a control signal so that a source voltage of the nMOS transistor is determined by a voltage of the control signal and is supplied to the power supply line of the oscillator, with the result that the oscillation frequency of the oscillator is controlled by the voltage of the control signal.
    Type: Grant
    Filed: September 5, 1996
    Date of Patent: July 2, 2002
    Assignee: NEC Corporation
    Inventor: Masayuki Mizuno
  • Patent number: 6407644
    Abstract: A voltage controlled oscillator operates over a wide operating frequency range and reduces the fluctuation of the gain due to the fluctuation of the frequency characteristic. The variable frequency oscillator includes a first voltage/current converter for controlling the variable frequency oscillator such that the output oscillating frequency is varied by &Dgr;F hertz by changing the input voltage by &Dgr;V volt when the input voltage is less than a prescribed threshold voltage, and includes a second voltage/current converter for controlling the variable frequency oscillator such that the output oscillating frequency is varied by more than &Dgr;F hertz by changing the input voltage by &Dgr;V volt, when the input voltage exceeds a prescribed threshold voltage.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: June 18, 2002
    Assignee: NEC Corporation
    Inventors: Masayuki Mizuno, Koichiro Minami
  • Patent number: 6404295
    Abstract: A voltage controlled oscillator includes a first converter, a second converter and an oscillator. The first converter outputs a first current proportional to an input voltage. In this case, an increase rate of the first current is decreased as the input voltage is increased. The second converter outputs a second current proportional to the input voltage. An increase rate of the second current is increased as the input voltage is increased. The oscillator outputs an oscillation signal in response to a summation of the first current and the second current.
    Type: Grant
    Filed: August 29, 2000
    Date of Patent: June 11, 2002
    Assignee: NEC Corporation
    Inventors: Koichiro Minami, Masayuki Mizuno
  • Patent number: 6374733
    Abstract: The present invention relates to a manufacturing method of a ceramic substrate used in various electronic appliances, and more particularly to a manufacturing method of a ceramic substrate forming a conductor pattern by intaglio printing. A conductive paste is supplied in the intaglio by using any one of screen mask, metal mask, or drawing device, and therefore the conductive paste can be supplied uniformly in desired positions only. The supplying amount of the conductive paste can be adjusted by repeating printing, so that an optimum amount can be set depending on the pattern. As a result, a fine wiring pattern of thick film can be easily formed, and a ceramic circuit board low in wiring resistance, high in wiring density, and high in dimensional precision of wiring pattern can be obtained.
    Type: Grant
    Filed: September 25, 2000
    Date of Patent: April 23, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaaki Hayama, Noboru Mouri, Hayami Matsunaga, Masayuki Mizuno, Eiji Kawamoto, Yuji Yagi
  • Patent number: 6378080
    Abstract: A clock distribution circuit is provided with a plurality of blocks each having a plurality of circuits, a first clock driver which distributes a clock signal to each of the blocks, and second clock drivers each provided in one of the blocks. Each second clock drivers distributes the clock signal to each of the circuits in the block. A first wiring is connected between the first clock driver and each of the second clock drivers so that the clock signal arrives at each of the second clock drivers in the same phase. A plurality of second wirings are connected between the second clock drivers and each of the circuits in the block. The second wirings may consist of transmission lines. The second wirings have a maximum length equal to or smaller than a product of clock skew allowable and a propagation velocity of an electromagnetic wave propagating through the second wirings.
    Type: Grant
    Filed: December 28, 1999
    Date of Patent: April 23, 2002
    Assignee: NEC Corporation
    Inventors: Kenichiro Anjo, Masayuki Mizuno
  • Patent number: 6366616
    Abstract: In a motion vector estimating apparatus, a current picture storage unit stores image data of a current picture, and a reference-picture storage unit stores image data of a reference picture. A search window determining unit determines estimation history from previously estimated motion vectors, and determines a search window based on the estimation history. At least one of a shape, size and position of the search window is determined based on the estimation history. The search window is composed of rectangular reference regions. A block matching circuit for performing a block matching process to a current block and each of reference blocks of the search window to determine a motion vector. The search window may be limited in units of pixels, or a load of the apparatus, a power supply voltage or a temperature of the block matching circuit.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: April 2, 2002
    Assignee: NEC Corporation
    Inventors: Masayuki Mizuno, Yasushi Ooi
  • Patent number: 6304124
    Abstract: A variable delay section comprises a gate element and a plurality of (N) delay elements for delaying the signal change on the output of the gate element. A difference between a first delay provided by n-th delay section and a second delay provided by (n+1)th delay section is constant for any of n's between 1 and N−1. A plurality of variable delay sections are cascaded to form a frequency multiplier, with the output of the last stage variable delay section being fed-back to the input of the first stage variable delay section through a selector. The other input of the selector is connected to the input of the variable delay circuit to allow the internal signal to pass the variable delay sections for K times.
    Type: Grant
    Filed: January 29, 1998
    Date of Patent: October 16, 2001
    Assignee: NEC Corporation
    Inventor: Masayuki Mizuno
  • Patent number: 6249550
    Abstract: In a motion vector estimating apparatus, a current picture storage unit stores image data of a current picture, and a reference picture storage unit stores image data of a reference picture. A search window determining unit determines estimation history from previously estimated motion vectors, and determines a search window based on the estimation history. At least one of a shape, size and position of the search window is determined based on the estimation history. The search window is composed of rectangular reference regions. A block matching circuit for performing a block matching process to a current block and each of reference blocks of the search window to determine a motion vector. The search window may be limited in units of pixels, or a load of the apparatus, a power supply voltage or a temperature of the block matching circuit.
    Type: Grant
    Filed: September 16, 1997
    Date of Patent: June 19, 2001
    Assignee: NEC Corporation
    Inventors: Masayuki Mizuno, Yasushi Ooi
  • Patent number: 6243033
    Abstract: A signal value representing method in which both wide dynamic range and high precision can be realized in combination with a low power source voltage. M+1 signal lines are used of which, M signal lines are digital signal values and one signal line is an analog signal value. The range of the values represented by the analog signal value representing method is equated to the smallest value of the digital signal value representing method. The signal value is represented by the combination of a discretely changing wide dynamic range signal, represented by the digital signal value representing method employing M signal lines and a continuously variable high precision signal which is represented by the analog signal value representing method employing a sole signal line and which represents a signal level position within the interval of the discrete values.
    Type: Grant
    Filed: July 12, 1999
    Date of Patent: June 5, 2001
    Assignee: NEC Corporation
    Inventor: Masayuki Mizuno
  • Patent number: 6229360
    Abstract: A first latching circuit transferring an input signal from the input terminal to the output terminal for a predetermined period in response to a level transition timing of one direction of a clock signal input to the clock terminal, and maintaining a signal condition of the output terminal in the remaining period, and a second latching circuit transferring an input signal from the input terminal to the output terminal for a predetermined period in response to a level transition timing of the other direction of the clock signal input to the clock terminal, and maintaining a signal condition of the output terminal in the remaining period, are provided. A desired logic circuit is connected between the first and second latching circuits. By synchronously operating the first and second latching circuits by supplying a common clock signal, a clock synchronization circuit not influenced by fluctuation of the device, fluctuation of temperature or power source can be formed.
    Type: Grant
    Filed: September 9, 1998
    Date of Patent: May 8, 2001
    Assignee: NEC Corporation
    Inventors: Masayuki Mizuno, Masakazu Yamashina
  • Patent number: 6141847
    Abstract: A ceramic substrate 1 made of magnetic substance on which an inductor 2 is formed is prepared. A ceramic substrate 3 made of dielectric substance on which a capacitor 4 is formed is also prepared. An intermediate layer 5 made of lass paste is printed on the inductor 2 and the capacitor 4. After debinding the substrates 1 and 3 independently, both the substrates are filed with the intermediate layer 5 therebetween so that both the substrates may be glued and integrated. As such, because the debinding process is provided before filing, less gas is generated in firing, and as a result, voids are restrained from occurring.
    Type: Grant
    Filed: December 23, 1997
    Date of Patent: November 7, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masayuki Mizuno, Masaaki Hayama, Kazuhiro Miura, Noboru Mori, Akira Hashimoto, Mitsuteru Yamada
  • Patent number: 6115150
    Abstract: An image data processing apparatus is provided which is adapted to perform an image processing process suitable for each of a plurality of image modes on the basis of an output gradation reference curve and computation data. Output image data are generated by processing inputted image data on the basis of an output gradation curve which is prepared for each image mode on the basis of an output gradation reference curve and computation data. Therefore, output gradation curves for respective image modes need not preliminarily be stored in storage means. For example, if two output gradation reference curves and 16 computation data are preliminarily stored in the storage means, the inputted image data can be subjected to a process corresponding to any of 32 image modes by using an output gradation reference curve and a computation data in combination.
    Type: Grant
    Filed: February 19, 1997
    Date of Patent: September 5, 2000
    Assignee: Mita Industrial Co., Ltd.
    Inventors: Koji Nakamura, Masayuki Mizuno, Syuji Hayashi