Abstract: Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to a direct or remote plasma. Pre-inhibition and post-inhibition treatments are used to modulate the inhibition effect, facilitating feature fill using inhibition across a wide process window. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) wordlines. The methods may be used for both conformal fill and bottom-up/inside-out fill. Examples of applications include logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate and wordline fill, and 3-D integration using through-silicon vias.

Abstract: Provided herein are methods of depositing fluorine-free tungsten by sequential CVD pulses, such as by alternately pulsing a chlorine-containing tungsten precursor and hydrogen in cycles of temporally separated pulses, without depositing a tungsten nucleation layer. Methods also include depositing tungsten directly on a substrate surface using alternating pulses of a chlorine-containing tungsten precursor and hydrogen without treating the substrate surface.

Abstract: Methods of depositing tungsten into high aspect ratio features using a dep-etch-dep process integrating various deposition techniques with alternating pulses of surface modification and removal during etch are provided herein.

Abstract: Disclosed herein are methods and related apparatus for formation of tungsten wordlines in memory devices. Also disclosed herein are methods and related apparatus for deposition of fluorine-free tungsten (FFW). According to various embodiments, the methods involve deposition of multi-component tungsten films using tungsten chloride (WClx) precursors and boron (B)-containing, silicon (Si)-containing or germanium (Ge)-containing reducing agents.

Abstract: Efficient integrated sequential deposition of alternating layers of dielectric and conductor, for example oxide/metal or metal nitride, e.g., SiO2/TiN, in a single tool, and even in a single process chamber enhances throughput without compromising quality when directly depositing a OMOM stack with many layers. Conductor and dielectric film deposition of a stack of at least 20 conductor/dielectric film pairs in the same processing tool or chamber, without breaking vacuum between the film depositions, such that there is no substantial cross-contamination between the conductor and dielectric film depositions, can be achieved.

Abstract: Provided herein are methods and apparatuses for reducing line bending when depositing a metal such as tungsten, molybdenum, ruthenium, or cobalt into features on substrates by periodically exposing the feature to nitrogen, oxygen, or ammonia during atomic layer deposition, chemical vapor deposition, or sequential chemical vapor deposition to reduce interactions between metal deposited onto sidewalls of a feature. Methods are suitable for deposition into V-shaped features.

Abstract: Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to ammonia vapor in a non-plasma process. Process parameters including exposure time, substrate temperature, and chamber pressure can be used to tune the inhibition profile. Also provided are methods of filling multiple adjacent lines with reduced or no line bending. The methods involve selectively inhibiting the tungsten nucleation to reduce sidewall growth during feature fill.

Abstract: A vaporizer system is provided that allows for rapid shifts in the flow rate of a vaporized reactant while maintaining a constant overall flow rate of vaporized reactant and carrier gas.

Abstract: Provided herein are methods of forming conductive cobalt (Co) interconnects and Co features. The methods involve deposition of a thin manganese (Mn)-containing film on a dielectric followed by subsequent deposition of cobalt on the Mn-containing film. The Mn-containing film may be deposited on a silicon-containing dielectric, such as silicon dioxide, and annealed to form a manganese silicate.

Abstract: Described herein are methods of filling features with tungsten and related systems and apparatus. The methods include inside-out fill techniques as well as conformal deposition in features. Inside-out fill techniques can include selective deposition on etched tungsten layers in features. Conformal and non-conformal etch techniques can be used according to various implementations. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) word lines. Examples of applications include logic and memory contact fill, DRAM buried word line fill, vertically integrated memory gate/word line fill, and 3-D integration with through-silicon vias (TSVs).

Abstract: Provided herein are methods of depositing void-free cobalt into features with high aspect ratios. Methods involve (a) partially filling a feature with cobalt, (b) exposing the feature to a plasma generated from nitrogen-containing gas to selectively inhibit cobalt nucleation on surfaces near or at the top of the feature, optionally repeating (a) and (b), and depositing bulk cobalt into the feature by chemical vapor deposition. Methods may also involve exposing a feature including a barrier layer to a plasma generated from nitrogen-containing gas to selectively inhibit cobalt nucleation. The methods may be performed at low temperatures less than about 400° C. using cobalt-containing precursors. Methods may also involve using a remote plasma source to generate the nitrogen-based plasma. Methods also involve annealing the substrate.

Abstract: Provided are methods of void-free tungsten fill of high aspect ratio features. According to various embodiments, the methods involve a reduced temperature chemical vapor deposition (CVD) process to fill the features with tungsten. In certain embodiments, the process temperature is maintained at less than about 350° C. during the chemical vapor deposition to fill the feature. The reduced-temperature CVD tungsten fill provides improved tungsten fill in high aspect ratio features, provides improved barriers to fluorine migration into underlying layers, while achieving similar thin film resistivity as standard CVD fill. Also provided are methods of depositing thin tungsten films having low-resistivity. According to various embodiments, the methods involve performing a reduced temperature low resistivity treatment on a deposited nucleation layer prior to depositing a tungsten bulk layer and/or depositing a bulk layer via a reduced temperature CVD process followed by a high temperature CVD process.

Abstract: Described herein are methods of filling features with tungsten and related systems and apparatus. The methods include inside-out fill techniques as well as conformal deposition in features. Inside-out fill techniques can include selective deposition on etched tungsten layers in features. Conformal and non-conformal etch techniques can be used according to various implementations. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) word lines. Examples of applications include logic and memory contact fill, DRAM buried word line fill, vertically integrated memory gate/word line fill, and 3-D integration with through-silicon vias (TSVs).

Abstract: Provided herein are methods of depositing fluorine-free tungsten by sequential CVD pulses, such as by alternately pulsing a chlorine-containing tungsten precursor and hydrogen in cycles of temporally separated pulses, without depositing a tungsten nucleation layer. Methods also include depositing tungsten directly on a substrate surface using alternating pulses of a chlorine-containing tungsten precursor and hydrogen without treating the substrate surface.

Abstract: Provided herein are methods of depositing bulk tungsten by sequential CVD pulses, such as by alternately pulsing tungsten hexafluoride and hydrogen gas in cycles of temporally separated pulses. Some methods include depositing a tungsten nucleation layer at low pressure followed by deposition of bulk tungsten by sequential CVD to form low stress tungsten films with low fluorine content. Methods described herein may also be performed in combination with non-sequential CVD deposition and fluorine-free tungsten deposition techniques.

Abstract: Methods for forming tungsten film using fluorine-free tungsten precursors such as tungsten chlorides are provided. Methods involve depositing a tungsten nucleation layer by exposing a substrate to a reducing agent such as diborane (B2H6) and exposing the substrate to a tungsten chloride, followed by depositing bulk tungsten by exposing the substrate to a tungsten chloride and a reducing agent. Methods also involve diluting the reducing agent and exposing the substrate to a fluorine-free precursor in pulses to deposit a tungsten nucleation layer. Deposited films exhibit good step coverage and plugfill.

Abstract: Methods of depositing tungsten into high aspect ratio features using a dep-etch-dep process integrating various deposition techniques with alternating pulses of surface modification and removal during etch are provided herein.

Abstract: Provided herein are methods of depositing bulk tungsten by sequential CVD pulses, such as by alternately pulsing tungsten hexafluoride and hydrogen gas in cycles of temporally separated pulses. Some methods include depositing a tungsten nucleation layer at low pressure followed by deposition of bulk tungsten by sequential CVD to form low stress tungsten films with low fluorine content. Methods described herein may also be performed in combination with non-sequential CVD deposition and fluorine-free tungsten deposition techniques.

Abstract: The present invention pertains to methods for forming a metal diffusion barrier on an integrated circuit wherein the formation includes at least two operations. The first operation deposits barrier material via PVD or CVD to provide some minimal coverage. The second operation deposits an additional barrier material and simultaneously etches a portion of the barrier material deposited in the first operation. The result of the operations is a metal diffusion barrier formed in part by net etching in certain areas, in particular the bottom of vias, and a net deposition in other areas, in particular the side walls of vias. Controlled etching is used to selectively remove barrier material from the bottom of vias, either completely or partially, thus reducing the resistance of subsequently formed metal interconnects.

Abstract: Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to a direct or remote plasma. The methods include performing multi-stage inhibition treatments including intervals between stages. One or more of plasma source power, substrate bias power, or treatment gas flow may be reduced or turned off during an interval. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) wordlines. The methods may be used for both conformal fill and bottom-up/inside-out fill. Examples of applications include logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate and wordline fill, and 3-D integration using through-silicon vias.