Abstract: A semiconductor device according to the embodiments includes: a first substrate having a plurality of first through-holes; a plurality of first electrodes provided on the first substrate to be adjacent to the respective first through-holes; a plurality of second electrodes provided on the first substrate to be adjacent to the respective first through-holes and to face the respective first electrodes; and a second substrate provided to face the first substrate, the second substrate having a plurality of second through-holes facing the respective first through-holes, at least a surface of the second substrate facing the first substrate having conductivity, the second substrate being electrically connected to the second electrodes.

Abstract: A semiconductor device according to an embodiment includes a first substrate including a first insulating layer, a first conductive layer provided in the first insulating layer, a first metal layer provided in the first insulating layer, and a second metal layer provided between the first metal layer and the first conductive layer, a linear expansion coefficient of the second metal layer being higher than that of the first metal layer; and a second substrate including a second insulating layer, and a third metal layer provided in the second insulating layer, in contact with the first metal layer. The second substrate contacts with the first substrate.

Abstract: According to one embodiment, the array chip includes a three-dimensionally disposed plurality of memory cells and a memory-side interconnection layer connected to the memory cells. The circuit chip includes a substrate, a control circuit provided on the substrate, and a circuit-side interconnection layer provided on the control circuit and connected to the control circuit. The circuit chip is stuck to the array chip with the circuit-side interconnection layer facing to the memory-side interconnection layer. The bonding metal is provided between the memory-side interconnection layer and the circuit-side interconnection layer. The bonding metal is bonded to the memory-side interconnection layer and the circuit-side interconnection layer.

Abstract: According to one embodiment, a laser processing method includes irradiating a region of a substrate with first laser light having a first pulse width greater than ten nanoseconds and irradiating the region substrate with second laser light having a second pulse width less than the first pulse width. In some embodiments, the region may be irradiated with the first and second laser lights simultaneously. In other embodiments, the irradiation with first laser light may occur before the irradiation with the second laser light.

Abstract: According to one embodiment, a semiconductor device is provided with a first single crystal layer, a polycrystalline layer provided on an entire surface of the first single crystal layer, and a second single crystal layer bonded to the polycrystalline layer. The coefficient of thermal expansion of the polycrystalline layer is greater than the coefficient of thermal expansion of the second single crystal layer, and is smaller than the coefficient of thermal expansion of a compound semiconductor layer which can be provided on the second single crystal layer using an intervening a buffer layer.

Abstract: According to an embodiment, a method for manufacturing a semiconductor device includes: selectively forming a plurality of mask layers on a first surface of a semiconductor substrate, and the semiconductor substrate having the first surface and a second surface; dividing the semiconductor substrate by forming a gap piercing from the first surface to the second surface of the semiconductor substrate, the gap being formed by dry-etching the first surface of the semiconductor substrate exposed between the plurality of mask layers, and a width of the gap on the second surface side being larger than a width of the gap on the first surface side; and forming a first electrode under a reduced-pressure atmosphere on the first surface of the semiconductor substrate after the semiconductor substrate being divided.

Abstract: According to one embodiment, semiconductor light emitting element includes: a substrate having a first surface and a second surface on an opposite side of the first surface; an insulating layer provided on the second surface of the substrate; a first metal layer provided on the insulating layer; a semiconductor light emitting unit provided on the first metal layer, the semiconductor light emitting unit including a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and a light emitting layer provided between the first semiconductor layer and the second semiconductor layer, the second semiconductor layer being electrically connected to the first metal layer; and a first electrode layer provided on the first surface of the substrate, the first electrode layer extending in the substrate and in the insulating layer, and the first electrode layer being electrically connected to the first metal layer.

Abstract: According to one embodiment, a method for manufacturing a semiconductor device, includes: selectively forming a plurality of electrode layers on a first surface of a semiconductor substrate, the semiconductor substrate having the first surface and a second surface; and dividing the semiconductor substrate by forming a gap piercing from the first surface to the second surface of the semiconductor substrate, the gap being formed by dry etching the first surface of the semiconductor substrate exposed between the plurality of electrode layers, the plurality of electrode layers being used as masks.

Abstract: According to an embodiment, a method for manufacturing a semiconductor device includes: selectively forming a plurality of mask layers on a first surface of a semiconductor substrate, and the semiconductor substrate having the first surface and a second surface; dividing the semiconductor substrate by forming a gap piercing from the first surface to the second surface of the semiconductor substrate, the gap being formed by dry-etching the first surface of the semiconductor substrate exposed between the plurality of mask layers, and a width of the gap on the second surface side being larger than a width of the gap on the first surface side; and forming a first electrode under a reduced-pressure atmosphere on the first surface of the semiconductor substrate after the semiconductor substrate being divided.

Abstract: A light emitting device includes a frame, a light emitting element provided above the frame and including a substrate, a light emitting layer provided above the substrate, a first reflective layer provided on a bottom surface of the substrate, a second reflective layer provided on a side surface of the substrate, and an electrode, and a bonding wire with one end electrically connected to the electrode and another end electrically connected to the frame.

Abstract: According to one embodiment, an optical waveguide sensor chip includes an optical waveguide layer; a pair of optical elements disposed at both ends of the optical waveguide layer so that light enters the optical waveguide layer and the light exits from the optical waveguide layer; a functional film formed on a predetermined region of the optical waveguide layer; a covering layer formed in a planar region on the light entrance surface of the optical waveguide layer, in which at least the optical elements are disposed; a first through hole configured to allow the light entering the entrance-side optical element to pass therethrough; and a second through hole configured to allow the light exiting from the exit-side optical element to pass therethrough.

Abstract: According to an embodiment, a method of manufacturing a semiconductor device includes polishing a peripheral portion of the semiconductor substrate, and forming a protective film to be an insulating film, on a surface of the semiconductor substrate including a surface exposed by the polishing.

Abstract: According to one embodiment, a manufacturing method of a semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate having first and second main surfaces, and a through hole passing through between the first and second main surfaces, a pad on the first main surface, a through electrode in the through hole, and a connection structure including a connection portion to directly connect the pad and the through electrode, and another connection portion to indirectly connect the pad and the through electrode. The method includes forming an isolation region in the first main surface, the isolation region being in a region where the through electrode is to be formed and being in a region other than the region where the through hole is to be formed, forming the pad, and forming the through hole by processing the substrate to expose a part of the pad.

Abstract: A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.

Abstract: A surface treatment composition of this invention is a composition for treating a metal wiring-including surface of a semiconductor substrate, which includes a compound (A) represented by a specific structural formula and a solvent (B) having a boiling point at one atmospheric pressure of 50 to 300° C., and has a pH of 4 to 11. According to the surface treatment composition of the present invention, oxidation of metal wiring of a semiconductor substrate can be suppressed and deterioration of the flatness of the metal wiring portion due to unusual oxidation can be suppressed. Furthermore, when an insulating film or a barrier metal film is present on a metal wiring-including surface of the semiconductor substrate, fang and surface roughness of the metal wiring occurring in the interface between the metal wiring and the insulating film or the barrier metal film can be suppressed.

Abstract: Semiconductor device includes semiconductor substrate, through hole having first opening and second opening, and including an expansion portion so that an opening area of first opening is greater than an opening area of lowermost portion of expansion portion, first insulating layer, and having an opening which communicates with through hole and has an area smaller than opening area of first opening, first wiring layer provided on first insulating layer, second insulating layer provided on expansion portion of through hole, and to cover first opening and an inner wall surface of through hole, second insulating layer having an opening communicating with opening of first insulating layer so as to expose first wiring layer through opening of first insulating layer, and second wiring layer provided on second insulating layer to extend from inside of through hole, and being connected to first wiring layer via openings of first and second insulating layers.

Abstract: A semiconductor package includes a solid-state imaging element, electrode pad, through-hole electrode, and light-transmitting substrate. The solid-state imaging element is formed on the first main surface of a semiconductor substrate. The electrode pad is formed on the first main surface of the semiconductor substrate. The through-hole electrode is formed to extend through the semiconductor substrate between the first main surface and a second main surface opposite to the electrode pad formed on the first main surface. The light-transmitting substrate is placed on a patterned adhesive to form a hollow on the solid-state imaging element. The thickness of the semiconductor substrate below the hollow when viewed from the light-transmitting substrate is larger than that of the semiconductor substrate below the adhesive.

Abstract: A semiconductor device, a semiconductor memory tester, and a multi-chip package are provided. The semiconductor device includes a plurality of nonvolatile semiconductor memories; a boosting circuit which generates a boosted voltage for operating the plurality of nonvolatile semiconductor memories; and a boosting circuit controller which controls the operation of the boosting circuit to generate the boosted voltage on the basis of an operation sequence of the plurality of nonvolatile semiconductor memories.

Abstract: A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.

Abstract: According to one embodiment, an optical waveguide sensor chip includes an optical waveguide layer; a pair of optical elements disposed at both ends of the optical waveguide layer so that light enters the optical waveguide layer and the light exits from the optical waveguide layer; a functional film formed on a predetermined region of the optical waveguide layer; a covering layer formed in a planar region on the light entrance surface of the optical waveguide layer, in which at least the optical elements are disposed; a first through hole configured to allow the light entering the entrance-side optical element to pass therethrough; and a second through hole configured to allow the light exiting from the exit-side optical element to pass therethrough.