Abstract: A solid-state image pickup apparatus includes an image pickup pixel unit in which a plurality of pixels each including a photoelectric conversion element and a field-effect transistor are arranged on a semiconductor substrate so that a light-receiving surface is disposed at a first surface side of the semiconductor substrate; a peripheral circuit unit provided at a periphery of the image pickup pixel unit of the semiconductor substrate; and a multilayered wiring layer in which a plurality of wiring layers for driving the field-effect transistor of the image pickup pixel unit are laminated at a second surface side of the semiconductor substrate, wherein a wiring in each of the wiring layers constituting the multilayered wiring layer is disposed so that a coverage of the wiring located at least in the image pickup pixel unit of the semiconductor substrate reaches 100%, viewed from the second surface side.

Abstract: According to an embodiment, a method of manufacturing a semiconductor device includes polishing a peripheral portion of the semiconductor substrate, and forming a protective film to be an insulating film, on a surface of the semiconductor substrate including a surface exposed by the polishing.

Abstract: According to one embodiment, an optical element includes: a substrate in which a through-hole is formed; a transparent thin film formed on at least one of the rear surface and the front surface of the substrate to cover the through-hole; and a lens formed in contact with the surface of the thin film in an area where the thin film covers the through-hole.

Abstract: A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.

Abstract: A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.

Abstract: A semiconductor device, a semiconductor memory tester, and a multi-chip package are provided. The semiconductor device includes a plurality of nonvolatile semiconductor memories; a boosting circuit which generates a boosted voltage for operating the plurality of nonvolatile semiconductor memories; and a boosting circuit controller which controls the operation of the boosting circuit to generate the boosted voltage on the basis of an operation sequence of the plurality of nonvolatile semiconductor memories.

Abstract: According to one embodiment, a manufacturing method of a semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate having first and second main surfaces, and a through hole passing through between the first and second main surfaces, a pad on the first main surface, a through electrode in the through hole, and a connection structure including a connection portion to directly connect the pad and the through electrode, and another connection portion to indirectly connect the pad and the through electrode. The method includes forming an isolation region in the first main surface, the isolation region being in a region where the through electrode is to be formed and being in a region other than the region where the through hole is to be formed, forming the pad, and forming the through hole by processing the substrate to expose a part of the pad.

Abstract: A semiconductor device, a semiconductor memory tester, and a multi-chip package are provided. The semiconductor device includes a plurality of nonvolatile semiconductor memories; a boosting circuit which generates a boosted voltage for operating the plurality of nonvolatile semiconductor memories; and a boosting circuit controller which controls the operation of the boosting circuit to generate the boosted voltage on the basis of an operation sequence of the plurality of nonvolatile semiconductor memories.

Abstract: The present invention provides a solid-state image pickup device including an image pickup pixel section which is provided on a semiconductor substrate and in which a plurality of pixels each having a photoelectric conversion element and a field-effect transistor are arranged, and a peripheral circuit section for the image pickup pixel section. An interconnect layer driving the field-effect transistor in the image pickup pixel section is formed on a first surface side of the semiconductor substrate. A light receiving surface of the photoelectric conversion element is located on a second surface side of the semiconductor substrate. The solid-state image pickup device includes a first terminal exposed from the second surface side of the semiconductor substrate, and a second terminal electrically connected to the first terminal and connectable to an external device on the first surface side of the semiconductor substrate.

Abstract: A semiconductor device comprises a semiconductor substrate, a through contact and a metal film. The semiconductor substrate has a semiconductor element at a first face. The wiring pattern includes a grounding line and is located at a side of a second face opposite to the first face of the semiconductor substrate. The through contact penetrates the semiconductor substrate from the first face to the second face and electrically connects between the semiconductor element and the wiring pattern. The metal film is located between the second face of the semiconductor substrate and a face where the wiring pattern exists and electrically connected with the grounding line.

Abstract: A surface treatment composition of this invention is a composition for treating a metal wiring-including surface of a semiconductor substrate, which includes a compound (A) represented by a specific structural formula and a solvent (B) having a boiling point at one atmospheric pressure of 50 to 300° C., and has a pH of 4 to 11. According to the surface treatment composition of the present invention, oxidation of metal wiring of a semiconductor substrate can be suppressed and deterioration of the flatness of the metal wiring portion due to unusual oxidation can be suppressed. Furthermore, when an insulating film or a barrier metal film is present on a metal wiring-including surface of the semiconductor substrate, fang and surface roughness of the metal wiring occurring in the interface between the metal wiring and the insulating film or the barrier metal film can be suppressed.

Abstract: A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.

Abstract: An imaging element is formed on the first main surface of a semiconductor substrate. An external terminal is formed on the second main surface of the semiconductor substrate. A through-hole electrode is formed in a through hole formed in the semiconductor substrate. A first electrode pad is formed on the through-hole electrode in the first main surface. An interlayer insulating film is formed on the first electrode pad and on the first main surface. A second electrode pad is formed on the interlayer insulating film. A passivation film is formed on the second electrode pad and the interlayer insulating film, and has an opening which exposes a portion of the second electrode pad. A contact plug is formed between the first and second electrode pads in a region which does not overlap the opening when viewed in a direction perpendicular to the surface of the semiconductor substrate.

Abstract: In one aspect of the present invention, a semiconductor device, may include a semiconductor substrate having a first surface and a second surface opposite to the first surface; a through hole in the semiconductor substrate, including an expansion portion which is provided in a vicinity of the first surface so that an opening area of the first opening is greater than an opening area of a lowermost portion of the expansion portion; a first insulating layer on the first surface of the semiconductor substrate; a first wiring layer on the first insulating layer to close the opening of the first insulating layer; a second insulating layer provided on the expansion portion of the through hole; and a second wiring layer on the second insulating layer to extend from inside of the through hole to the second surface of the semiconductor substrate.

Abstract: A solid-state image pickup apparatus includes an image pickup pixel unit in which a plurality of pixels each including a photoelectric conversion element and a field-effect transistor are arranged on a semiconductor substrate so that a light-receiving surface is disposed at a first surface side of the semiconductor substrate; a peripheral circuit unit provided at a periphery of the image pickup pixel unit of the semiconductor substrate; and a multilayered wiring layer in which a plurality of wiring layers for driving the field-effect transistor of the image pickup pixel unit are laminated at a second surface side of the semiconductor substrate, wherein a wiring in each of the wiring layers constituting the multilayered wiring layer is disposed so that a coverage of the wiring located at least in the image pickup pixel unit of the semiconductor substrate reaches 100%, viewed from the second surface side.

Abstract: A semiconductor package includes a solid-state imaging element, electrode pad, through-hole electrode, and light-transmitting substrate. The solid-state imaging element is formed on the first main surface of a semiconductor substrate. The electrode pad is formed on the first main surface of the semiconductor substrate. The through-hole electrode is formed to extend through the semiconductor substrate between the first main surface and a second main surface opposite to the electrode pad formed on the first main surface. The light-transmitting substrate is placed on a patterned adhesive to form a hollow on the solid-state imaging element. The thickness of the semiconductor substrate below the hollow when viewed from the light-transmitting substrate is larger than that of the semiconductor substrate below the adhesive.

Abstract: An imaging element is formed on the first main surface of a semiconductor substrate. An external terminal is formed on the second main surface of the semiconductor substrate. A through-hole electrode is formed in a through hole formed in the semiconductor substrate. A first electrode pad is formed on the through-hole electrode in the first main surface. An interlayer insulating film is formed on the first electrode pad and on the first main surface. A second electrode pad is formed on the interlayer insulating film. A passivation film is formed on the second electrode pad and the interlayer insulating film, and has an opening which exposes a portion of the second electrode pad. A contact plug is formed between the first and second electrode pads in a region which does not overlap the opening when viewed in a direction perpendicular to the surface of the semiconductor substrate.

Abstract: A method for fabricating a semiconductor device, includes forming an opening in a first film, embedding an alignment mark material for alignment with an upper layer in the opening, forming a second film on the first film in which the alignment mark material is embedded, irradiating the second film formed in a predetermined region including a position where the alignment mark material is embedded with a processing light, thereby to remove the second film to an extent that a portion of the second film remains in the predetermined region, and exposing the portion of the second film remaining in the predetermined region to an etching environment for etching the second film.

Abstract: A semiconductor device which is compact and thin in size, low in resistance of a current path and parasitic inductance and excellent in reliability is provided. This semiconductor device comprises a semiconductor substrate, a first main electrode which is formed on a front surface of the semiconductor substrate, a second main electrode which is formed on a rear surface of the semiconductor substrate, and a conducting portion which is formed in a direction to pierce through the semiconductor substrate, wherein the second main electrode is extracted to the front surface of the semiconductor substrate via the conducting portion. And, the conducting portion is a through via which has a through hole formed through the semiconductor substrate in its thickness direction and a conductive portion which is formed in the through hole and connected to the second main electrode.

Abstract: A method for manufacturing a semiconductor device includes forming a copper anti-diffusion film on a copper trench wiring layer, and forming an opening portion in the copper anti-diffusion film by laser ablation, the opening portion being formed in a region corresponding to an alignment region used for lithography process for forming an aluminum wiring on the copper trench wiring layer.