Patents by Inventor Min Lin

Min Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9613904
    Abstract: A semiconductor structure includes a first substrate, a second substrate, a dam layer, a photoresist layer, and a conductive layer. The first substrate has a conductive pad. The second substrate has a through via, a sidewall surface surrounding the through via, a first surface, and a second surface opposite to the first surface. The through via penetrates through the first and second surfaces. The conductive pad is aligned with the through via. The dam layer is located between the first substrate and the second surface. The dam layer protrudes toward the through via. The photoresist layer is located on the first surface, the sidewall surface, the dam layer protruding toward the through via, and between the conductive pad and the dam layer protruding toward the through via. The conductive layer is located on the photoresist layer and the conductive pad.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: April 4, 2017
    Assignee: XINTEC INC.
    Inventors: Yu-Tung Chen, Chien-Min Lin, Chuan-Jin Shiu, Chih-Wei Ho, Yen-Shih Ho
  • Publication number: 20170077496
    Abstract: Disclosed is a metal gradient-doped cathode material for lithium ion batteries including a hexagonal-crystalline material body and a modifying metal. The metal gradient-doped cathode material is formed by coating modifying metal hydroxide on the surface of the hexagonal-crystalline material using a chemical co-precipitation method, then sintering the modifying metal hydroxide coated hexagonal-crystalline material. The modifying metal is different from the active metals, more concentrated on the surface, and gradually decreases toward the core of particle. A gradient-doped distribution is formed without any boundary or layered structure in the particle. The surface of the powder with more the modifying metal can effectively reduce the reactivity of the cathode material with the electrolyte in the lithium battery.
    Type: Application
    Filed: September 11, 2015
    Publication date: March 16, 2017
    Applicant: FU JEN CATHOLIC UNIVERSITY
    Inventors: Mao-Huang LIU, Chien-Wen JEN, Hsin-Ta HUANG, Cong-Min LIN
  • Patent number: 9586895
    Abstract: A process for producing dimethyl sulfoxide, wherein said process comprises the following steps: (1) contacting hydrogen sulfide with methanol to produce a mixture containing dimethyl sulfide, and separating dimethyl sulfide from the mixture; and (2) in the presence or absence of a solvent, contacting dimethyl sulfide obtained in step (1) with at least one oxidant and a catalyst to produce a mixture containing dimethyl sulfoxide, said catalyst comprises at least one Ti—Si molecular sieve.
    Type: Grant
    Filed: October 29, 2013
    Date of Patent: March 7, 2017
    Assignees: CHINA PETROLEUM & CHEMICAL CORPORATION, RESEARCH INSTITUTE OF PETROLEUM PROCESSING, SINOPEC
    Inventors: Chunfeng Shi, Min Lin, Xingtian Shu, Xuhong Mu, Bin Zhu
  • Patent number: 9591242
    Abstract: An embodiment image sensor includes a pixel region spaced apart from a black level control (BLC) region by a buffer region. In an embodiment, a light shield is disposed over the BLC region and extends into the buffer region. In an embodiment, the buffer region includes an array of dummy pixels. Such embodiments effectively reduce light cross talk at the edge of the BLC region, which permits more accurate black level calibration. Thus, the image sensor is capable of producing higher quality images.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: March 7, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Volume Chien, Yun-Wei Cheng, Che-Min Lin, Shiu-Ko JangJian, Chi-Cherng Jeng, Chih-Mu Huang
  • Patent number: 9586741
    Abstract: A safe package of micro battery with used battery recycling function, which can prevent the children from taking the micro battery easily and swallowed by mistake, comprising a lower cover plate, a folding portion, and an upper cover plate, the same side edge of said lower cover plate and said upper cover plate respectively connected with corresponding side of folding portion; said folding portion configure to fold the upper cover plate in the lower cover plate for fixing integrally and matched mutually; the lower cover plate including a concave part, a insertion slot, an exit slot, and two projecting parts; the upper cover plate including a insertion slit, two sides slits, and an exit slit thereby taking the new micro battery and recycled the used battery via double hands.
    Type: Grant
    Filed: February 2, 2015
    Date of Patent: March 7, 2017
    Assignee: PONI GREENTEK CO., LTD.
    Inventors: Peng-Yi Kuo, Wang Ting Hung, Shu Min Lin
  • Patent number: 9581512
    Abstract: A pressure sensor comprises a first substrate and a cap attached to the first substrate. The cap includes a processing circuit, a cavity and a deformable membrane separating the cavity and a port open to an outside of the pressure sensor. Sensing means are provided for converting a response of the deformable membrane to pressure at the port into a signal capable of being processed by the processing circuit. The cap is attached to the first substrate such that the deformable membrane faces the first substrate and such that a gap is provided between the deformable membrane and the first substrate which gap contributes to the port. The first substrate comprises a support portion the cap is attached to, a contact portion for electrically connecting the pressure sensor to an external device, and one or more suspension elements for suspending the support portion from the contact portion.
    Type: Grant
    Filed: October 23, 2014
    Date of Patent: February 28, 2017
    Assignee: INVENSENSE, INC.
    Inventors: Chung-Hsien Lin, Rene Hummel, Ulrich Bartsch, Marion Hermersdorf, Tsung Lin Tang, Wang Shen Su, Chia Min Lin
  • Publication number: 20170042682
    Abstract: A method of forming an implant to be implanted into living bone. The implant includes titanium. The method includes deforming at least a portion of a surface of the implant to produce a first micro-scale topography. The method further includes removing at least a portion of the surface to produce a second micro-scale topography superimposed on the first topography. The second micro-scale topography is generally less coarse than the first micro-scale topography. The method further includes adding a submicron topography superimposed on the first and second micro-scale topographies, the submicron topography including tube-like structures.
    Type: Application
    Filed: August 10, 2016
    Publication date: February 16, 2017
    Inventors: Daniel Mandanici, Zachary B. Suttin, Keng-Min Lin, Olga Sanchez
  • Patent number: 9571068
    Abstract: A power gating circuit and a control method for power gating switch thereof are provided. The power gating circuit includes a first switch, the power gating switch, a pre-charge circuit, and a control circuit. A first terminal and a second terminal of the first switch are coupled to a first voltage and the control terminal of the power gating switch, respectively. A first terminal and a second terminal of the power gating switch are coupled to a second voltage and a function circuit, respectively. An input signal defines a powered period of the function circuit. According to the input signal, the pre-charge circuit pre-charges the control terminal of the power gating switch during the first sub-period of the powered period, and the control circuit controls the first switch to charge the control terminal of the power gating switch by the first voltage during the second sub-period of the powered period.
    Type: Grant
    Filed: August 3, 2015
    Date of Patent: February 14, 2017
    Assignee: Winbond Electronics Corp.
    Inventor: Che-Min Lin
  • Publication number: 20170041166
    Abstract: Disclosed are a compressive sensing system based on a personalized basis and a method thereof; first a sensing end senses an original signal and transmits the original signal to a reconstruction end; the reconstruction end generates a personalized basis by means of a dictionary learning method; next, the sensing end is made to sample the original signal according to a sampling matrix to generate a compressed signal and transmit the compressed signal to the reconstruction end, so that the reconstruction end executes a compressive sensing reconstruction algorithm according to the personalized basis and the compressed signal to recover the compressed signal into the original signal, thereby achieving an effect of improving signal recovering quality and a compression ratio.
    Type: Application
    Filed: July 29, 2016
    Publication date: February 9, 2017
    Applicant: NATIONAL TAIWAN UNIVERSITY
    Inventors: Yu-Min LIN, Yi CHEN, Hung-Chi KUO, An-Yeu WU
  • Publication number: 20170040980
    Abstract: A power gating circuit and a control method for power gating switch thereof are provided. The power gating circuit includes a first switch, the power gating switch, a pre-charge circuit, and a control circuit. A first terminal and a second terminal of the first switch are coupled to a first voltage and the control terminal of the power gating switch, respectively. A first terminal and a second terminal of the power gating switch are coupled to a second voltage and a function circuit, respectively. An input signal defines a powered period of the function circuit. According to the input signal, the pre-charge circuit pre-charges the control terminal of the power gating switch during the first sub-period of the powered period, and the control circuit controls the first switch to charge the control terminal of the power gating switch by the first voltage during the second sub-period of the powered period.
    Type: Application
    Filed: August 3, 2015
    Publication date: February 9, 2017
    Inventor: Che-Min Lin
  • Publication number: 20170040378
    Abstract: A method includes forming a plurality of pixels formed on a front surface of a semiconductor substrate, forming an array of color filters over the plurality of pixels, each color filter being adapted for allowing a wavelength of light radiation to reach at least one of the plurality of pixels, forming a plurality of micro-lenses over the array of color filters, and forming a second layer between the pixels and the color filters. The second layer further includes a structure adapted for blocking light radiation that is traveling towards a region between adjacent micro-lens, further wherein the plurality of micro-lenses are in contact with the array of color filters, and wherein the structure and the transparent material are coplanar at respective top surfaces thereof, and further wherein the structure directly contacts a bottom surface of at least one of the color filters.
    Type: Application
    Filed: October 17, 2016
    Publication date: February 9, 2017
    Inventors: Chin-Min Lin, Ching-Chun Wang, Dun-Nian Yaung, Chun-Ming Su, Tzu-Hsuan Hsu
  • Publication number: 20170023961
    Abstract: A method for generating a power distribution network (PDN) is provided. A heterogeneous circuit data is input. A plurality of horizontal power lines and a plurality of vertical power lines are determined according to the heterogeneous circuit data. A PDN model of the heterogeneous circuit is determined according to the horizontal power lines and the vertical power lines. Power consumption value is assigned to a plurality of internal nodes of the PDN model of the heterogeneous circuit. The PDN model of the heterogeneous circuit is adjusted to meet a target voltage drop limitation of the heterogeneous circuit data.
    Type: Application
    Filed: November 18, 2015
    Publication date: January 26, 2017
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chang-Tzu LIN, Ding-Ming KWAI, Tzu-Min LIN
  • Publication number: 20170025395
    Abstract: A light emitting device including a first work circuit and a second work circuit is provided. The first work circuit includes a first LED chip and a first bonding adhesive. The first LED chip and the first bonding adhesive are electrically connected in series. The second work circuit includes a second LED chip. When an operation current of the first work circuit and an operation current of the second work circuit are the same, the first work circuit has a first voltage VW1 and the second work circuit has a second voltage VW2, wherein VW1?VW2.
    Type: Application
    Filed: July 22, 2016
    Publication date: January 26, 2017
    Inventors: Chien-Chih Chen, Ya Chin Tu, Chun Min Lin, Chieh-Yu Kang
  • Patent number: 9550667
    Abstract: A semiconductor structure includes a first substrate, a second substrate, a first sensing structure over the first substrate, and between the first substrate and the second substrate, a via extending through the second substrate, and a second sensing structure over the second substrate, and including an interconnect structure electrically connected with the via, and a sensing material at least partially covering the interconnect structure.
    Type: Grant
    Filed: September 8, 2015
    Date of Patent: January 24, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTRUING COMPANY LTD.
    Inventors: Cheng San Chou, Chin-Min Lin, Chen Hsiung Yang
  • Publication number: 20170009951
    Abstract: A light-guiding pillar used in a vehicle lamp includes a major structure and a light-guiding structure. The major structure has a light incident surface, a light outgoing surface, an upper surface, and a bottom surface. The upper surface and the bottom surface are disposed between the light incident surface and the light outgoing surface, in which the upper surface and the bottom surface are opposite to each other. The major structure is configured to guide a portion of a light beam entering the major structure through the light incident surface to the light caving surface. The light-guiding structure is disposed on the upper surface and configured to guide another portion of the light beam entering the major structure through the light incident surface from the upper surface to the bottom surface with passing through the bottom surface.
    Type: Application
    Filed: February 26, 2016
    Publication date: January 12, 2017
    Inventors: Yu-Min Lin, Shih-Kai Lin, Mong-Ea Lin
  • Publication number: 20170009950
    Abstract: A light-guiding pillar used in a vehicle lamp includes a major structure and a light-guiding structure. The major structure has a light incident surface, a light outgoing surface, an upper surface, and a bottom surface. The upper surface and the bottom surface are disposed between the light incident surface and the light outgoing surface, in which the upper surface and the bottom surface are opposite to each other. The major structure is configured to guide a portion of a light beam entering the major structure through the light incident surface to the light outgoing surface. The light-guiding structure is disposed on the upper surface and configured to guide another portion of the light beam entering the major structure through the light incident surface from the upper surface to the bottom surface with passing through the bottom surface.
    Type: Application
    Filed: October 13, 2015
    Publication date: January 12, 2017
    Inventors: Yu-Min Lin, Shih-Kai Lin, Mong-Ea Lin
  • Patent number: 9543210
    Abstract: A method includes forming a first mask over a substrate through a double patterning process, wherein the first mask comprises a horizontal portion and a plurality of vertical portions protruding over the horizontal portion, and wherein the vertical portions are spaced apart from each other, applying a first etching process to the first mask until a top surface of a portion of the substrate is exposed, applying a second etching process to the substrate to form intra-device openings and inter-device openings, wherein the inter-device openings are formed at the exposed portion of the substrate, filling the inter-device openings and the intra-device openings to form inter-device insulation regions and intra-device insulation regions and etching back the inter-device insulation regions and the intra-device insulation regions to form a plurality of fins protruding over top surfaces of the inter-device insulation regions and the intra-device insulation regions.
    Type: Grant
    Filed: September 5, 2015
    Date of Patent: January 10, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Ping Chen, Hui-Min Lin, Ming-Jie Huang, Tung Ying Lee
  • Patent number: 9541836
    Abstract: In accordance with some embodiments, a method and an apparatus for baking photoresist patterns are provided. The method includes putting a wafer over a heating assembly. A photoresist pattern is formed over a top surface of the wafer. The method further includes curing the wafer from the top surface of the wafer by a curing assembly while heating the wafer from a bottom surface of the wafer by a heating assembly.
    Type: Grant
    Filed: February 10, 2014
    Date of Patent: January 10, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chin-Min Lin, De-Fang Huang, Ching-Hui Tsao
  • Patent number: 9536963
    Abstract: An electrode structure of a transistor, and a pixel structure and a display apparatus comprising the electrode structure of the transistor are disclosed. The electrode structure of the transistor comprises a first electrode and a second electrode. The first electrode has at least two first portions and at least one second portion. The first portions are substantially parallel with each other and each has a first width. The second portion has a second width, and connects the substantially parallel first portions to define a space with an opening. The first width is substantially greater than the second width.
    Type: Grant
    Filed: March 7, 2007
    Date of Patent: January 3, 2017
    Assignee: AU OPTRONICS CORP.
    Inventors: Yu-Min Lin, Kuo-Lung Fang, Feng-Yuan Gan
  • Patent number: 9537701
    Abstract: A joint estimation and compensation method of RF imperfections in a LIE (Long Term Evolution) uplink system comprises steps: establishing a joint signal model with RF imperfections; according to the joint signal model, undertaking estimation and compensation of CFO, DC offset, multipath channel, IQ imbalance and shaping filter imbalance of a received signal; and using a frequency equalizer to equalize said received signal and determine modulation data. For reducing computational complexity, the present invention further converts the received signal from a time domain to a frequency domain to undertake frequency domain compensation. The present invention can indeed solve the problems of IQ imbalance, filter imbalance, DC offset, multipath channel and CFO and effectively estimate and compensate RF imperfections in the LTE uplink system.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: January 3, 2017
    Assignee: Yuan Ze University
    Inventors: Juinn-Horng Deng, Hung-Yang Hsieh, Jeng-Kuang Hwang, Yi-Hsin Lin, Sheng-Yang Huang, Kuang-Min Lin