Abstract: A fan assembly for use in an electronic device is provided. The fan assembly includes a housing, a fan, a throttle valve, and a regulator. The housing has an outlet. The fan is disposed in the housing and adapted to provide an air current. The air current generates an air volume through the outlet. The throttle valve is movably disposed in the housing at the outlet. The regulator is connected to the throttle valve to control the movement of the throttle valve to adjust the size of the outlet.

Abstract: A low-voltage power switch includes a gate-controlled circuit and a switch. The gate-controlled circuit generates a control voltage lower than the voltage of ground according to a control signal. The switch includes a first end, a second end, and a control end. The first end of the switch is coupled to a power supply of a low voltage, the control end of the switch is coupled to the gate-controlled circuit for receiving the gate-controlled signal, and the second end of the switch couples the first end of the switch when the switch receives the gate-controlled signal for outputting the power supply of the low voltage.

Abstract: Techniques for improving energy conversion efficiency in photovoltaic devices are provided. In one aspect, an antimony (Sb)-doped film represented by the formula, Cu1-yIn1-xGaxSbzSe2-wSw, provided, wherein: 0?x?1, and ranges therebetween; 0?y?0.2, and ranges therebetween; 0.001?z?0.02, and ranges therebetween; and 0?w?2, and ranges therebetween. A photovoltaic device incorporating the Sb-doped CIGS film and a method for fabrication thereof are also provided.

Abstract: The present invention discloses an electronic device and related method for performing a compensation operation on an electronic element, wherein the electronic device includes: a control module, for outputting a control signal according to an input signal; a driver module, coupled to the control module and the electronic element, for providing a driving current to the electronic element according to the control signal; a sensor module, for outputting at least a sensor signal according to a variation of an operation environment; a compensation control module, coupled to the sensor module, for outputting at least a compensation control signal according to the at least a sensor signal and the input signal; and a compensation driver module, coupled to the electronic element and the compensation control module, for providing at least a compensation driving current to the electronic element according to the at least a compensation control signal.

Abstract: The present invention provides a method of reducing current of a memory in a self-refreshing mode and a related memory. The memory includes a word line driver and a controller, and the word line driver includes a transistor. The transistor has a control terminal, a first terminal coupled to a word line, and a second terminal. The method includes: after the memory enters the self-refreshing mode: controlling a voltage difference between the control terminal and the second terminal to correspond to a first value during a self-refreshing operation period; and controlling a voltage difference between the control terminal and the second terminal to correspond to a second value smaller than the first value during a non self-refreshing operation period.

Abstract: The present invention provides a photovoltaic device, such as, a solar cell, having a substrate and an absorber layer disposed on the substrate. The absorber layer includes a doped or undoped composition represented by the formula: Cu1-yIn1-xGaxSe2-zSz wherein 0?x?1; 0?y?0.15 and 0?z?2; wherein the absorber layer is formed by a solution-based deposition process which includes the steps of contacting hydrazine and a source of Cu, a source of In, a source of Ga, a source of Se, and optionally a source of S, and further optionally a source of a dopant, under conditions sufficient to produce a homogeneous solution; coating the solution on the substrate to produce a coated substrate; and heating the coated substrate to produce the photovoltaic device. A photovoltaic device and a process for making same based on a hydrazinium-based chalcogenide precursor are also provided.

Abstract: A DNA molecule consisting of the nucleotide sequence of SEQ ID NO: 1, which encodes a collagenous (COL1) domain and a C-terminal noncollagenous (NC1) domain of type XXI collagen. Expression systems and methods for the expression of the DNA molecule are also provided.

Abstract: The present invention discloses a memory row architecture having memory row redundancy repair function. The memory row architecture includes a plurality of normal memory sections and a plurality of redundancy memory sections, wherein a number of the plurality of normal memory sections is more than two, a number of the plurality of redundancy memory sections is equal to the number of the plurality of normal memory sections, and a redundancy memory section is implemented in one side of each of the plurality of normal memory sections. In addition, the plurality of normal memory sections and the plurality of redundancy memory sections respectively having an odd serial number make up a first memory row redundancy repair module, and the plurality of normal memory sections and the plurality of redundancy memory sections respectively having an even serial number make up a second memory row redundancy repair module.

Abstract: The present invention discloses an electronic device and related method for performing a compensation operation on an electronic element, wherein the electronic device includes: a control module, for outputting a control signal according to an input signal; a driver module, coupled to the control module and the electronic element, for providing a driving current to the electronic element according to the control signal; a sensor module, for outputting at least a sensor signal according to a variation of an operation environment; a compensation control module, coupled to the sensor module, for outputting at least a compensation control signal according to the at least a sensor signal and the input signal; and a compensation driver module, coupled to the electronic element and the compensation control module, for providing at least a compensation driving current to the electronic element according to the at least a compensation control signal.

Abstract: A terminal computer display assembly, which fixes a monitor onto a rotary supporting base provided. The support has a set of rails with a plurality of positioning units longitudinally aligned, and an inclined angular-positioning unit to limit the backward inclination of the support within a particular range of angles. The monitor is fixed onto a sliding block which is attached to the set of rails, allowing the monitor to move up or down freely for in a suitable highly location. A buffering unit is installed between the sliding block and the base, and it can prevent the monitor from falling instantaneously while positioning the height. The base is furthermore built with a circuit board inside for act as in interface for connecting to other accessories.

Abstract: Circuits and methods to minimize power required for sensing and precharge of DRAMs have been achieved. A control circuit ensures that during READ operations the duration of sensing of DRAM cell and precharging is kept to a minimum. A test DRAM cell is used to determine the exact time required for data sensing. Furthermore no precharging is performed during WRITE-operations. In case data is changing from “1” to “0” or vice versa data lines are inverted accordingly during WRITE operation.

Abstract: Circuits and methods to minimize power required for sensing and precharge of DRAMs have been achieved. A control circuit ensures that during READ operations the duration of sensing of DRAM cell and precharging is kept to a minimum. A test DRAM cell is used to determine the exact time required for data sensing. Furthermore no precharging is performed during WRITE-operations. In case data is changing from “1” to “0” or vice versa data lines are inverted accordingly during WRITE operation.

Abstract: A collagen scaffold domain, including a collagenous or collagen-like domain, which directs self-trimerization is provided. The collagen scaffold domain can be fused to one or more heterologous domains, such as an antibody domain. Methods for generating and using the scaffold domains and fusion proteins are also provided.

Abstract: A test method and implementation is described to test an internal data path within a DDR DRAM during a read operation. A worse case test sequence and a compliment of the worse case test sequence is stored within memory. The test sequence and its compliment are arranged within a data word such that upon read out of the data word, the test sequences or the compliment of the test sequences is applied to a plurality of wire connections of the internal data path. Each test sequence comprises a plurality of logical bits of the same value followed by a bit of the opposite value, which tests for charge buildup on each element of the internal data path. Adjacent elements of the internal data path connect test sequences that are compliments to maximize voltage differentials and enhance possibility of signal coupling between wire elements of the internal data path.

Abstract: Circuits and methods to minimize power required for sensing and precharge of DRAMs have been achieved. A control circuit ensures that during READ operations the duration of sensing of DRAM cell and precharging is kept to a minimum. A test DRAM cell is used to determine the exact time required for data sensing. Furthermore no precharging is performed during WRITE-operations. In case data is changing from “1” to “0” or vice versa data lines are inverted accordingly during WRITE operation.

Abstract: A sense amplifier-based latch is provided. It comprises an input circuit, a sense amplifier, a latch circuit and an output circuit. By employing the latch circuit, the variation frequency of an output signal and a complementary output signal as well as lots of charge consumption is reduced. Accordingly, the invention has less glitches and malfunctions, thus suitable for high-speed circuit applications.

Abstract: A process for fabricating a trench power semiconductor device is disclosed. A first dielectric layer between the pad oxide layer and the mask oxide layer is formed so as to form a gate with a height higher than the surface of the pad oxide layer after the first dielectric layer is removed. In addition, a sidewall structure is formed at laterals of the gate protruded from the surface of the trench structure. Hence the source structure and the first conductive layer formed at the surface of the gate can be isolated through the sidewall structure. When the trench power semiconductor device is processed at high frequency, the net resistance of the gate can be reduced by the first conductive layer, and thus the electrical properties thereof can be elevated.

Abstract: A fuse circuit for repair and detection includes a fuse resistor, a reference resistor, a voltage sensing circuit, an OP amplifier and a latch circuit. The resistance difference is correctly sensed by means of the voltage sensing circuit and the OP amplifier according to a voltage difference. Hence, whether the fuse resistor is programmed or not is accurately detected by the logic level of the output signal.

Abstract: Disclose is a protein complex that includes triple-helix-coil forming fusion polypeptide chains, each having a scaffold domain and a heterologous domain. Also disclosed are related isolated fusion polypeptide, nucleic acids, vectors, host cells, and preparation methods.

Abstract: A method for improving manufacturability of a design includes performing space or enclosure checks on multiple interacting layers of a layout design and then using the resulting space or enclosure data to move predetermined feature edges in an altered design database to decrease the risk of features widths, feature spaces or feature enclosures being patterned smaller than designed. In some embodiments, the upsized features are larger in the wafer circuit pattern than are drawn in a designed database. The method for improving manufacturability of a design, in some embodiments, is stored on a computer readable storage medium.