Abstract: Disclosed is a flexible display substrate and a method for manufacturing the same which can avoid break and peeling of film layers disposed on a flexible base and further reduce degree of a warpage occurred in the flexible base when separating the support substrate from the flexible base located above the support substrate. The flexible display substrate comprises the flexible base, a first buffer layer and a second buffer layer disposed on an upper surface and a lower surface of the flexible base, respectively, and a plurality of display modules disposed on the first buffer layer, each display module includes at least one thin film transistor and at least one electrode corresponding to the thin film transistor.

Abstract: A semiconductor device has a semiconductor die. The semiconductor die has a contact pad. A first conductive layer is formed over the contact pad. A conductive shell having a hollow core is formed over the first conductive layer. A compliant material is deposited in the hollow core. The semiconductor die is mounted over a substrate with the conductive shell electrically connected to a conductive trace on the substrate. A second conductive layer is formed over the conductive shell. The compliant material is an insulating material. A bump material is deposited around the conductive shell. A pre-solder material is deposited over the conductive trace. The conductive shell has a cross-sectional width less than 7 micrometers. The second conductive layer is a conductive lip. Mounting the semiconductor die over the substrate further includes mounting the semiconductor die over the substrate in a bump on lead (BOL) configuration.

Abstract: The present invention discloses a flat speaker output device and a method for starting the same. Wherein, a plurality of flat speakers utilizes an initial delay unit and a plurality of intermediary delay units connected in series. The initial delay unit connects with the power controller and a first one of the flat speakers. The intermediary delay units respectively connect with the residual each flat speakers. The power controller controls a power source to the initial delay unit to delay the start of the first one of flat speakers, and outputs the power source to the intermediary delay units to sequentially delay the starts time of the residual each flat speaker. The present invention can sequentially start flat speakers without using a high-output power supply device and thus decrease the required capacity of the external power supply device.

Abstract: A semiconductor device has a semiconductor wafer and a first conductive layer formed over the semiconductor wafer as contact pads. A first insulating layer formed over the first conductive layer. A second conductive layer including an interconnect site is formed over the first conductive layer and first insulating layer. The second conductive layer is formed as a redistribution layer. A second insulating layer is formed over the second conductive layer. An opening is formed in the second insulating layer over the interconnect site. The opening extends to the first insulating layer in an area adjacent to the interconnect site. Alternatively, the opening extends partially through the second insulating layer in an area adjacent to the interconnect site. An interconnect structure is formed within the opening over the interconnect site and over a side surface of the second conductive layer. The semiconductor wafer is singulated into individual semiconductor die.

Abstract: A semiconductor device has a substrate. A first conductive layer is formed over the substrate. A first insulating layer is formed over the substrate. A second insulating layer is formed over the first insulating layer. A second conductive layer is formed over the second insulating layer. The second insulating layer is formed to include a cylindrical shape. The second conductive layer is formed as an under bump metallization layer. A first opening is formed in the second insulating layer. A second opening is formed in the second insulating layer around the first opening in the second insulating layer. An opening is formed in the first insulating layer over the first conductive layer. An opening is formed in the second insulating layer over the first conductive layer with the opening of the first insulating layer being greater than the opening of the second insulating layer.

Abstract: The present invention discloses a flat speaker output device and a method for starting the same. Wherein, a plurality of flat speakers utilizes an initial delay unit and a plurality of intermediary delay units connected in series. The initial delay unit connects with the power controller and a first one of the flat speakers. The intermediary delay units respectively connect with the residual each flat speakers. The power controller controls a power source to the initial delay unit to delay the start of the first one of flat speakers, and outputs the power source to the intermediary delay units to sequentially delay the starts time of the residual each flat speaker. The present invention can sequentially start flat speakers without using a high-output power supply device and thus decrease the required capacity of the external power supply device.

Abstract: A membrane micropump includes a vibration chamber, at least one flow guide, at least one fluid inlet, at least one fluid outlet, at least one inlet rectifier, at least one outlet rectifier, a vibration membrane and an actuator. The vibration chamber includes at least one chamber inlet and at least one chamber outlet. The flow guide can be connected to the chamber inlet, the vibration chamber, the chamber outlet or in the vibration chamber, or it can have more pairs to enhance the effects. The inlet rectifier connects the chamber inlet to the fluid inlet. The outlet rectifier connects the chamber outlet to the fluid outlet. The vibration membrane is disposed on the vibration chamber. The actuator is connected to the vibration membrane to reciprocate the vibration membrane, enabling fluid to flow into the vibration chamber via the fluid inlet and flow out thereof via the fluid outlet.

Abstract: A fabricating method and a testing method of a semiconductor device and a mechanical integrity testing apparatus are provided. An object includes a wafer, an insulating layer, and a plurality of conductive posts is provided. A surface of the wafer has a plurality of first blind holes outside chip regions and a plurality of second blind holes inside the chip regions. The insulating layer is between the conductive posts and the walls of the first blind holes and between the conductive posts and the walls of the second blind holes. A mechanical integrity test is performed to test a binding strength between the insulating layer, the conductive posts, and the walls of the first blind holes. The conductive posts in the chip regions are electrically connected to an element after the conductive posts in the first blind holes are qualified in the mechanical integrity test.

Abstract: An LCD panel includes a first substrate, a second substrate, a displaying medium and a sealing structure, wherein the second substrate is located at the side opposite to the first substrate and the displaying medium is located between the first substrate and the second substrate for displaying an image. The sealing structure is located between the first substrate and the second substrate to seal the displaying medium, wherein the sealing structure includes an inner wall, an outer wall and a sealant. The inner wall disposed surrounding the displaying medium and the outer wall disposed surrounding the inner wall together form a sealant-disposing space therebetween. The outer wall has a plurality of side wall holes and the sealant is disposed in the sealant-disposing space. In this way, the sealing structure is able to enhance the structure strength in a limited layout space and promote the process margin.

Abstract: An electrophoresis display panel includes a plurality of first sub-pixels, a plurality of second sub-pixels, a plurality of third sub-pixels, and a plurality of white sub-pixels. The first sub-pixels, the second sub-pixels, and the third sub-pixels are suitable for irradiating different light of three primary colors, respectively, while the white sub-pixels are suitable for irradiating white light. Each of the first sub-pixels does not adjoin the second sub-pixels and the third sub-pixels. Each of the second sub-pixels does not adjoin the third sub-pixels. Each of the first sub-pixels adjoins the white sub-pixels exclusively or adjoins the white sub-pixels and other first sub-pixels exclusively.

Abstract: A semiconductor device has a semiconductor die. The semiconductor die has a contact pad. A first conductive layer is formed over the contact pad. A conductive shell having a hollow core is formed over the first conductive layer. A compliant material is deposited in the hollow core. The semiconductor die is mounted over a substrate with the conductive shell electrically connected to a conductive trace on the substrate. A second conductive layer is formed over the conductive shell. The compliant material is an insulating material. A bump material is deposited around the conductive shell. A pre-solder material is deposited over the conductive trace. The conductive shell has a cross-sectional width less than 7 micrometers. The second conductive layer is a conductive lip. Mounting the semiconductor die over the substrate further includes mounting the semiconductor die over the substrate in a bump on lead (BOL) configuration.

Abstract: An electrophoretic display structure includes a substrate, an activation layer, an electrophoretic display layer, a protective layer, a first sealant, and a second sealant. The activation layer is disposed on the substrate while the electrophoretic display layer is disposed on the activation layer. The electrophoretic display layer has a plurality of electrophoretic display elements and a waterproof layer disposed on the electrophoretic display elements. The protective layer is disposed on the electrophoretic display elements. The protective layer is disposed on the waterproof layer, and the first sealant is disposed between the activation layer and the protective layer to fill in the sides of the electrophoretic display layer. The second sealant covers the outer side of the first sealant and connects with the activation layer and the protective layer. The viscosity of the first sealant in liquid state is lower than the viscosity of the second sealant in liquid state.

Abstract: A measuring apparatus including a first chip, a first circuit layer, a first heater, a first stress sensor and a second circuit layer is provided. The first chip has a first through silicon via, a first surface and a second surface opposite to the first surface. The first circuit layer is disposed on the first surface. The first heater and the first stress sensor are disposed on the first surface and connected to the first circuit layer. The second circuit layer is disposed on the second surface.

Abstract: By adding particles of high thermal conductivity and low thermal expansion coefficient into the copper as a composite material and filling with the composite material into the through-via hole, the mismatch of the coefficient of thermal expansion and the stress of the through-silicon via are lowered and the thermal conductivity of the through-silicon via is increased.

Abstract: A display device includes a display panel, a barrier layer, a protective layer, a first optical adhesive layer and a second optical adhesive layer. The barrier layer is disposed above the display panel. The protective layer is disposed above the barrier layer. The first optical adhesive layer with a first thickness is disposed between the display panel and the barrier layer. The second optical adhesive layer with a second thickness is disposed between the protective layer and the barrier layer. The first thickness is larger than the second thickness.

Abstract: A fabricating method and a testing method of a semiconductor device and a mechanical integrity testing apparatus are provided. An object includes a wafer, an insulating layer, and a plurality of conductive posts is provided. A surface of the wafer has a plurality of first blind holes outside chip regions and a plurality of second blind holes inside the chip regions. The insulating layer is between the conductive posts and the walls of the first blind holes and between the conductive posts and the walls of the second blind holes. A mechanical integrity test is performed to test a binding strength between the insulating layer, the conductive posts, and the walls of the first blind holes. The conductive posts in the chip regions are electrically connected to an element after the conductive posts in the first blind holes are qualified in the mechanical integrity test.

Abstract: By adding particles of high thermal conductivity and low thermal expansion coefficient into the copper as a composite material and filling with the composite material into the through-via hole, the mismatch of the coefficient of thermal expansion and the stress of the through-silicon via are lowered and the thermal conductivity of the through-silicon via is increased.

Abstract: An electrophoretic display device includes a substrate, an electrophoretic component layer, a first optical adhesive, a barrier layer, a second optical adhesive, a protective layer, and a sealant. The first optical adhesive and the second optical adhesive contribute in helping to provide light exposure to the sealant. One of the first optical adhesive and the second optical adhesive is capable of absorbing the light of predetermined wavelength and is adapted to expose the sealant.

Abstract: A flexible display panel includes a first flexible substrate, a second flexible substrate, a display medium, and a sealant. The first flexible substrate has a plurality of non-folding areas and at least one folding area located between the non-folding areas. The non-folding areas are separated. The second flexible substrate is configured above the first flexible substrate. The display medium is configured between the first flexible substrate and the second flexible substrate. The sealant is configured on the first flexible substrate to surround the display medium. The elasticity of the sealant in the folding area is greater than the elasticity of the sealant in the non-folding areas.

Abstract: A stacked-chip packaging structure includes chip sets, a heat sink, a substrate, a circuit board, and solder balls. The chip sets are stacked together, each of which has a heat-dissipation structure and a chip. The heat-dissipation structure has a chip recess, through holes arranged in the chip recess, and an extending portion extending from the chip recess. The chip disposed in the chip recess has bumps. Each bump on the chip is correspondingly disposed in one of the through holes of the heat-dissipation structure. The extending portion of the heat-dissipation structure of each chip set contacts that of the neighboring chip set. The heat sink and the substrate are disposed at two opposite sides of the chip sets, respectively. The circuit board is below the substrate. The solder balls are between the circuit board and the substrate.