Patents by Inventor Ming-Che Hsieh

Ming-Che Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120135547
    Abstract: A fabricating method and a testing method of a semiconductor device and a mechanical integrity testing apparatus are provided. An object includes a wafer, an insulating layer, and a plurality of conductive posts is provided. A surface of the wafer has a plurality of first blind holes outside chip regions and a plurality of second blind holes inside the chip regions. The insulating layer is between the conductive posts and the walls of the first blind holes and between the conductive posts and the walls of the second blind holes. A mechanical integrity test is performed to test a binding strength between the insulating layer, the conductive posts, and the walls of the first blind holes. The conductive posts in the chip regions are electrically connected to an element after the conductive posts in the first blind holes are qualified in the mechanical integrity test.
    Type: Application
    Filed: February 9, 2011
    Publication date: May 31, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ming-Che Hsieh, John H. Lau, Ra-Min Tain
  • Patent number: 8188360
    Abstract: A thermoelectric conversion device includes a hot terminal substrate, a cold terminal substrate and a stacked structure. The stacked structure is disposed between the hot terminal substrate and the cold terminal substrate. The stacked structure includes thermoelectric conversion layers each including a thermoelectric couple layer, a first conductive layer and a second conductive layer, a first heat-conductive and electrically insulating structure and a second heat-conductive and electrically insulating structure. Each of the thermoelectric conversion layers is arranged in the stacked structure. The first conductive layer includes first conductive materials and is arranged on tops of P/N type thermoelectric conversion elements. The second conductive layer includes second conductive materials and is arranged on bottoms of the P/N type thermoelectric conversion elements. The first heat-conductive and electrically insulating structure is connected between two adjacent first conductive layers.
    Type: Grant
    Filed: April 24, 2009
    Date of Patent: May 29, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Suh-Yun Feng, Chun-Kai Liu, Ming-Che Hsieh, Chih-Kuang Yu
  • Publication number: 20120098739
    Abstract: A spliced electrophoretic display panel includes a plurality of electrophoretic display units arranged in an array and connected to one another. Each of the electrophoretic display units includes a first substrate, a second substrate, an electrophoretic display layer, and a sealant. The second substrate is configured under the first substrate. At least one edge of the first substrate goes beyond an edge of the second substrate. The electrophoretic display layer is configured between the first substrate and the second substrate. An image displayed by the electrophoretic display layer is observed via the first substrate. The sealant is connected to the electrophoretic display layer, the first substrate, and the second substrate. Besides, the sealant surrounds the electrophoretic display layer. The first substrate of each of the electrophoretic display units is connected to the adjacent first substrate.
    Type: Application
    Filed: March 12, 2011
    Publication date: April 26, 2012
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Ming-Che Hsieh, Shih-Hsing Hung, Chih-Jen Hu
  • Publication number: 20120087002
    Abstract: An electrophoretic display structure includes a substrate, an activation layer, an electrophoretic display layer, a protective layer, a first sealant, and a second sealant. The activation layer is disposed on the substrate while the electrophoretic display layer is disposed on the activation layer. The electrophoretic display layer has a plurality of electrophoretic display elements and a waterproof layer disposed on the electrophoretic display elements. The protective layer is disposed on the electrophoretic display elements. The protective layer is disposed on the waterproof layer, and the first sealant is disposed between the activation layer and the protective layer to fill in the sides of the electrophoretic display layer. The second sealant covers the outer side of the first sealant and connects with the activation layer and the protective layer. The viscosity of the first sealant in liquid state is lower than the viscosity of the second sealant in liquid state.
    Type: Application
    Filed: September 16, 2011
    Publication date: April 12, 2012
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Ming-Che Hsieh, Shih-Hsing Hung
  • Patent number: 8149498
    Abstract: A package structure of flexible display device includes a flexible opto-electronic display panel, a first barrier layer and a second barrier layer. The flexible opto-electronic display panel includes a backplane, a flexible frontplane, and a display media layer. The display media layer is disposed between the flexible frontplane and the backplane, where the display media layer is substantially corresponding to a display region of the backplane, and at least one side of the display media layer aligns with one corresponding side of the backplane. The first barrier layer is disposed on a first surface of the flexible frontplane, where the flexible frontplane, the display media layer and the first barrier layer expose a bonding region of the backplane. The second barrier layer is disposed on a second surface of the backplane.
    Type: Grant
    Filed: August 29, 2010
    Date of Patent: April 3, 2012
    Assignee: AU Optronics Corp.
    Inventors: Ming-Che Hsieh, Shih-Hsing Hung, Chih-Jen Hu
  • Patent number: 8102058
    Abstract: The disclosure provides a chip package structure and method for fabricating the same. The chip package structure includes at least one chip having at least one through via. At least one stress buffering structure is disposed in the through via. The stress buffering structure includes a first gasket and a second gasket. A supporting pillar has two terminals respectively connected to the first gasket and the second gasket. The cross-sectional area of the supporting pillar is smaller than areas of the first gasket and the second gasket. A buffering layer is sandwiched between the first gasket and the second gasket, surrounding a sidewall of the supporting pillar. An insulating layer is disposed on the through via, surrounding a sidewall of the stress buffering structure.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: January 24, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Che Hsieh, Ra-Min Tain, Wei Li
  • Patent number: 8089603
    Abstract: A method of fabricating an LCD panel includes the following steps. A patterned black matrix layer is formed on a first surface of the first substrate, wherein the patterned black matrix layer includes a plurality of black-matrix patterns disposed at boundaries of adjacent first and second sub-pixel regions. Then, a first color filter layer is formed and patterned such that the patterned first color filter layer is disposed in the first sub-pixel regions and covers surfaces of the black-matrix patterns at a side of first sub-pixel regions concurrently. After that, a second color filter layer is formed and patterned so that the patterned second color filter layer is disposed in the second sub-pixel regions. A plurality of spacers are disposed on the first surface, disposed on the surfaces of the black-matrix patterns and the surface of the first color filter layer covering the black-matrix patterns.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: January 3, 2012
    Assignee: Au Optronics Corp.
    Inventors: Chih-Wei Chu, Ming-Che Hsieh, Shih-Yu Wang
  • Publication number: 20110309357
    Abstract: A measuring apparatus including a first chip, a first circuit layer, a first heater, a first stress sensor and a second circuit layer is provided. The first chip has a first through silicon via, a first surface and a second surface opposite to the first surface. The first circuit layer is disposed on the first surface. The first heater and the first stress sensor are disposed on the first surface and connected to the first circuit layer. The second circuit layer is disposed on the second surface.
    Type: Application
    Filed: December 8, 2010
    Publication date: December 22, 2011
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ra-Min Tain, John H. Lau, Ming-Che Hsieh, Wei Li, Ming-Ji Dai
  • Publication number: 20110292492
    Abstract: An electrophoretic display device includes a substrate, an electrophoretic component layer, a first optical adhesive, a barrier layer, a second optical adhesive, a protective layer, and a sealant. The first optical adhesive and the second optical adhesive contribute in helping to provide light exposure to the sealant. One of the first optical adhesive and the second optical adhesive is capable of absorbing the light of predetermined wavelength and is adapted to expose the sealant.
    Type: Application
    Filed: May 25, 2011
    Publication date: December 1, 2011
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Ming-Che Hsieh, Shih-Hsing Hung, Chih-Jen Hu
  • Publication number: 20110273760
    Abstract: A display device includes a display panel, a barrier layer, a protective layer, a first optical adhesive layer and a second optical adhesive layer. The barrier layer is disposed above the display panel. The protective layer is disposed above the barrier layer. The first optical adhesive layer with a first thickness is disposed between the display panel and the barrier layer. The second optical adhesive layer with a second thickness is disposed between the protective layer and the barrier layer. The first thickness is larger than the second thickness.
    Type: Application
    Filed: August 2, 2010
    Publication date: November 10, 2011
    Applicant: AU OPTRONICS CORP.
    Inventors: Ming-Che HSIEH, Shih-Hsing HUNG, Chih-Jen HU
  • Patent number: 8035791
    Abstract: A display panel includes a first substrate, a second substrate, a sealant, a plurality of spacers, and a display medium layer. The first substrate has a pixel array and a peripheral circuit. The sealant, the spacers, and the display medium layer are disposed between the first and the second substrate. The pixel array is surrounded by the sealant and located on a portion of the peripheral circuit. A multi-layer conductive wiring structure is disposed in the region of the peripheral circuit covered with the sealant. The multi-layer conductive wiring structure includes first and second conductive wirings. The second conductive wirings are connected to the pixel array via the first conductive wirings. An extending direction of the first conductive wirings is substantially different from that of the second conductive wirings. The spacers are distributed at two opposite sides of the sealant and respectively located between two adjacent first conductive wirings.
    Type: Grant
    Filed: July 30, 2008
    Date of Patent: October 11, 2011
    Assignee: Au Optronics Corporation
    Inventors: Chih-Wei Chu, Ming-Che Hsieh, Chung-Wei Liu, Shih-Yu Wang
  • Publication number: 20110235160
    Abstract: A package structure of flexible display device includes a flexible opto-electronic display panel, a first barrier layer and a second barrier layer. The flexible opto-electronic display panel includes a backplane, a flexible frontplane, and a display media layer. The display media layer is disposed between the flexible frontplane and the backplane, where the display media layer is substantially corresponding to a display region of the backplane, and at least one side of the display media layer aligns with one corresponding side of the backplane. The first barrier layer is disposed on a first surface of the flexible frontplane, where the flexible frontplane, the display media layer and the first barrier layer expose a bonding region of the backplane. The second barrier layer is disposed on a second surface of the backplane.
    Type: Application
    Filed: August 29, 2010
    Publication date: September 29, 2011
    Inventors: Ming-Che Hsieh, Shih-Hsing Hung, Chih-Jen Hu
  • Patent number: 8004079
    Abstract: A chip package structure includes a substrate, a chip, a thermal conductive layer, a plurality of signal contacts, and a molding compound. The substrate includes a plurality of first thermal conductive vias, a connecting circuit, and a plurality of signal vias electrically connected to the connecting circuit, and the substrate has a chip disposing region. The chip is disposed on the chip disposing region of the substrate and electrically connected to the signal vias through the connecting circuit. The thermal conductive layer is disposed over the substrate, connected to the first thermal conductive vias, and located above the chip disposing region. Besides, the thermal conductive layer has first openings exposing the signal vias. The signal contacts are respectively disposed in the first openings and connected to the signal vias. The molding compound encapsulates the chip.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: August 23, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Ra-Min Tain, Yu-Lin Chao, Shu-Jung Yang, Rong-Chang Fang, Wei Li, Chih-Yuan Cheng, Ming-Che Hsieh
  • Patent number: 7973904
    Abstract: An liquid crystal display panel includes a first substrate, a second substrate, a liquid crystal layer disposed between the first and second substrates, a patterned black matrix layer disposed on the surface of the first substrate, a patterned first color filter layer disposed on the first substrate having a protruding portion that covers a portion of the patterned black matrix layer, a plurality of first ball spacers disposed on the surface of the patterned black matrix layer, and a plurality second ball spacers disposed on the surface of the protruding portion of the patterned first color filter layer. The bottom surfaces of the second ball spacers and the bottom surfaces of the first ball spacers respectively are disposed on different planes in the liquid crystal display panel.
    Type: Grant
    Filed: January 20, 2009
    Date of Patent: July 5, 2011
    Assignee: AU Optronics Corp.
    Inventors: Chih-Wei Chu, Ming-Che Hsieh, Shih-Yu Wang
  • Publication number: 20110158832
    Abstract: A membrane micropump includes a vibration chamber, at least one flow guide, at least one fluid inlet, at least one fluid outlet, at least one inlet rectifier, at least one outlet rectifier, a vibration membrane and an actuator. The vibration chamber includes at least one chamber inlet and at least one chamber outlet. The flow guide can be connected to the chamber inlet, the vibration chamber, the chamber outlet or in the vibration chamber, or it can have more pairs to enhance the effects. The inlet rectifier connects the chamber inlet to the fluid inlet. The outlet rectifier connects the chamber outlet to the fluid outlet. The vibration membrane is disposed on the vibration chamber. The actuator is connected to the vibration membrane to reciprocate the vibration membrane, enabling fluid to flow into the vibration chamber via the fluid inlet and flow out thereof via the fluid outlet.
    Type: Application
    Filed: May 25, 2010
    Publication date: June 30, 2011
    Applicant: NATIONAL TAIWAN UNIVERSITY
    Inventors: An-Bang Wang, Ming-Che Hsieh, I-Chun Lin, Wen-Huei Tsai
  • Publication number: 20110111668
    Abstract: A method of fabricating an LCD panel includes the following steps. A patterned black matrix layer is formed on a first surface of the first substrate, wherein the patterned black matrix layer includes a plurality of black-matrix patterns disposed at boundaries of adjacent first and second sub-pixel regions. Then, a first color filter layer is formed and patterned such that the patterned first color filter layer is disposed in the first sub-pixel regions and covers surfaces of the black-matrix patterns at a side of first sub-pixel regions concurrently. After that, a second color filter layer is formed and patterned so that the patterned second color filter layer is disposed in the second sub-pixel regions. A plurality of spacers are disposed on the first surface, disposed on the surfaces of the black-matrix patterns and the surface of the first color filter layer covering the black-matrix patterns.
    Type: Application
    Filed: January 21, 2011
    Publication date: May 12, 2011
    Inventors: Chih-Wei Chu, Ming-Che Hsieh, Shih-Yu Wang
  • Publication number: 20110108973
    Abstract: The disclosure provides a chip package structure and method for fabricating the same. The chip package structure includes at least one chip having at least one through via. At least one stress buffering structure is disposed in the through via. The stress buffering structure includes a first gasket and a second gasket. A supporting pillar has two terminals respectively connected to the first gasket and the second gasket. The cross-sectional area of the supporting pillar is smaller than areas of the first gasket and the second gasket. A buffering layer is sandwiched between the first gasket and the second gasket, surrounding a sidewall of the supporting pillar. An insulating layer is disposed on the through via, surrounding a sidewall of the stress buffering structure.
    Type: Application
    Filed: March 26, 2010
    Publication date: May 12, 2011
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ming-Che Hsieh, Ra-Min Tain, Wei Li
  • Publication number: 20110102313
    Abstract: An electrophoresis display panel includes a plurality of first sub-pixels, a plurality of second sub-pixels, a plurality of third sub-pixels, and a plurality of white sub-pixels. The first sub-pixels, the second sub-pixels, and the third sub-pixels are suitable for irradiating different light of three primary colors, respectively, while the white sub-pixels are suitable for irradiating white light. Each of the first sub-pixels does not adjoin the second sub-pixels and the third sub-pixels. Each of the second sub-pixels does not adjoin the third sub-pixels. Each of the first sub-pixels adjoins the white sub-pixels exclusively or adjoins the white sub-pixels and other first sub-pixels exclusively.
    Type: Application
    Filed: April 1, 2010
    Publication date: May 5, 2011
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Ming-Che Hsieh, Chih-Wei Chu, Shih-Yu Wang
  • Publication number: 20110069271
    Abstract: An LCD panel includes a first substrate, a second substrate, a displaying medium and a sealing structure, wherein the second substrate is located at the side opposite to the first substrate and the displaying medium is located between the first substrate and the second substrate for displaying an image. The sealing structure is located between the first substrate and the second substrate to seal the displaying medium, wherein the sealing structure includes an inner wall, an outer wall and a sealant. The inner wall disposed surrounding the displaying medium and the outer wall disposed surrounding the inner wall together form a sealant-disposing space therebetween. The outer wall has a plurality of side wall holes and the sealant is disposed in the sealant-disposing space. In this way, the sealing structure is able to enhance the structure strength in a limited layout space and promote the process margin.
    Type: Application
    Filed: December 10, 2009
    Publication date: March 24, 2011
    Applicant: Au Optronics Corporation
    Inventors: Chih-Wei Chu, Ming-Che Hsieh, Shih-Yu Wang
  • Patent number: 7843517
    Abstract: A touch panel including a first substrate, a second substrate, a sealant, a liquid crystal layer, a main spacer, a first sensing spacer, a second sensing spacer, a first opposite electrode and a second opposite electrode is provided. The first substrate has a central area and a peripheral area. The second substrate is disposed opposite to the first substrate. The first sensing spacer is disposed on the central area and between the first and the second substrates. The second sensing spacer is disposed on the peripheral area and between the first and the second substrates. There's a first sensing gap between the first sensing spacer and the first opposite electrode disposed corresponding to the first sensing spacer. There's a second sensing gap between the second sensing spacer and the second opposite electrode disposed corresponding to the second sensing spacer. The first sensing gap is larger than the second sensing gap.
    Type: Grant
    Filed: November 28, 2008
    Date of Patent: November 30, 2010
    Assignee: Au Optronics Corporation
    Inventors: Ming-Che Hsieh, Shih-Yu Wang, Chih-Wei Chu