Abstract: A shift register circuit includes a set circuit, a first reset circuit, a first control circuit, and an output circuit. The output circuit is configured to change an active potential at the first node further away from an inactive potential in response to a first clock signal transferred to a signal output terminal being active, and the first control circuit is further configured to, responsive to the first clock signal transferred to the signal output terminal being active, restrict a change in the active potential at the first node based on a second reference voltage from a second reference voltage, the second reference voltage having a magnitude between an active input pulse and the inactive potential.

Abstract: A thin film transistor, a manufacturing method thereof, an array substrate and a display panel are provided. The thin film transistor includes: a base substrate; and a gate electrode, a gate insulating layer, an active layer and a source/drain electrode layer which are on the base substrate. The source/drain electrode layer includes a source electrode and a drain electrode. The thin film transistor further includes a light blocking layer surrounding the active layer.

Abstract: The present disclosure provides a shift register unit, which includes an input circuit, a reset circuit, a noise reduction circuit, and an output circuit. The input circuit is configured to control a voltage of a first node based on a first input signal and a second input signal, and control a voltage of a second node based on a first voltage and the voltage of the first node. The reset circuit is configured to reset the voltage of the first node and the voltage of the second node. The noise reduction circuit is configured to maintain a reset voltage of the first node and a reset voltage of the second node. The output circuit is configured to provide, for an output terminal of the output circuit, a second clock signal from a second clock signal terminal or the second voltage. The shift register unit is composed of switch elements.

Abstract: The embodiments of the present disclosure provide a shift register, a gate driving circuit and a display apparatus. The shift register comprises an input unit, a first reset unit, a node control unit, a gate-shaping unit, a first output unit and a second output unit. The shift register is configured to change a potential of a scan signal outputted from a driving signal output terminal, so as to produce a scan signal having a gate-shaped waveform.

Abstract: The present disclosure provides a shift register unit, which includes an input circuit, a reset circuit, a noise reduction circuit, and an output circuit. The input circuit is configured to control a voltage of a first node based on a first input signal and a second input signal, and control a voltage of a second node based on a first voltage and the voltage of the first node. The reset circuit is configured to reset the voltage of the first node and the voltage of the second node. The noise reduction circuit is configured to maintain a reset voltage of the first node and a reset voltage of the second node. The output circuit is configured to provide, for an output terminal of the output circuit, a second clock signal from a second clock signal terminal or the second voltage. The shift register unit is composed of switch elements.

Abstract: A shift register circuit is disclosed that includes an input control circuit configured to set a first node at a first potential in response to an active pulse signal from a signal input terminal, an output control circuit configured to supply a clock signal from a first clock signal terminal to a signal output terminal in response to the first node being at the first potential, the first potential being less than a potential of the active pulse signal and greater than or equal to a potential for maintaining operation of the output control circuit, and a reset circuit configured to supply a reference voltage from a reference voltage terminal to the first node and the signal output terminal in response to a reset signal.

Abstract: This disclosure provides a gate driving unit, comprising an input sub-circuit, a pull-up sub-circuit, a transmission sub-circuit, an output sub-circuit, a reset sub-circuit, a pull-down sub-circuit and a storage sub-circuit, an input signal input terminal, a first clock signal input terminal, a second clock signal input terminal, a third clock signal input terminal, a fourth clock signal input terminal, a reset signal input terminal, a first level input terminal, a second level input terminal and a gate driving signal output terminal. This disclosure further provides a gate driving circuit and a driving method thereof, as well as a display device.

Abstract: A method of making nanoscale belts including: providing a semiconductor thin film, placing stripe masks on the semiconductor thin film, the thickness of the stripe masks is H, the spacing distance between adjacent stripe masks is L; depositing a first thin film layer along a first direction, the thickness of the first thin film layer is D, a first angle between first direction and a direction along thickness of the stripe masks is ?1, ?1<tan?1(L/H); depositing a second thin film layer along a second direction, a second angle between second direction and the direction along thickness of the stripe masks is ?2, ?2<tan?1[L/(H+D)], 0<L?Htan ?1?(H+D)tan ?2<10 nm, the first thin film layer partly overlaps with the second thin film layer to form an overlapping structure; dry etching the first thin film layer and the second thin film layer to obtain a nanoscale microstructure; etching the semiconductor thin film.

Abstract: A method of making nanostructures including: locating a photoresist mask layer on a substrate, the thickness of the photoresist mask layer is H; forming a patterned mask layer includes a plurality of stripe masks, a spacing distance between adjacent stripe masks equals L; depositing a first thin film layer along a first direction, the thickness of the first thin film layer is D, a first angle between the first direction and a direction along the thickness of stripe masks is ?1, ?1<tan?1 (L/H); depositing a second thin film layer along a second direction, a second angle between the second direction and the direction along the thickness of stripe masks is ?2, ?2<tan?1[L/(H+D)], 0<L?H tan ?1?(H+D)tan ?2<10 nm, the first thin film layer partly overlaps with the second thin film layer to form an overlapping structure; etching the first thin film layer and the second thin film layer to obtain a nanoscale microstructure.

Abstract: A method of making nanoscale channels including: providing a substrate, locating a photoresist mask layer on the substrate, the thickness of the photoresist mask layer equals H; forming a patterned mask layer by exposing and developing the photoresist mask layer, the patterned mask layer includes a plurality of parallel and spaced stripe masks, the spacing between adjacent stripe masks equals L; depositing a first thin film layer on the substrate in a first direction, the thickness of the first thin film layer equals D, a first angle between the first direction and a direction in the thickness of the stripe masks equals ?1, ?1<tan?1(L/H); depositing a second thin film layer on the substrate in a second direction, a second angle between the second direction and the direction in the thickness of the stripe masks equals ?2, ?2<tan?1[L/(H+D)], 0<H tan ?1+(H+D)tan ?2?L<10 nm.

Abstract: A method of making thin film transistor including: forming a gate electrode, forming a gate insulating layer on the gate electrode; locating a semiconductor layer on the gate insulating layer; placing stripe-shaped masks on the semiconductor layer, wherein the thickness of the stripe-shaped masks is H, the spacing distance between the stripe-shaped masks is L; depositing a first conductive film layer along a first direction, the thickness of the first conductive film layer is D, a first angle between the first direction and a direction along the thickness of the stripe-shaped masks is ?1, ?1<tan?1(L/H); depositing a second conductive film layer along a second direction, a second angle between the second direction and the direction along the thickness of the stripe-shaped masks is ?2, ?2<tan?1[L/(H+D)], 0<H tan ?1+(H+D)tan ?2?L<10 nm, the first conductive film layer forms a source electrode, the second conductive film layer forms a drain electrode.

Abstract: A method of making a grating, the method including: providing a substrate, placing a first photoresist layer on the substrate, locating a second photoresist layer on the first photoresist layer, wherein a second exposure dose of the second photoresist layer is greater than a first exposure dose of the first photoresist layer; exposing the first photoresist layer and the second photoresist layer; developing the first photoresist layer and the second photoresist layer and removing an exposed photoresist to form a patterned photoresist layer and obtain an exposed surface of the substrate, wherein the patterned photoresist layer defines a plurality of top surfaces and a plurality of side surfaces, each adjacent top surface and side surface, and the exposed surface form a Z-type surface; depositing a preformed layer on the Z-type surface to form a Z-type structure; removing the patterned photoresist layer.

Abstract: A display substrate and a display device are disclosed. The display substrate includes an active area and a non-active area, and an afterimage removing device for adsorbing charged ions by forming a potential difference is provided in the non-active area.

Abstract: The disclosure discloses a shift register and a method for driving the same, a corresponding gate driving circuit and a display device. In the shift register, a pull-up driving unit is connected with a pull-up unit via a pull-up node, a discharge auxiliary unit is used for pulling low the potential of the pull-up node according to a discharge control signal, a discharge driving unit is used for pulling high the potential of a gate line connected with the signal output terminal of the shift register according to the discharge control signal, and a reset unit is further used for pulling low again the potential of the gate line connected with the signal output terminal of the shift register, after the discharge driving unit pulls high the potential of the gate line and the outputting of it finishes.

Abstract: Disclosed is a pixel driving circuit, comprising a driving control circuit, a first driving circuit and a second driving circuit. The driving control circuit is configured to control one of the first driving circuit and the second driving circuit to be turned on under the condition the first scanning line outputs an effective voltage signal, and control the other of the first driving circuit and the second driving circuit to be turned on under the condition the second scanning line outputs an effective voltage signal. The first driving circuit is configured to drive the light emitting circuit to emit light under control of the driving control circuit. The second driving circuit is configured to drive the light emitting circuit to emit light under control of the driving control circuit.

Abstract: Embodiments of the present invention disclose a beamforming method, a receiver, a transmitter, and a system. The beamforming method includes: controlling, according to a preset rule, connection or disconnection of N analog channels corresponding to N antenna array elements, to obtain an independently received equivalent signal at each of the N antenna array elements, where N is a natural number greater than or equal to 2; obtaining, based on the independently received equivalent signal at each of the N antenna array elements, a beamforming weight; and sending the beamforming weight to a transmitter. According to the embodiments of the present invention, costs can be reduced, and relatively good interference suppression performance can be obtained.

Abstract: This disclosure provides a gate driving unit, comprising an input sub-circuit, a pull-up sub-circuit, a transmission sub-circuit, an output sub-circuit, a reset sub-circuit, a pull-down sub-circuit and a storage sub-circuit, an input signal input terminal, a first clock signal input terminal, a second clock signal input terminal, a third clock signal input terminal, a fourth clock signal input terminal, a reset signal input terminal, a first level input terminal, a second level input terminal and a gate driving signal output terminal. This disclosure further provides a gate driving circuit and a driving method thereof, as well as a display device.

Abstract: A method of making a thin film transistor, the method including: forming a gate insulating layer on a gate electrode; placing a semiconductor layer on the gate insulating layer; locating a first photoresist layer, a nanowire structure, a second photoresist layer on the semiconductor layer, the nanowire structure being sandwiched between the first photoresist layer and the second photoresist layer, wherein the nanowire structure comprises one nanowire; forming one opening in the first photoresist layer and the second photoresist layer to form an exposed surface, wherein a part of the nanowire is exposed in the opening; depositing a conductive film layer on the exposed surface of the semiconductor layer, wherein the conductive film layer defines a nano-scaled channel corresponding to the nanowire, the conductive film layer is divided into two regions, one region is used as a source electrode, the other region is used as a drain electrode.

Abstract: A method of making nano-scaled channel, the method including: locating a first photoresist layer, a nanowire structure, and a second photoresist layer on a surface of a substrate, and the nanowire structure being sandwiched between the first photoresist layer and the second photoresist layer, wherein the nanowire structure comprises an nanowire; forming an opening in the first photoresist layer and the second photoresist layer to expose a portion of the surface of the substrate to form an exposed surface, wherein a part of the nanowire is exposed and suspended in the opening, and both ends of the nanowire are sandwiched between the first photoresist layer and the second photoresist layer; and depositing a thin film layer on the exposed surface of the substrate using the a nanowire as a mask, wherein the thin film layer defines a nano-scaled channel corresponding to the at least one nanowire.

Abstract: A method of making a thin film transistor, the method including: providing an insulating layer on a semiconductor substrate, forming a semiconductor layer on the insulating layer; locating a first photoresist layer, a nanowire structure, a second photoresist layer on the semiconductor layer, wherein the nanowire structure comprises a nanowire; forming an opening in the first photoresist layer and the second photoresist layer to form an exposed surface, wherein a part of the nanowire is exposed in the opening; depositing a conductive film layer on the exposed surface of the semiconductor layer, wherein the conductive film layer defines a nano-scaled channel corresponding to the nanowire, and the conductive film layer is divided into two regions by the nano-scaled channel, one region is used as a source electrode, and the other region is used as a drain electrode; forming a gate electrode on the semiconductor substrate.