Abstract: The embodiments of the present disclosure provide a shift register, a gate driving circuit and a display apparatus. The shift register comprises an input unit, a first reset unit, a node control unit, a gate-shaping unit, a first output unit and a second output unit. The shift register is configured to change a potential of a scan signal outputted from a driving signal output terminal, so as to produce a scan signal having a gate-shaped waveform.

Abstract: A Mura compensation circuit and method, a driving circuit and a display device are provided. The Mura compensation circuit comprises: a vertical Mura compensation unit, for providing a corresponding gamma voltage to a vertical block Mura region and a vertical non-Mura region of a display panel respectively, to compensate for a vertical Mura phenomenon; and/or a horizontal Mura compensation unit, for providing a corresponding gate drive signal and/or a corresponding charging/discharging control signal to a horizontal block Mura region and a horizontal non-Mura region of a display panel respectively, to compensate for a horizontal Mura phenomenon. The Mura compensation circuit can make the different regions of the display panel have the same display effect, and improve reduction of display quality caused by impedance difference at different positions of the display panel, thereby raising the quality of a picture, and can be promoted and applied widely.

Abstract: The present application discloses an array substrate including a base substrate, a first signal line layer on the base substrate having a plurality of first signal lines, an insulating layer on a side of the first signal line layer distal to the base substrate, a second signal line layer having a plurality of second signal lines on a side of the insulating layer distal to the first signal line layer; the plurality of second signal lines crossing over the plurality of first signal lines defining a plurality of subpixels, a passivation layer on a side of the second signal line layer distal to the insulating layer, and a test electrode layer having a plurality of test electrodes on a side of the passivation layer distal to the second signal line layer; each of the test electrode electrically connected to one of a first signal line and a second signal line.

Abstract: A photolithography mask plate, the photolithography mask plate including: a substrate; a carbon nanotube layer on the substrate; a patterned chrome layer on the carbon nanotube layer, wherein the patterned chrome layer and the carbon nanotube layer have the same pattern; a cover layer on the patterned chrome layer.

Abstract: A method of making microstructures, the method including: providing a first substrate, setting a photoresist layer on a surface of the first substrate; covering a surface of the photoresist layer with a photolithography mask plate, wherein the photolithography mask plate comprises a second substrate and a carbon nanotube composite layer located on a surface of the second substrate; exposing the photoresist layer to form an exposed photoresist layer by irradiating the photoresist layer through the photolithography mask plate with ultraviolet light; developing the exposed photoresist layer to obtain a patterned photoresist microstructures.

Abstract: A photolithography mask plate, the photolithography mask plate including: a substrate; a carbon nanotube composite structure on a surface of the substrate, wherein the carbon nanotube composite structure comprises a carbon nanotube layer and a chrome layer coated on the carbon nanotube layer; a cover layer on the carbon nanotube composite structure.

Abstract: A photolithography mask plate, the photolithography mask plate including: a substrate; a carbon nanotube layer located on the substrate; a patterned chrome layer located on the carbon nanotube layer, wherein the patterned chrome layer and the carbon nanotube layer have the same pattern; a cover layer located on the patterned chrome layer.

Abstract: The present disclosure provides a gate driving circuit, a method for detecting the gate driving circuit, an array substrate and a display apparatus. The gate driving circuit comprises a plurality of cascaded gate driving units, access units, a first signal line and a second signal line. Each access unit is connected to its corresponding gate driving unit and the gate driving unit at the next stage to its corresponding gate driving unit. The access unit corresponding to the gate driving unit at each odd stage is connected to the first signal line such that the first signal line detects an output signal from that gate driving unit via the access unit, and the access unit corresponding to the gate driving unit at each even stage is connected to the second signal line such that the second signal line detects an output signal from that gate driving unit via the access unit.

Abstract: Embodiments of the present invention disclose a method and an apparatus for transmitting data. The apparatus for transmitting data includes a high frequency radio unit HFRU that is in a communication connection with a site, and a shift frequency radio unit SFRU that is in a communication connection with the HFRU and with a user equipment, where the HFRU includes a high frequency radio unit—indoor device unit HFRU-IDU and a high frequency radio unit—outdoor device unit HFRU-ODU that connects to the HFRU-IDU, and the SFRU includes a high frequency band transceiver and a wireless cellular band transceiver. By converting to-be-transmitted data into intermediate frequency signals for transmission, the method and apparatus for transmitting data according to the embodiments of the present invention can remarkably reduce a data transmission bandwidth, thereby saving bandwidth resources, reducing a data transmission cost, and reducing a device deployment cost.

Abstract: The disclosure discloses a shift register and a method for driving the same, a corresponding gate driving circuit and a display device. In the shift register, a pull-up driving unit is connected with a pull-up unit via a pull-up node, a discharge auxiliary unit is used for pulling low the potential of the pull-up node according to a discharge control signal, a discharge driving unit is used for pulling high the potential of a gate line connected with the signal output terminal of the shift register according to the discharge control signal, and a reset unit is further used for pulling low again the potential of the gate line connected with the signal output terminal of the shift register, after the discharge driving unit pulls high the potential of the gate line and the outputting of it finishes.

Abstract: A frequency-generating circuit includes a frequency synthesizer circuit and a reference clock signal processor. The frequency synthesizer circuit receives a processed reference clock signal and generates a radio-frequency clock signal according to the processed reference clock signal. The reference clock signal processor receives an original reference clock signal from an oscillator and processes the original reference clock signal according to an indication signal to generate the processed reference clock signal. The indication signal is generated according to a required reference clock frequency of a communications apparatus. When the required reference clock frequency is high, a frequency of the processed reference clock signal is a multiple of a frequency of the original reference clock signal, and when the required reference clock frequency is low, the frequency of the original reference clock signal is a multiple of the frequency of the processed reference clock signal.

Abstract: A gate driver unit, a gate driver circuit and a driving method thereof, and a display device are disclosed. In the gate driver unit, an input module is configured to pull up a voltage at a pulling-up node to a high level, the pulling-up node being a connection node of an output end of the input module and a control end of an output module; the output module is configured to output a gate driving signal under a control of a second dock signal; a pulling-up module is configured to reverse the voltage at the pulling-up node under a control of a fourth clock signal; a pulling-down module is configured to reverse a voltage at an output end of the output module under a control of the second clock signal; and a reset module is configured to reset the output end of the output module.

Abstract: The present disclosure provides a pixel driver circuit, a pixel circuit, a display panel and a display device. The pixel driver circuit includes two pixel driving units having an identical structure. Each pixel driving unit includes a driving transistor and a driving control module. A gate electrode of the driving transistor is connected to the driving control module, a first electrode thereof receives a first power voltage, and a second electrode thereof is connected to the driving control module and a light-emitting element. The driving control module is connected to a data line, a gate line, and the gate electrode and the second electrode of the driving transistor, and controls a potential at the gate electrode of the driving transistor in accordance with a data voltage applied to the data line under control of a gate driving signal from the gate line, so as to turn on/off the driving transistor.

Abstract: A gate driver unit, a gate driver circuit and a driving method thereof, and a display device are disclosed. In the gate driver unit, an input module is configured to pull up a voltage at a pulling-up node to a high level, the pulling-up node being a connection node of an output end of the input module and a control end of an output module; the output module is configured to output a gate driving signal under a control of a second dock signal; a pulling-up module is configured to reverse the voltage at the pulling-up node under a control of a fourth clock signal; a pulling-down module is configured to reverse a voltage at an output end of the output module under a control of the second clock signal; and a reset module is configured to reset the output end of the output module.

Abstract: A repair circuit, a display substrate, and a related display panel and a repair method are disclosed. The repair circuit comprises a repair unit and at least three repair lines electrically connected to the repair unit. The repair unit comprises a charging module, an input module, and a pull-down module. The charging module is configured to charge when a first level signal is transmitted on a first repair line and discharge after the transmission of the first level signal is completed on the first repair line. The input module is configured to provide a first driving signal to a second repair line when the charging module discharges. The pull-down module is configured to pull down a discharge level of the charging module and pull down an output level of by the input module when the first level signal is transmitted on a third repair line.

Abstract: A method for making a grating includes the following steps. A first photoresist film is formed on a substrate. A second photoresist film is applied on the first photoresist film. A number of first cavities are formed in the second photoresist film, wherein part of the first photoresist film is exposed to form a first exposed part. A number of second cavities are formed, wherein part of the surface of the substrate is exposed to form an exposed surface. A mask layer is deposited on the second photoresist film and the exposed surface of the substrate. A patterned mask layer is formed, and part of the substrate is exposed to form a second exposed part. The second exposed part of the substrate is etched through the patterned mask layer. The patterned mask layer is removed.

Abstract: Described is a method of forming a mineralized material by co-culturing epithelial cell, such as ameloblast, and mesenchymal cell, such as osteoblast or odontoblast, in a mineral-stimulating medium. Also described is a matrix seeded with epithelial cells and mesenchymal cells and infused with a mineral-stimulating medium capable of forming a mineralized material in the matrix. Methods of manufacturing such compositions and methods of treating mineralization-related conditions are also described.

Abstract: The invention discloses an array substrate, a display panel and a driving method thereof. The array substrate is divided into a plurality of pixel units, each pixel unit comprises a discharge module therein, and the control terminal of the discharge module is connected with a gate line in a row previous to the row where the pixel unit is located, so that a pixel electrode of the pixel unit in the current row is connected with a low-level. signal terminal when the previous row of gate line is scanned. The invention can avoid afterimages and improve the display quality.

Abstract: The disclosure relates to a light emitting device. The light emitting device includes a first electrode, a first semiconductor layer, an active layer, a second semiconductor layer and a second electrode. The first electrode is electrically connected to the first semiconductor layer. The second electrode is electrically connected to the second semiconductor layer. At least one of the first electrode and the second electrode comprises a metal metamaterial layer. The metal metamaterial layer comprises a number of metamaterial units arranged to form a periodic array. A distance between the metal metamaterial layer and the active layer is less than or equal to 100 nanometers. The display device using the light emitting device is also provided.

Abstract: Scan flip-flop and associated method are provided. The scan flip-flop includes a data input terminal, a scan input terminal, a flip-flop circuit, a first transistor and a plurality of second transistors. A gate of the first transistor is coupled to the scan input terminal, gates of the second transistors are commonly coupled to an enabling signal, drains and sources of the first transistor and the second transistors are serially coupled to the flip-flop circuit, so as to increase a delay between the scan input terminal and the flip-flop circuit.