Abstract: An IGBT has layers between emitter and collector sides. The layers include a collector layer on the collector side, a drift layer, a base layer of a second conductivity type, a first source region arranged on the base layer towards the emitter side, a trench gate electrode arranged lateral to the base layer and extending deeper into the drift layer than the base layer, a well arranged lateral to the base layer and extending deeper into the drift layer than the base layer, an enhancement layer surrounding the base layer so as to completely separate the base layer from the drift layer and the well, an electrically conducting layer covering the well and separated from the well by a second electrically insulating layer, and a third insulating layer having a recess on top of the electrically conducting layer such that the electrically conducting layer electrically contacts a emitter electrode.

Abstract: An IGBT has layers between emitter and collector sides. The layers include a drift layer, a base layer electrically contacting an emitter electrode and separated from the drift layer, a first source region arranged on the base layer towards the emitter side and electrically contacting the emitter electrode, and a first trench gate electrode arranged lateral to the base layer and separated from the base layer, the first source region and the drift layer by a first insulating layer. A channel exits between the emitter electrode, the first source region, the base layer and the drift layer. A second insulating layer is arranged on top of the first trench gate electrode. An enhancement layer separates the base layer from the drift layer in a plane parallel to the emitter side. A grounded gate electrode includes a second, grounded trench gate electrode and an electrically conducting layer.

Abstract: A power semiconductor device is disclosed with layers of different conductivity types between an emitter electrode on an emitter side and a collector electrode on a collector side. The device can include a drift layer, a first base layer in direct electrical contact to the emitter electrode, a first source region embedded into the first base layer which contacts the emitter electrode and has a higher doping concentration than the drift layer, a first gate electrode in a same plane and lateral to the first base layer, a second base layer in the same plane and lateral to the first base layer, a second gate electrode on top of the emitter side, and a second source region electrically insulated from the second base layer, the second source region and the drift layer by a second insulating layer.

Abstract: A semiconductor module as disclosed can include a reverse conducting transistor, with a gate, a collector and an emitter providing a reverse conducting diode between collector and emitter; at least one freewheeling diode connected antiparallel to the transistor having a forward voltage drop higher than the reverse conducting diode during a static state; and a controller to turn the transistor on and off. The controller can apply a pulse to the transistor gate before the reverse conducting diode enters a blocking state, such that when the reverse conducting diode enters the blocking state, a forward voltage drop of the reverse conducting diode is higher than of the at least one freewheeling diode.

Abstract: A method for manufacturing a bipolar punch-through semiconductor device is disclosed, which includes providing a wafer having a first and a second side, wherein on the first side a high-doped layer of the first conductivity type having constant high doping concentration is arranged; epitaxially growing a low-doped layer of the first conductivity type on the first side; performing a diffusion step by which a diffused inter-space region is created at the inter-space of the layers; creating at least one layer of the second conductivity type on the first side; and reducing the wafer thickness within the high-doped layer on the second side so that a buffer layer is created, which can include the inter-space region and the remaining part of the high-doped layer, wherein the doping profile of the buffer layer decreases steadily from the doping concentration of the high-doped region to the doping concentration of the drift layer.

Abstract: A reverse-conducting semiconductor device (RC-IGBT) including a freewheeling diode and an insulated gate bipolar transistor (IGBT), and a method for making the RC-IGBT are provided. A first layer of a first conductivity type is created on a collector side before a second layer of a second conductivity type is created on the collector side. An electrical contact in direct electrical contact with the first and second layers is created on the collector side. A shadow mask is applied on the collector side, and a third layer of the first conductivity type is created through the shadow mask. At least one electrically conductive island, which is part of a second electrical contact in the finalized RC-IGBT, is created through the shadow mask. The island is used as a mask for creating the second layer, and those parts of the third layer which are covered by the island form the second layer.

Abstract: A method for manufacturing a power semiconductor device is disclosed which can include: providing a wafer of a first conductivity type; and applying on a second main side of the wafer at least one of a dopant of the first conductivity type for forming a layer of the first conductivity type and a dopant of a second conductivity type for forming a layer of the second conductivity type. A Titanium layer with a metal having a melting point above 1300° C. is then deposited on the second main side. The Titanium deposition layer is annealed so that simultaneously an intermetal compound layer is formed at the interface between the Titanium deposition layer and the wafer and the dopant is diffused into the wafer. A first metal electrode layer is created on the second main side.

Abstract: A reverse-conducting insulated gate bipolar transistor, particularly a bi-mode insulated gate transistor, is controlled by responding to an ON command by applying high-level gate voltage for a first period, during which a current is fed into a connection point, from which it flows either through the RC-IGBT or along a different path. Based hereon, it is determined whether the RC-IGBT conducts in its forward/IGBT or reverse/diode mode, and the RC-IGBT is either driven at high or low gate voltage. Subsequent conduction mode changes may be monitored in the same way, and the gate voltage may be adjusted accordingly. A special turn-off procedure may be applied in response to an OFF command in cases where the RC-IGBT conducts in the reverse mode, wherein a high-level pulse is applied for a second period before the gate voltage goes down to turn-off level.

Abstract: An exemplary reverse-conducting power semiconductor device with a wafer having a first main side and a second main side parallel to the first main side. The device includes a plurality of diode cells and a plurality of IGCT cells, each IGCT cell including between the first and second main side: a first anode electrode, a first anode layer of a first conductivity type on the first anode electrode, a buffer layer of a second conductivity type on the first anode layer, a drift layer of the second conductivity type on the buffer layer, a base layer of the first conductivity type on the drift layer, a first cathode layer of a second conductivity type on the base layer, and a cathode electrode on the first cathode layer. A mixed part includes the second anode layers of the diode cells alternating with the first cathode layers of the IGCT cells.

Abstract: An insulated gate bipolar device is disclosed which can include layers of different conductivity types between an emitter electrode on an emitter side and a collector electrode on a collector side in the following order: a source region of a first conductivity type, a base layer of a second conductivity type, which contacts the emitter electrode in a contact area, an enhancement layer of the first conductivity type, a floating compensation layer of the second conductivity type having a compensation layer thickness tp, a drift layer of the first conductivity type having lower doping concentration than the enhancement layer and a collector layer of the second conductivity type.

Abstract: A maximum-punch-through semiconductor device such as an insulated gate bipolar transistor (IGBT) or a diode, and a method for producing same are disclosed. The MPT semiconductor device can include at least a two-layer structure having an emitter metallization, a channel region, a base layer with a predetermined doping concentration ND, a buffer layer and a collector metallization. A thickness W of the base layer can be determined by: W = V bd + V pt 4010 ? ? kV ? ? cm - 5 / 8 * ( N D ) 1 / 8 wherein a punch-through voltage Vpt of the semiconductor device is between 70% and 99% of a break down voltage Vbd of the semiconductor device, and wherein the thickness W is a minimum thickness of the base layer between a junction to the channel region and the buffer layer.

Abstract: A power semiconductor device includes a four-layer structure having layers arranged in order: (i) a cathode layer of a first conductivity type with a central area being surrounded by a lateral edge, the cathode layer being in direct electrical contact with a cathode electrode, (ii) a base layer of a second conductivity type, (iii) a drift layer of the first conductivity typehaving a lower doping concentration than the cathode layer, and (iv) an anode layer of the second conductivity type which is in electrical contact with an anode electrode. The base layer includes a first layer as a continuous layer contacting the central area of the cathode layer. A resistance reduction layer, in which the resistance at the junction between the lateral edge of the cathode and base layers is reduced, is arranged between the first layer and the cathode layer and covers the lateral edge of the cathode layer.

Abstract: An exemplary bipolar non-punch-through power semiconductor device includes a semiconductor wafer and a first electrical contact on a first main side and a second electrical contact on a second main side. The wafer has an inner region with a wafer thickness and a termination region that surrounds the inner region, such that the wafer thickness is reduced at least on the first main side with a negative bevel. The semiconductor wafer has at least a two-layer structure with layers of different conductivity types, which can include a drift layer of a first conductivity type, a first layer of a second conductivity type at a first layer depth and directly connected to the drift layer on the first main side and contacting the first electrical contact, and a second layer of the second conductivity type arranged in the termination region on the first main side up to a second layer depth.

Abstract: A semiconductor device which provides a small and simple design with efficient cooling. A first electrically conducting cooling element is in contact with first electrodes of semiconductor elements for forwarding a heat load from the semiconductor elements and for electrically connecting the first electrodes of the semiconductor elements to an external apparatus. A second electrically conducting cooling element is in contact with second electrodes of the semiconductor elements for forwarding a heat load from the semiconductor elements and for electrically connecting the second electrodes of the semiconductor elements to an external apparatus. The semiconductor device includes an interface which is electrically connected to gates of the semiconductor elements for external control of respective states of the semiconductor elements.

Abstract: An IGBT has layers between emitter and collector sides. The layers include a collector layer on the collector side, a drift layer, a base layer of a second conductivity type, a first source region arranged on the base layer towards the emitter side, a trench gate electrode arranged lateral to the base layer and extending deeper into the drift layer than the base layer, a well arranged lateral to the base layer and extending deeper into the drift layer than the base layer, an enhancement layer surrounding the base layer so as to completely separate the base layer from the drift layer and the well, an electrically conducting layer covering the well and separated from the well by a second electrically insulating layer, and a third insulating layer having a recess on top of the electrically conducting layer such that the electrically conducting layer electrically contacts a emitter electrode.

Abstract: An IGBT has layers between emitter and collector sides. The layers include a drift layer, a base layer electrically contacting an emitter electrode and separated from the drift layer, a first source region arranged on the base layer towards the emitter side and electrically contacting the emitter electrode, and a first trench gate electrode arranged lateral to the base layer and separated from the base layer, the first source region and the drift layer by a first insulating layer. A channel exits between the emitter electrode, the first source region, the base layer and the drift layer. A second insulating layer is arranged on top of the first trench gate electrode. An enhancement layer separates the base layer from the drift layer in a plane parallel to the emitter side. A grounded gate electrode includes a second, grounded trench gate electrode and an electrically conducting layer.

Abstract: An IGBT has layers between emitter and collector sides, including a drift layer, a base layer electrically contacting an emitter electrode and completely separated from the drift layer, first and second source regions arranged on the base layer towards the emitter side and electrically contacting the emitter electrode, and first and second trench gate electrodes. The first trench gate electrodes are separated from the base layer, the first source region and the drift layer by a first insulating layer. A channel is formable between the emitter electrode, the first source region, the base layer and the drift layer. A second insulating layer is arranged on top of the first trench gate electrodes. An enhancement layer separates the base layer from the drift layer. The second trench gate electrode is separated from the base layer, the enhancement layer and the drift layer by a third insulating layer.

Abstract: A method for manufacturing a bipolar punch-through semiconductor device is disclosed, which includes providing a wafer having a first and a second side, wherein on the first side a high-doped layer of the first conductivity type having constant high doping concentration is arranged; epitaxially growing a low-doped layer of the first conductivity type on the first side; performing a diffusion step by which a diffused inter-space region is created at the inter-space of the layers; creating at least one layer of the second conductivity type on the first side; and reducing the wafer thickness within the high-doped layer on the second side so that a buffer layer is created, which can include the inter-space region and the remaining part of the high-doped layer, wherein the doping profile of the buffer layer decreases steadily from the doping concentration of the high-doped region to the doping concentration of the drift layer.

Abstract: A method for manufacturing a reverse-conducting semiconductor device (RC-IGBT) with a seventh layer formed as a gate electrode and a first electrical contact on a emitter side and a second electrical contact on a collector side, which is opposite the emitter side, a wafer of a first conductivity type with a first side and a second side opposite the first side is provided. For the manufacturing of the RC-IGBT on the collector side, a first layer of the first conductivity type or of a second conductivity type is created on the second side. A mask with an opening is created on the first layer and those parts of the first layer, on which the opening of the mask is arranged, are removed. The remaining parts of the first layer form a third layer. Afterwards, for the manufacturing of a second layer of a different conductivity type than the third layer, ions are implanted into the wafer on the second side into those parts of the wafer, on which the at least one opening is arranged.

Abstract: An insulated gate bipolar device is disclosed which can include layers of different conductivity types between an emitter electrode on an emitter side and a collector electrode on a collector side in the following order: a source region of a first conductivity type, a base layer of a second conductivity type, which contacts the emitter electrode in a contact area, an enhancement layer of the first conductivity type, a floating compensation layer of the second conductivity type having a compensation layer thickness tp, a drift layer of the first conductivity type having lower doping concentration than the enhancement layer and a collector layer of the second conductivity type.