Abstract: The display device includes a display panel which includes a plurality of pixels, a gate driver which sequentially applies gate-on voltages to the plurality of pixels for a first period and a data driver which generates data voltages for at least two pixels of the plurality of pixels for the first period, and supplies the data voltages to the two pixels of the plurality of pixels, respectively, wherein an application order of the data voltages applied to the at least two pixels of the plurality of pixels is reversed in two adjacent frames.

Abstract: A gate driving circuit is provided which includes a plurality of stages cascade-connected with each other and outputting a plurality of gate signals. An n-th (n is a natural number) stage includes a gate output part, a first node control part and a carry part. The gate output part includes a first transistor. The first transistor outputs a high voltage of a clock signal to a high voltage of an n-th gate signal in response to a high voltage of a control node. The first node control part is connected to the control node to control a signal of the control node and includes at least one transistor having a channel longer than the channel length of the first transistor. The carry part outputs the high voltage of the clock signal to an n-th carry signal in response to the signal of the control node.

Abstract: A power supply apparatus is for supplying power to an electric vehicle by a magnetic induction mechanism. The apparatus includes a power supply structure including a multiple number of power supply rail modules connected in a forward road direction, each power supply rail module including at least one power supply line passage elongated in the forward road direction, a power supply core of a lattice structure provided below the power supply line passage, and a concrete structure incorporating the power supply line passage and the power supply core; at least one power supply line accommodated in the power supply line passage in the forward road direction and surrounded by an insulating pipe; and at least one common line provided in the forward road direction and surrounded by an insulating pipe, for supplying power to the power supply apparatus.

Abstract: A light-emitting diode (LED) fluorescent lamp which can replace a typical fluorescent lamp is provided. The LED fluorescent lamp includes an LED array including a plurality of LEDs connected in series; first through fourth connection pins; first through fourth capacitors connected to the first through fourth connection pins, respectively; a first diode having an commonly connected to second ends of the first and third capacitors and a cathode connected to a first end of the LED array; a second diode having an anode connected to a second end of the LED array and a cathode commonly connected to second ends of the second and fourth capacitors. The LED fluorescent lamp can replace a typical fluorescent lamp without a requirement of the installation of additional equipment or the change of wiring.

Abstract: A thin-film transistor array panel and a manufacturing method thereof are provided for one or more embodiments. The thin-film transistor array panel may include: a substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the gate electrode; a source electrode and a drain electrode formed on the gate insulating layer; and a flatness layer formed on the source electrode and the drain electrode, wherein the drain electrode has a higher height than the flatness layer.

Abstract: A gate driving circuit and a display device having the same, a pull-up unit pulls up a current gate signal by using a first clock signal during a first period of one frame. A pull-up driver coupled to the pull-up unit receives a carry signal from one of the previous stages to turn on the pull-up unit. A pull-up unit receives a gate signal from one of the next stages, discharges the current gate signal to an off voltage level, and turns off the pull-up unit. A holder holds the current gate signal at the voltage level. An inverter turns on/off the holder in response to a first clock signal. A ripple preventer has a source and a gate coupled in common to an output terminal of the pull-up unit and a drain coupled to an input terminal of the inverter, and includes a ripple preventing diode for preventing a ripple from being applied to the inverter.

Abstract: In an array substrate and a display apparatus, a pixel part has a plurality of gate lines, a plurality of data lines, and a plurality of pixels electrically connected to the gate and data lines. A driving circuit drives the pixel part electrically connected to a first end of the gate lines. An inspection circuit is electrically connected to a second end of the gate lines, and inspects the pixel part in response to an inspection signal externally provided. Thus, positions and causes for defects of the pixel part may be accurately detected, thereby improving inspecting efficiency.

Abstract: Disclosed is a liquid crystal display device including a first substrate, a second substrate, and a liquid crystal layer interposed there between. The first substrate is provided with gate lines and data lines thereon. The gate lines and data lines cross with each other and are insulated from each other. Pixel electrodes are stacked on the gate lines and data lines. Each pixel electrode includes first and second sub-pixel electrodes spaced apart from each other and a connection electrode, which connects the first sub-pixel electrode to the second sub-pixel electrode. The second substrate is provided with a common electrode thereon. The common electrode includes a first domain divider formed on the center of the first sub-pixel electrode and a second domain divider formed on the center of the second sub-pixel electrode.

Abstract: A display apparatus has a pixel including a main pixel connected to a main gate line and a data line, and a sub-pixel connected to a sub-gate line and the data line. A main gate driver outputs a main gate pulse to the main gate line during a time period 1H. A sub-gate driver receives the main gate pulse and outputs a sub-gate pulse to the sub-gate line during a first portion of time period 1H. The data driver applies a sub-pixel voltage to the data line during the first portion of time period 1H and applies the main pixel voltage to the data line during a second portion of time period 1H.

Abstract: A gate driver comprises a shift register that has a plurality of stages connected together and outputs a gate signal comprising a first pulse and a second pulse to a gate line. A stage includes a holding part, a pre-charging part, a pull-up part, and a pull-down part. The holding part discharges an output terminal to an off-voltage in response to a first clock signal. The pre-charging part turns off the holding part and outputs the first clock signal as the first pulse to the output terminal in response to an output signal of a previous stage. The pull-up part outputs a second clock signal as the second pulse to the output terminal in response to the output signal of the previous stage. The pull-down part discharges the first output terminal to the off-voltage in response to an output signal of a next stage.

Abstract: An array substrate includes a base substrate, a switching element, and a pixel electrode. The switching element is on the base substrate. The switching element includes a poly silicon pattern having at least one block. Grains are formed in each of the at least one block that are extended in a plurality of directions. The pixel electrode is electrically connected to the switching element. Therefore, current mobility and design margin of the switching element are improved.

Abstract: Provided is a light-emitting diode (LED) fluorescent lamp using as light sources a plurality of LEDs, which are eco-friendly and can contribute to power conservation. The LED fluorescent lamp includes an LED array including a plurality of LEDs connected in series; first through fourth connection pins; first through fourth capacitors connected to the first through fourth connection pins, respectively; a first diode having an anode connected to a second end of the first capacitor and a cathode connected to a first end of the LED array; a second diode having an anode connected to a second end of the LED array and a cathode connected to a second end of the second capacitor; a third diode having an anode connected to the second end of the LED array and a cathode connected to a second end of the third capacitor; and a fourth diode having an anode connected to a second end of the fourth capacitor and a cathode connected commonly to the first end of the LED array and the cathode of the first diode.

Abstract: An array substrate includes a base substrate, a plurality of gate lines, a plurality of data lines and a pixel matrix. The plurality of gate lines and the plurality of data lines define pixel areas. The pixel matrix is formed on each pixel area, and includes a plurality of pixel columns and pixel rows. Each pixel column has a first pixel group and a second pixel group. The first pixel group is electrically connected to a first gate line adjacent to the pixel column. The second pixel group is electrically connected to a second gate line adjacent to the pixel column. Each pixel row is electrically connected to one data line adjacent to the pixel column.

Abstract: A thin film transistor array panel is provided, which includes: a display cell array circuit including a plurality of gate lines, a plurality of data lines, a plurality of thin film transistors, and a plurality of pixel electrodes; a gate driving circuit supplying gate signals to the gate lines; and a signal line connected to the gate driving circuit and including first and second line segments separated from each other and a connection member connected to the first and second line segments through at least a contact hole exposing at least one of the first and the second line segments.

Abstract: A liquid crystal display including: a first substrate on which a first electrode and a first orientation layer are formed; a second substrate facing the first substrate and including a second electrode and a second orientation layer; a sealant formed along edges of the first substrate and the second substrate; and a liquid crystal layer between the first electrode and the second electrode; wherein holes are formed in the first and second orientation layers and the sealant is bonded to the first and second subatrates through both side holes. Since a contact area between the sealant and the substrates is increased and a bonding force is improved, a stable sealing state can be maintained with a small area and a size of a non-pixel region is reduced so that a small-sized liquid crystal display can be achieved.

Abstract: A display substrate includes a base substrate, a signal line, a pad electrode, an organic layer, and a conductive member. The signal line is formed in a display area of the display substrate. The pad electrode extends from the signal line in a peripheral area of the display substrate. The organic layer is formed on the base substrate on which the signal line and the pad electrode are formed with a contact hole formed in correspondence with the pad electrode. The contact hole exposes a portion of the pad electrode. The conductive member includes conductive balls disposed in the contact hole and electrically connects the pad electrode with a connection terminal of a driving part providing a driving signal with the signal lines.

Abstract: A thin film transistor array panel includes a substrate, a data line and a gate electrode formed on the substrate, a insulating layer formed on the data line and the gate electrode, a semiconductor layer formed on the insulating layer, a drain electrode and a source electrode formed on the semiconductor layer, a passivation layer formed on the drain electrode and the source electrode including a first contact hole to expose a portion of the data line, a second contact hole to expose a portion of the source electrode, a third contact hole to expose a portion of the drain electrode, and a fourth contact hole to expose a portion of gate electrode, a first connector formed on the passivation layer and connected to the data line and the source electrode through the first contact hole and the second contact hole, a gate line formed on the passivation layer and connected to the gate electrode through the fourth contact hole, and a pixel electrode connected to the drain electrode through the third contact hole.

Abstract: A gate driving circuit includes stages connected in series. In a stage, a pull-up part pulls up a present gate signal to a level of a first clock signal, and a pull-down part receives a next gate signal from a next stage to discharge the present gate signal to an off-voltage. A pull-up driving part turns on or turns off the pull-up part and the carry part. A holding part holds the present gate signal at the off-voltage and a present inverter turns on or turns off the holding part in response to the first clock signal. A ripple preventing capacitor is connected between a present node and an output terminal of a previous stage's inverter to prevent a ripple at the present Q-node in response to an output signal from the previous inverter.

Abstract: A display substrate includes a pixel electrode, an m-th data line (‘m’ is a natural number), a floating electrode, a (m+1)-th data line and a storage electrode. The pixel electrode is disposed in a pixel area of the substrate. The m-th data line is disposed at a first side of the pixel electrode and electrically connected to the pixel electrode. The floating electrode partially overlaps with the m-th data line. The (m+1)-th data line is disposed at a second side of the pixel electrode. The storage electrode is spaced apart from the (m+1)-th data line.

Abstract: A display substrate includes a first metal pattern formed on a substrate and includes a data line to which a pixel voltage is applied, an insulating layer formed on the substrate on which the first metal pattern is formed, an active pattern formed on the insulating layer, a second metal pattern formed on the insulating layer and including a gate line and a storage line, the gate line crossing the data line, a scanning signal applied to the gate line, a protective layer formed on the substrate on which the second metal pattern is formed, and a pixel electrode formed on the protective layer. A method for manufacturing the display substrate, and a display apparatus including the display substrate are further provided.