Patents by Inventor Osamu Takahashi

Osamu Takahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080313512
    Abstract: A method, an apparatus, and a computer program are provided to utilize built-in self test (BIST) latches for multiple purposes. Conventionally, BIST latches are single purpose. Hence, separate latches are utilized for array built-in self test (ABIST) and logic built-in self test (LBIST) operations. By having the separate latches, though, a substantial amount area is lost. Therefore, to better utilize the latches and the area, ABIST latches are reconfigured to utilize some previously unused ports to allow for multiple uses for the latches, such as for LBIST.
    Type: Application
    Filed: August 25, 2008
    Publication date: December 18, 2008
    Inventors: Steven Ross Ferguson, Garrett Stephen Koch, Osamu Takahashi, Michael Brian White
  • Publication number: 20080298553
    Abstract: Provision is made for a particle-beam treatment system in which, even during particle-beam irradiation, the shape of a multileaf collimator is monitored. The particle-beam treatment system, in which multi-layer conformal irradiation is performed while the setting of the shape of the multileaf collimator in an irradiation head is changed during particle-beam irradiation, is provided with an optical shape-monitoring unit mounted attachably and detachably in the snout portion at the downstream side of the multileaf collimator, the optical shape-monitoring unit having a shape-monitoring mirror, opposing the multileaf collimator, for monitoring the shape of the multileaf collimator; a video camera for shooting the multileaf-collimator shape reflected by the shape-monitoring mirror; and an image monitor for displaying an image of the video camera that shoots the shape of the multileaf collimator.
    Type: Application
    Filed: October 11, 2007
    Publication date: December 4, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Osamu Takahashi, Yuehu Pu, Hisashi Harada, Masahiro Ikeda, Yasuyuki Takatani, Hiroshi Otani
  • Patent number: 7445088
    Abstract: A differential for a wheeled motor vehicle comprises a differential gear unit, and a differential case for housing therein the differential gear unit. The differential case is rotatable about its rotation axis in normal and reverse directions at a position above an oil level of a lubricating oil. The differential case includes a portion having an oil inlet opening formed therethrough, the oil inlet opening communicating the interior of the differential case with the outside of the same; and an oil dipping up structure that dips up the lubricating oil to force the same to enter the interior of the differential case through the oil inlet opening when the differential case rotates about the rotation axis.
    Type: Grant
    Filed: February 19, 2004
    Date of Patent: November 4, 2008
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Takashi Watanabe, Osamu Takahashi
  • Patent number: 7444028
    Abstract: An original of copying, fax, or the like is read by a CCD image sensor and resulting image data are input to a data abnormality detecting section via an A/D converter and correcting unit. A maximum value and a minimum value of the pieces of gradation information of the image data are detected and compared with a black determination value and a white determination value, respectively, whereby whether the original is all white or all black is detected and an data abnormality announcing section issues an alarm message or the like. The data abnormality detection is performed before a binarizing section binarizes the image data.
    Type: Grant
    Filed: February 4, 2004
    Date of Patent: October 28, 2008
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventor: Osamu Takahashi
  • Patent number: 7444525
    Abstract: Methods and apparatus provide for enabling a digital circuit by biasing at least one switch transistor ON such that a voltage potential of a virtual ground node is substantially equal to a voltage potential of a ground node for a power supply to the digital circuit, wherein the digital circuit is implemented using a plurality of transistors in a silicon-on-insulator (SOI) arrangement and at least some of the transistors are referenced to the virtual ground node; and disabling the digital circuit by biasing a gate terminal of the switch transistor below the voltage potential of the ground node.
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: October 28, 2008
    Assignees: Sony Computer Entertainment Inc., International Business Machines Corporation, Toshiba America Electronic Components, Inc.
    Inventors: Hiroshi Yoshihara, Sang Hoo Dhong, Osamu Takahashi, Takaaki Nakazato
  • Publication number: 20080254237
    Abstract: A polymer film that has an in-plane retardation Re(?) and a thickness-direction retardation Rth(?) satisfying formula (i) and (ii), and that further has a surface energy of at least one surface is from 50 mN/m to 80 mN/m: (i) 0?Re(630)?10, and |Rth(630)|?25; and (ii) |Re(400)?Re(700)?10, and |Rth(400)?Rth(700)|?35. in the formulae, Re(?) and Rth(?) are measurement values at the wavelength of ? nm, and an optically-compensatory film, an optical material such as a polarizer and a liquid-crystal display device using the polymer film.
    Type: Application
    Filed: August 5, 2005
    Publication date: October 16, 2008
    Applicant: FUJIFILM Corporation
    Inventors: Tadashi Omatsu, Hajime Nakayama, Akihiro Matsufuji, Osamu Takahashi, Shigeaki Nimura, Yousuke Nishiura, Takako Nishiura
  • Patent number: 7436854
    Abstract: A CPU 41 of a server device 40 measures an elapsed time after transmitting a data segment, and suspends measuring time upon receiving an acknowledgement segment for the data segment. CPU 41 transmits a data segment whose elapsed time has reached a retransmission timeout value. CPU 41 sets, as a retransmission timeout value of a data block, a time value determined according to a monotonically increasing function of a number of transmissions of the data block, during a given time period after the second-time transmission of the data block, while CPU 41 sets a time value which is predetermined and is different from the time value determined by the monotonically increasing function during a period between the first-time transmission and immediately before the second-time transmission of the data block.
    Type: Grant
    Filed: January 21, 2005
    Date of Patent: October 14, 2008
    Assignee: NTT Docomo, Inc.
    Inventors: Motoharu Miyake, Hiroshi Inamura, Kazunori Yamamoto, Hideharu Suzuki, Osamu Takahashi
  • Patent number: 7423921
    Abstract: A memory system including a memory array with redundant wordlines. The memory system includes a memory wordline tester that determines if any of the wordlines exhibits a defect. The memory system also includes decoder redundancy logic that efficiently couples to wordline shift logic using a reduced number of control signal lines therebetween. The shift logic shifts defective wordlines to upstream wordlines in the array to bypass the defective wordlines.
    Type: Grant
    Filed: July 14, 2006
    Date of Patent: September 9, 2008
    Assignee: International Business Machines Corporation
    Inventors: Toru Asano, Sang H. Dhong, Takaaki Nakazato, Osamu Takahashi
  • Publication number: 20080189670
    Abstract: The circuit library available for logic synthesis is limited to a single dynamic circuit block or logic synthesis block. The circuit design method includes first defining the logic synthesis block and then performing logic synthesis for a predetermined logical operation to be implemented. The logic synthesis step constrained to the single logic synthesis block produces an intermediate circuit design which necessarily comprises a series of dynamic circuit blocks, each associated with a single reset signal. Once the intermediate circuit is produced, the circuit design method includes eliminating unnecessary devices from the intermediate circuit to produce a final logic circuit, and then sizing the devices in the final circuit to complete the design.
    Type: Application
    Filed: April 1, 2008
    Publication date: August 7, 2008
    Inventors: Sang Hoo Dhong, Harm Peter Hofstee, Stephen Douglas Posluszny, Joel Abraham Silberman, Osamu Takahashi, Dieter F. Wendel
  • Publication number: 20080160219
    Abstract: A cellulose ester film comprising a cellulose ester and a reaction product between at least one epoxy compound and at least one polymerization accelerator; a polarizing plate using the cellulose ester film as a protective layer of a polarizer; and a liquid crystal display device using either the cellulose ester film or the polarizing plate.
    Type: Application
    Filed: February 24, 2006
    Publication date: July 3, 2008
    Applicant: FUJIFILM Corporation
    Inventors: Osamu Takahashi, Kunihiro Atsumi
  • Patent number: 7394579
    Abstract: An image reading apparatus of the present invention converts respective pixel signals outputted from first, second and third shift registers to pixel data in an analog frontend IC and outputs pixel data as a serial data stream in a predetermined pattern. The address setting unit repeats add and subtract operation to the initial value according to the output pattern of the pixel data from the analog frontend IC to calculate pixel positions of the respective pixel data, and sets memory addresses corresponding to the pixel positions as destination memory addresses of the pixel data in an address register RR. The memory writing control unit writes the pixel data obtained from the analog frontend IC via a data sampling control unit in areas in the memory which correspond to the destination memory addresses. As a result, the amount of memory necessary for storing the pixel data can be reduced, and sorting operation of the pixel data can be executed with fewer memory access times.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: July 1, 2008
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventor: Osamu Takahashi
  • Publication number: 20080145089
    Abstract: An image-forming device has an image-forming unit, a toner density detection unit, a reflective shutter, a storage unit, and a control unit. The image-forming unit forms a toner image on an image-carrying member. The toner density detection unit detects a toner density of the toner image, the toner density detection unit having a light-emitting element for emitting a light beam to the image-carrying member, and a light-receiving element for receiving the light beam to produce an output value based on an intensity of the received light beam. The reflective shutter is provided between the toner density detection unit and the image-carrying member to be movable between a shielding position and a retracted position. The storage unit stores the output value of the toner density detection unit. The control unit calculates a correction value for correcting the output value to control an image-forming unit according to the correction value.
    Type: Application
    Filed: December 14, 2007
    Publication date: June 19, 2008
    Applicant: BROTHER KOGYO KABUSHIKI KAISHA
    Inventor: Osamu TAKAHASHI
  • Patent number: 7363609
    Abstract: The circuit library available for logic synthesis is limited to a single dynamic circuit block or logic synthesis block. The circuit design method includes first defining the logic synthesis block (16) and then performing logic synthesis (17) for a predetermined logical operation to be implemented. The logic synthesis step constrained to the single logic synthesis block produces an intermediate circuit design (29) which necessarily comprises a series of dynamic circuit blocks, each associated with a single reset signal. Once the intermediate circuit (29) is produced, the circuit design method includes eliminating unnecessary devices (46) from the intermediate circuit (29) to produce a final logic circuit, and then sizing the devices (48) in the final circuit to complete the design.
    Type: Grant
    Filed: July 26, 2001
    Date of Patent: April 22, 2008
    Assignee: International Business Machines Corporation
    Inventors: Sang Hoo Dhong, Harm Peter Hofstee, Stephen Douglas Posluszny, Joel Abraham Silberman, Osamu Takahashi, Dieter F. Wendel
  • Publication number: 20080056744
    Abstract: A light amount measuring device, according to the present invention can include, a light-receiving sensor capable of outputing a voltage corresponding to an amount of incident light, an A/D converting portion capable of converting an input voltage into a digital value, a light amount calculating portion capable of calculating the amount of light incident on the light-receiving sensor on the basis of the digital value obtained by conversion by the A/D converting portion, a resistor connected between the A/D converting portion and the light-receiving sensor, a zener diode has one end connected between the A/D converting portion and the resistor, wherein the zener diode is capable of allowing a breakdown current flow from the one end to another end if an output voltage from the light-receiving sensor is not less than a predetermined value.
    Type: Application
    Filed: August 29, 2007
    Publication date: March 6, 2008
    Applicant: Brother Kogyo Kabushiki Kaisha
    Inventor: Osamu TAKAHASHI
  • Publication number: 20080013388
    Abstract: A memory system including a memory array with redundant wordlines is disclosed. The memory system includes a memory wordline tester that determines if any of the wordlines exhibits a defect. The memory system also includes decoder redundancy logic that efficiently couples to wordline shift logic using a reduced number of control signal lines therebetween. The shift logic shifts defective wordlines to upstream wordlines in the array to bypass the defective wordlines.
    Type: Application
    Filed: July 14, 2006
    Publication date: January 17, 2008
    Applicant: IBM Corporation
    Inventors: Toru Asano, Sang H. Dhong, Takaaki Nakazato, Osamu Takahashi
  • Patent number: 7318182
    Abstract: The present invention provides for a method for memory array verification. Initialization commands are received and memory array initialization settings are generated based on received initialization commands. The memory array initialization settings are stored in a memory array. A deterministic read output function for the memory array is identified and a logic built-in self test scan on the memory array is performed based on the identified deterministic read output function.
    Type: Grant
    Filed: December 2, 2004
    Date of Patent: January 8, 2008
    Assignee: International Business Machines Corporation
    Inventors: Louis Bernard Bushard, Sang Hoo Dhong, Brian King Flachs, Osamu Takahashi, Michael Brian White
  • Publication number: 20070287241
    Abstract: Provided is a fabrication method of a semiconductor integrated circuit device, which comprises disposing, in a ultrapure water preparing system, UF equipment having therein a UF module which has been manufactured by disposing, in a body thereof, a plurality of capillary hollow fiber membranes composed of a polysulfone membrane or polyimide membrane, bonding the plurality of hollow fiber membranes at end portions thereof by hot welding, and by this hot welding, simultaneously adhering the hollow fiber membranes to the body. Upon preparation of ultrapure water to be used for the fabrication of the semiconductor integrated circuit device, the present invention makes it possible to prevent run-off of ionized amine into the ultrapure water.
    Type: Application
    Filed: May 23, 2007
    Publication date: December 13, 2007
    Inventors: Osamu Takahashi, Kunio Ogasawara
  • Patent number: 7296206
    Abstract: The present invention provides a communication device, comprising: transmission means for transmitting a plurality of data segments via a packet communication network, each of the data segments including a sequence number, the data segments being transmitted in sequence number order; receiving means for receiving an acknowledgement indicating a data segment which the destination device requests the communication device to transmit next; retransmission means for changing a transmission rate and fro retransmitting one of the data segments in a case that the communication device has not received an acknowledgement including an acknowledgement number greater than a sequence number included in the retransmitted data segment when a predetermined time elapses following transmission of the original data segment; control means for determining a subsequent data segment to be transmitted next, and for controlling a transmission rate on the basis of a category of the acknowledgement and also information included in the a
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: November 13, 2007
    Assignee: NTT DoCoMo, Inc.
    Inventors: Motoharu Miyake, Hiroshi Inamura, Osamu Takahashi
  • Publication number: 20070230973
    Abstract: A developing cartridge is detachably attached to an electrophotograpy-type image forming apparatus which forms an image on a recording sheet by transferring toner onto the recording sheet. The developing cartridge includes a casing that provides a toner accommodating space for accommodating toner, and an agitator that is rotatably disposed in the casing and agitates toner accommodated in the toner accommodating space. The developing cartridge has a light guiding member that is disposed in the casing go as to be rotatable integrally with the agitator. The light guiding member includes a light entrance portion disposed at a position offset from a rotation shaft of the agitator and allowing entrance of light into the light guiding member, and guides the light entering from the light entrance portion to an outside of the casing.
    Type: Application
    Filed: March 28, 2007
    Publication date: October 4, 2007
    Applicant: BROTHER KOGYO KABUSHIKI KAISHA
    Inventor: Osamu TAKAHASHI
  • Publication number: 20070230976
    Abstract: An image forming apparatus includes an image carrier, a cleaning unit that collects a waste toner that remains on the image carrier, a toner container that stores the waste toner collected by the cleaning unit, a determination unit that determines whether the waste toner stored in the toner container reaches a predetermined storage level that is lower than a maximum storage level of the toner container, and a control unit that executes a control of suppressing generation of the waste toner when the determination unit determines that the waste toner has reached the predetermined storage level.
    Type: Application
    Filed: March 22, 2007
    Publication date: October 4, 2007
    Applicant: Brother Kogyo Kabushiki Kaisha
    Inventor: Osamu Takahashi