Abstract: Provided is a memory device including a substrate, a stack layer, a channel structure, a charge storage structure, a silicon nitride layer, and a buffer oxide layer. The stack layer is disposed over the substrate. The stack layer includes a plurality of dielectric layers and a plurality of conductive layers stacked alternately. The channel structure penetrates through the stack layer. The charge storage structure surrounds a sidewall of the channel structure. The silicon nitride layer surrounds the conductive layers. The buffer oxide layer is disposed between the conductive layers and the silicon nitride layer.

Abstract: A neural-signal amplifier includes an amplifier, a switched-capacitor circuit-input unit, a switched-capacitor feedback-circuit unit, and a switched-capacitor circuit-output unit. Each of the switched-capacitor circuit-input unit, the switched-capacitor feedback-circuit unit, and the switched-capacitor circuit-output unit includes a plurality of differential switches, a plurality of common mode switches, and a plurality of capacitors. By controlling the switches to turn on or performing the switched-capacitor operation, the neural-signal amplifier is controlled to suppress the DC drift and reconstruct the DC input of the common-mode power supply.

Abstract: An online system receives an advertisement (“ad”) request identifying an application, one or more items for use within the application, ad content, and a prompt for purchasing one or more of the items. The prompt for purchasing an item comprises text or image data describing the purchasing and instructions that, when executed by a client device, request payment information from a user accessing the prompt. When the ad content is presented to a user, the prompt is also presented. When the user interacts with the prompt, payment information is requested and communicated to a third party system associated with the application. The ad content and prompt may be presented to the user within a feed of content items provided to the user by the online system.

Abstract: A buoyancy dry bag includes an air valve unit, and first and second body parts that are connected to each other and that cooperatively define a receiving space. The first body part has a lining layer made of thermoplastic polyurethane, and an external layer structure having an inner layer disposed at an outer side of the lining layer and made of thermoplastic polyurethane, an outer layer contacting an outer surface of the inner layer and made of polyester, and a pattern layer contacting the outer layer. The first body part defines a first air chamber between the lining layer and the inner layer. The air valve unit includes a first air valve mounted to the external layer structure for injection of air into the first air chamber therethrough.

Abstract: Provided is a memory device including a substrate, a stack layer, a channel structure, a charge storage structure, a silicon nitride layer, and a buffer oxide layer. The stack layer is disposed over the substrate. The stack layer includes a plurality of dielectric layers and a plurality of conductive layers stacked alternately. The channel structure penetrates through the stack layer. The charge storage structure surrounds a sidewall of the channel structure. The silicon nitride layer surrounds the conductive layers. The buffer oxide layer is disposed between the conductive layers and the silicon nitride layer.

Abstract: Complex concentrated alloys include five or more elements, at least one of which is ruthenium. Example complex concentrated alloys can include nickel and chromium, iron, ruthenium, molybdenum, and/or tungsten. Example complex concentrated alloys have single phase microstructure of face centered cubic (FCC) and can be homogenous. Example complex concentrated alloys can exhibit improved corrosion resistance.

Abstract: A three-dimensional non-volatile memory including a substrate, a stacked structure and a channel layer. The stacked structure is disposed on the substrate and includes first dielectric layers, gates and charge storage structures. The first dielectric layers and the gates are alternately stacked. The charge storage structures are disposed at one side of the gates. Two adjacent charge storage structures are isolated by the first dielectric layer therebetween. Each of the charge storage structures includes a first oxide layer, a nitride layer and a second oxide layer sequentially disposed at one side of each of the gates. The channel layer is disposed on a sidewall of the stacked structure adjacent to the charge storage structures.

Abstract: A buoyancy dry bag includes an air valve unit, and first and second body parts that are connected to each other and that cooperatively define a receiving space. The first body part has a lining layer made of thermoplastic polyurethane, and an external layer structure having an inner layer disposed at an outer side of the lining layer and made of thermoplastic polyurethane, an outer layer contacting an outer surface of the inner layer and made of polyester, and a pattern layer contacting the outer layer. The first body part defines a first air chamber between the lining layer and the inner layer. The air valve unit includes a first air valve mounted to the external layer structure for injection of air into the first air chamber therethrough.

Abstract: A semiconductor substrate support for supporting a semiconductor substrate in a plasma processing chamber includes a heater array comprising thermal control elements operable to tune a spatial temperature profile on the semiconductor substrate, the thermal control elements defining heater zones each of which is powered by two or more power supply lines and two or more power return lines wherein each power supply line is connected to at least two of the heater zones and each power return line is connected to at least two of the heater zones. A power distribution circuit is mated to a baseplate of the substrate support, the power distribution circuit being connected to each power supply line and power return line of the heater array. A switching device is connected to the power distribution circuit to independently provide time-averaged power to each of the heater zones by time divisional multiplexing of a plurality of switches.

Abstract: A method includes forming an Inter-layer Dielectric (ILD) having a portion at a same level as a metal gate of a transistor. The ILD and the metal gate are parts of a wafer. The ILD is etched to form a contact opening. The wafer is placed into a PVD tool, with a metal target in the PVD tool. The metal target has a first spacing from a magnet over the metal target, and a second spacing from the wafer. A ratio of the first spacing to the second spacing is greater than about 0.02. A metal layer is deposited on the wafer, with the metal layer having a bottom portion in the contact opening, and a sidewall portion in the contact opening. An anneal is performed to react the bottom portion of the metal layer with the source/drain region to form a silicide region.

Abstract: The present invention provides a method for identifying radiation induced genes and long non-coding RNAs and its application thereof, the method comprises the steps of: (1). Provide expression values of genes and long non-coding RNAs; (2). Execute weighted gene correlation network analysis (WGCNA) by a computer system to calculate Pearson correlation coefficients of pairs of the genes and long non-coding RNAs based on the expression values of the genes and long non-coding RNAs; and (3). Perform a screening step by the computer system to identify radiation induced genes and long non-coding RNAs based on the Pearson correlation coefficients of the pairs of the genes and long non-coding RNAs with a value more than 0.75.

Abstract: A method of manufacturing an integrated circuit including forming trenches into the surface of a crystalline wafer and the trenches extending along a <100> lattice direction is disclosed. Such wafer can experience less deformation due to less stress induced when the trenches are filled using a spin-on dielectric material. Thus, the overlay issue caused by wafer shape change is resolved.

Abstract: A semiconductor substrate support for supporting a semiconductor substrate in a plasma processing chamber includes a heater array comprising thermal control elements operable to tune a spatial temperature profile on the semiconductor substrate, the thermal control elements defining heater zones each of which is powered by two or more power supply lines and two or more power return lines wherein each power supply line is connected to at least two of the heater zones and each power return line is connected to at least two of the heater zones. A power distribution circuit is mated to a baseplate of the substrate support, the power distribution circuit being connected to each power supply line and power return line of the heater array. A switching device is connected to the power distribution circuit to independently provide time-averaged power to each of the heater zones by time divisional multiplexing of a plurality of switches.

Abstract: A method includes forming an Inter-layer Dielectric (ILD) having a portion at a same level as a metal gate of a transistor. The ILD and the metal gate are parts of a wafer. The ILD is etched to form a contact opening. The wafer is placed into a PVD tool, with a metal target in the PVD tool. The metal target has a first spacing from a magnet over the metal target, and a second spacing from the wafer. A ratio of the first spacing to the second spacing is greater than about 0.02. A metal layer is deposited on the wafer, with the metal layer having a bottom portion in the contact opening, and a sidewall portion in the contact opening. An anneal is performed to react the bottom portion of the metal layer with the source/drain region to form a silicide region.

Abstract: A drug combination prediction method comprising: storing a plurality of original gene sets, at least one first gene impacted by a first drug and at least one second gene impacted by a second drug; determining the part of the at least one first gene and the part of the at least one second gene to be a first interaction gene set; calculating a gene amount of the first interaction gene set to obtain a first interaction gene amount, and calculating a first percentage generated by the first interaction gene amount in the first original gene set; calculating an interaction value of the combination of the first drug and the second drug according to the first percentage; and selecting at least one synergistic pharmaceutical composition according to the interaction value.

Abstract: The invention is directed to a method to predict prognostic results for diseases including acute myeloid leukemia (AML) by analyzing novel markers which comprises microRNA/mRNA (miRNA/mRNA) pairings. In particular, the miRNA/mRNA pairings are a kind of NPM1 mutation-modulated miRNA/mRNA regulation pairs.

Abstract: A three-dimensional non-volatile memory including a substrate, a stacked structure and a channel layer. The stacked structure is disposed on the substrate and includes first dielectric layers, gates and charge storage structures. The first dielectric layers and the gates are alternately stacked. The charge storage structures are disposed at one side of the gates. Two adjacent charge storage structures are isolated by the first dielectric layer therebetween. Each of the charge storage structures includes a first oxide layer, a nitride layer and a second oxide layer sequentially disposed at one side of each of the gates. The channel layer is disposed on a sidewall of the stacked structure adjacent to the charge storage structures.

Abstract: A method of manufacturing an integrated circuit including forming trenches into the surface of a crystalline wafer and the trenches extending along a <100> lattice direction is disclosed. Such wafer can experience less deformation due to less stress induced when the trenches are filled using a spin-on dielectric material. Thus, the overlay issue caused by wafer shape change is resolved.

Abstract: A system for analyzing sequencing data of bacterial strains and a method thereof are provided. The method for analyzing sequencing data of bacterial strains includes the following steps: searching a specific variable region of a first genetic sample sequence and searching another specific variable region of a second genetic sample sequence; determining whether both the specific variable region and the another specific variable region have an identical cross-sample subsequence; if both the specific variable region and the another specific variable region have the identical cross-sample subsequence, storing the cross-sample subsequence into a recording table; and if the identical cross-sample subsequence exists, comparing the cross-sample subsequence with a plurality of gene sequences of known strains stored in a database module to analyze a plurality of strains corresponding to the cross-sample subsequence in the first genetic sample sequence and the second genetic sample sequence.

Abstract: A method, apparatus and computer program product are provided in order to test word line failure of a non-volatile memory device. An example of the method includes performing a failure screening of the non-volatile memory device, wherein the non-volatile memory device comprises one or more word lines; identifying a point of failure located between a first word line and a second word line; and marking the first word line and the second word line as a single word line in response to identifying the point of failure between the first word line and the second word line.