Abstract: Embodiments of the present invention provide improved three-dimensional memory cells, arrays, devices, and/or the like and associated methods. In one embodiment, a three-dimensional memory cell is provided. The three-dimensional memory cell comprises a first conductive layer; a third conductive layer spaced apart from the first conductive layer; a channel conductive layer connecting the first conductive layer and the third conductive layer to form an opening having internal surfaces; a dielectric layer disposed along the internal surfaces of the opening surrounded by the first conductive layer, the channel conductive layer and the third conductive layer; and a second conductive layer interposed and substantially filling a remaining open portion formed by the dielectric layer. The first conductive layer, the dielectric layer, and the second conductive layer are configured to form a staircase structure.

Abstract: The present invention provides methods and associated devices for controlling the voltage threshold distribution corresponding to performing a function on cells of non-volatile memory device. In one embodiment, a method is provided. The method may comprise providing the non-volatile memory device. The device comprises one or more strings, each string comprising a plurality of cells, the plurality of cells comprising a first cell and a second cell. The method further comprises performing a function of the non-volatile memory device by applying a first function voltage to the first cell and a second function voltage to the second cell. The first function voltage and the second function voltage are different.

Abstract: Embodiments of the present invention provide improved 3D non-volatile memory devices and associated methods. In one embodiment, a string of 3D non-volatile memory cells is provided. The string comprises a core extending along an axis of the string, the core having an elliptical cross section in a plane perpendicular to the axis; and a plurality of word lines, each word line disposed around a part of the core, the plurality of word lines spaced along the axis, and each word line corresponding to one of the memory cells. In various embodiments, at least one operating parameter is defined in order to improve the operation of the 3D non-volatile memory device.

Abstract: A three-dimensional memory, which includes memory cell stacked structures. The memory cell stacked structures are stacked by a plurality of memory cell array structures and insulation layers alternatively, and each memory cell array structure includes word lines, active layers, composite layers and sources/drains. The word lines, the active layers and the composite layers extend along a Y direction. The active layers are disposed between the adjacent word lines. The composite layers are disposed between the adjacent word lines and the adjacent active layers, and each composite layer includes a first dielectric layer, a charge storage layer and a second dielectric layer in sequence from the active layers. The sources/drains are disposed in the active layers at equal intervals. A memory cell includes two adjacent sources/drains, the active layer between the two adjacent sources/drains, the first dielectric layer, the charge storage layer and the second dielectric layer on the active layer, and the word lines.

Abstract: A server includes a detecting module, a calculating module, a comparing module, an allocating module and a sorting module. The detecting module is used for receiving firmware version query information from a plurality of client devices. The calculating module is used for calculating bandwidth sum of the CPEs. The comparing module is used for determining whether the calculated total bandwidth is larger than a total downloading bandwidth of the server. The allocating module is used for sequencing the client devices which transmit the firmware download requests to wait for the download. The sorting module is used for scoring each of the client devices which transmit the firmware download requests according to attributes of the client devices which transmit the firmware download requests and sequencing the client devices which transmit the firmware download requests to wait for downloading according to the scores.

Abstract: An online system receives an advertisement (“ad”) request identifying an application, one or more items for use within the application, ad content, and a prompt for purchasing one or more of the items. The prompt for purchasing an item comprises text or image data describing the purchasing and instructions that, when executed by a client device, request payment information from a user accessing the prompt. When the ad content is presented to a user, the prompt is also presented. When the user interacts with the prompt, payment information is requested and communicated to a third party system associated with the application. The ad content and prompt may be presented to the user within a feed of content items provided to the user by the online system.

Abstract: A next generation sequencing analysis system and a next generation sequencing analysis method thereof are provided. The next generation sequencing analysis system receives a target gene input, and decides at least one gene group of the target gene input based on gene related information stored in a gene database.

Abstract: A server includes a detecting module, a calculating module, a comparing module, an allocating module and a sorting module. The detecting module is used for receiving firmware version query information from a plurality of client devices. The calculating module is used for calculating bandwidth sum of the CPEs. The comparing module is used for determining whether the calculated total bandwidth is larger than a total downloading bandwidth of the server. The allocating module is used for sequencing the client devices which transmit the firmware download requests to wait for the download. The sorting module is used for scoring each of the client devices which transmit the firmware download requests according to attributes of the client devices which transmit the firmware download requests and sequencing the client devices which transmit the firmware download requests to wait for downloading according to the scores.

Abstract: A method of forming a charge-trapping structure in a memory device is disclosed. The method comprises the steps of forming a gate oxide and gate electrode on a semiconductor substrate, performing undercut etching on the gate oxide layer, annealing in a nitrogen containing environment, further creating funnel-like openings on both sides of the gate oxide layer, and conformally forming the charge-trapping structure on the substrate surface.

Abstract: A contact image sensing device includes a housing, a light emitting unit, a red lens array, a sensing unit, and a protecting component. The housing includes a top surface, a bottom surface, an accommodating groove, and a slot. The bottom surface is opposite to the top surface. The accommodating groove is formed on the top surface and concave toward to bottom surface. The slot penetrates the top surface and the bottom surface. The light-emitting unit is arrange within the accommodating groove. The rod lens array is arranged within the slot. The sensing unit is arranged below the housing. The protecting component includes a main body, a recess, and a lighting slot communicating with the recess, a top end of the rod lens array is assembled with the recess. The main body of the protecting member forms at least one containing recess. A combining component for combining the rod lens array and the protecting member is disposed within the containing recess.

Abstract: Activity level of memory pages is classified in virtual machine environment, so that processes such as live VM migration and checkpointing, among others, can be carried out more efficiently. The method includes the steps of scanning page table entries of hypervisor-managed page tables continuously over repeating scan periods to determine whether memory pages have been accessed or not, and for each memory page, determining an activity level of the memory page based on whether the memory page has been accessed or not since a prior scan and storing the activity level of the memory page. The activity level of the memory page may be represented by one or more bits of its page table entry and may be classified as having at least two states ranging from hot to cold.

Abstract: The flow control device is provided and the method for controlling the flow. A flow control device comprises: a body including a first end, opposite second end, a first flow channel and a second flow channel, a plug and a laminar flow layer accommodated in the second flow channel; a telescopic device accommodated the length of the telescopic device is adjustable, so as to control the flow of fluid flowing through the opening area in the body.

Abstract: A contact image sensing device includes a housing, a light emitting unit, a red lens array, a sensing unit, and a protecting component. The housing includes a top surface, a bottom surface, an accommodating groove, and a slot. The bottom surface is opposite to the top surface. The accommodating groove is formed on the top surface and concave toward to bottom surface. The slot penetrates the top surface and the bottom surface. The light-emitting unit is arrange within the accommodating groove. The rod lens array is arranged within the slot. The sensing unit is arranged below the housing. The protecting component includes a main body, a recess, and a lighting slot communicating with the recess, a top end of the rod lens array is assembled with the recess.

Abstract: The present disclosure relates to a laminate for making a molded article comprising at least one fiber reinforcement impregnated with a resin matrix as a first layer and a foam as a second layer. The foam can be laminated to the first layer using a nanocomposite adhesive. The laminates can be easily molded using bagging mold techniques. The resulting molded devices have uses in biomedical, health care and sport protective devices. Due to the improved strength of material, it is possible to drill holes into the device shell allowing for improved ventilation.

Abstract: Multiple search indexes can be served from a common set of resources. Instead of requiring a processor to be dedicated to serving a single search index, a processor can provide responsive documents for search queries that are based on different ranking algorithms and/or different sets of documents.

Abstract: Activity level of memory pages is repeatedly classified in a virtual machine environment, so that live VM migration can be carried out more efficiently. The time intervals upon which the activity level of the memory pages are repeatedly classified can be dynamically adjusted to better align its performance with the live VM migration process.

Abstract: A memory device is provided having an improved gate coupling ratio, substantial suppression of p-type dopant segregation, and reduction in inter-poly dielectric current leakage. The memory device may be substantially free of any void spaces in a second conductive layer. Methods of manufacturing such a memory device are also provided.

Abstract: A nitride semiconductor structure including a silicon substrate, a nucleation layer, a discontinuous defect blocking layer, a buffer layer and a nitride semiconductor layer is provided. The nucleation layer disposed on the silicon substrate, wherein the nucleation layer has a defect density d1. A portion of the nucleation layer is covered by the discontinuous defect blocking layer. The buffer layer is disposed on the discontinuous defect blocking layer and a portion of the nucleation layer that is not covered by the discontinuous defect blocking layer. The nitride semiconductor layer is disposed on the buffer layer. A ratio of a defect density d2 of the nitride semiconductor layer to the defect density d1 of the nucleation layer is less than or equal to about 0.5, at a location where about 1 micrometer above the interface between the nitride semiconductor layer and the buffer layer.

Abstract: A semiconductor substrate support for supporting a semiconductor substrate in a plasma processing chamber includes a heater array comprising thermal control elements operable to tune a spatial temperature profile on the semiconductor substrate, the thermal control elements defining heater zones each of which is powered by two or more power supply lines and two or more power return lines wherein each power supply line is connected to at least two of the heater zones and each power return line is connected to at least two of the heater zones. A power distribution circuit is mated to a baseplate of the substrate support, the power distribution circuit being connected to each power supply line and power return line of the heater array. A switching device is connected to the power distribution circuit to independently provide time-averaged power to each of the heater zones by time divisional multiplexing of a plurality of switches.

Abstract: A nitride semiconductor structure including a silicon substrate, a nucleation layer, a discontinuous defect blocking layer, a buffer layer and a nitride semiconductor layer is provided. The nucleation layer disposed on the silicon substrate, wherein the nucleation layer has a defect density d1. A portion of the nucleation layer is covered by the discontinuous defect blocking layer. The buffer layer is disposed on the discontinuous defect blocking layer and a portion of the nucleation layer that is not covered by the discontinuous defect blocking layer. The nitride semiconductor layer is disposed on the buffer layer. A ratio of a defect density d2 of the nitride semiconductor layer to the defect density d1 of the nucleation layer is less than or equal to about 0.5, at a location where about 1 micrometer above the interface between the nitride semiconductor layer and the buffer layer.