Patents by Inventor Pin Lu

Pin Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160154929
    Abstract: A next generation sequencing analysis system and a next generation sequencing analysis method thereof are provided. The next generation sequencing analysis system receives a target gene input, and decides at least one gene group of the target gene input based on gene related information stored in a gene database.
    Type: Application
    Filed: January 26, 2015
    Publication date: June 2, 2016
    Inventors: Shao-Hua CHENG, Yu Shian CHIU, Eric Y. CHUANG, Tzu-Pin LU, Heng-Yuan TUNG
  • Publication number: 20160062759
    Abstract: A server includes a detecting module, a calculating module, a comparing module, an allocating module and a sorting module. The detecting module is used for receiving firmware version query information from a plurality of client devices. The calculating module is used for calculating bandwidth sum of the CPEs. The comparing module is used for determining whether the calculated total bandwidth is larger than a total downloading bandwidth of the server. The allocating module is used for sequencing the client devices which transmit the firmware download requests to wait for the download. The sorting module is used for scoring each of the client devices which transmit the firmware download requests according to attributes of the client devices which transmit the firmware download requests and sequencing the client devices which transmit the firmware download requests to wait for downloading according to the scores.
    Type: Application
    Filed: September 16, 2014
    Publication date: March 3, 2016
    Inventors: WEN-PIN LU, MING-CHEN TSAI
  • Publication number: 20150171181
    Abstract: A method of forming a charge-trapping structure in a memory device is disclosed. The method comprises the steps of forming a gate oxide and gate electrode on a semiconductor substrate, performing undercut etching on the gate oxide layer, annealing in a nitrogen containing environment, further creating funnel-like openings on both sides of the gate oxide layer, and conformally forming the charge-trapping structure on the substrate surface.
    Type: Application
    Filed: December 17, 2013
    Publication date: June 18, 2015
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventor: Chi-Pin LU
  • Patent number: 9036220
    Abstract: A contact image sensing device includes a housing, a light emitting unit, a red lens array, a sensing unit, and a protecting component. The housing includes a top surface, a bottom surface, an accommodating groove, and a slot. The bottom surface is opposite to the top surface. The accommodating groove is formed on the top surface and concave toward to bottom surface. The slot penetrates the top surface and the bottom surface. The light-emitting unit is arrange within the accommodating groove. The rod lens array is arranged within the slot. The sensing unit is arranged below the housing. The protecting component includes a main body, a recess, and a lighting slot communicating with the recess, a top end of the rod lens array is assembled with the recess. The main body of the protecting member forms at least one containing recess. A combining component for combining the rod lens array and the protecting member is disposed within the containing recess.
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: May 19, 2015
    Assignee: CREATIVE SENSOR INC.
    Inventors: Ting-Pin Lu, Ming-Chieh Lin, Jia-Lin Lee
  • Patent number: 9032398
    Abstract: Activity level of memory pages is classified in virtual machine environment, so that processes such as live VM migration and checkpointing, among others, can be carried out more efficiently. The method includes the steps of scanning page table entries of hypervisor-managed page tables continuously over repeating scan periods to determine whether memory pages have been accessed or not, and for each memory page, determining an activity level of the memory page based on whether the memory page has been accessed or not since a prior scan and storing the activity level of the memory page. The activity level of the memory page may be represented by one or more bits of its page table entry and may be classified as having at least two states ranging from hot to cold.
    Type: Grant
    Filed: July 12, 2010
    Date of Patent: May 12, 2015
    Assignee: VMware, Inc.
    Inventors: Irfan Ahmad, Carl A. Waldspurger, Alexander Thomas Garthwaite, Kiran Tati, Pin Lu
  • Publication number: 20150114470
    Abstract: The flow control device is provided and the method for controlling the flow. A flow control device comprises: a body including a first end, opposite second end, a first flow channel and a second flow channel, a plug and a laminar flow layer accommodated in the second flow channel; a telescopic device accommodated the length of the telescopic device is adjustable, so as to control the flow of fluid flowing through the opening area in the body.
    Type: Application
    Filed: May 7, 2014
    Publication date: April 30, 2015
    Applicant: National Chiao Tung University
    Inventors: Wei-Hua CHIENG, Yi CHANG, Shyr-Long JENG, Chia-Chuan WANG, Ching-Wei SHIH, Bin-Han LUE, Hsiang-Pin LU
  • Publication number: 20150070735
    Abstract: A contact image sensing device includes a housing, a light emitting unit, a red lens array, a sensing unit, and a protecting component. The housing includes a top surface, a bottom surface, an accommodating groove, and a slot. The bottom surface is opposite to the top surface. The accommodating groove is formed on the top surface and concave toward to bottom surface. The slot penetrates the top surface and the bottom surface. The light-emitting unit is arrange within the accommodating groove. The rod lens array is arranged within the slot. The sensing unit is arranged below the housing. The protecting component includes a main body, a recess, and a lighting slot communicating with the recess, a top end of the rod lens array is assembled with the recess.
    Type: Application
    Filed: January 16, 2014
    Publication date: March 12, 2015
    Applicant: Creative Sensor Inc.
    Inventors: Ting-Pin LU, Ming-Chieh LIN, Jia-Lin LEE
  • Publication number: 20150064397
    Abstract: The present disclosure relates to a laminate for making a molded article comprising at least one fiber reinforcement impregnated with a resin matrix as a first layer and a foam as a second layer. The foam can be laminated to the first layer using a nanocomposite adhesive. The laminates can be easily molded using bagging mold techniques. The resulting molded devices have uses in biomedical, health care and sport protective devices. Due to the improved strength of material, it is possible to drill holes into the device shell allowing for improved ventilation.
    Type: Application
    Filed: August 27, 2014
    Publication date: March 5, 2015
    Inventors: Yew Wei Leong, Yongzheng Pan, Pin Lu, Chaobin He
  • Patent number: 8843507
    Abstract: Multiple search indexes can be served from a common set of resources. Instead of requiring a processor to be dedicated to serving a single search index, a processor can provide responsive documents for search queries that are based on different ranking algorithms and/or different sets of documents.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: September 23, 2014
    Assignee: Microsoft Corporation
    Inventors: Jianyong Xiao, Yi Li, Yanbiao Zhao, Xun Kang, Pin Lu, Ashish Consul
  • Patent number: 8832390
    Abstract: Activity level of memory pages is repeatedly classified in a virtual machine environment, so that live VM migration can be carried out more efficiently. The time intervals upon which the activity level of the memory pages are repeatedly classified can be dynamically adjusted to better align its performance with the live VM migration process.
    Type: Grant
    Filed: July 12, 2010
    Date of Patent: September 9, 2014
    Assignee: VMware, Inc.
    Inventors: Irfan Ahmad, Kiran Tati, Pin Lu
  • Publication number: 20140209990
    Abstract: A memory device is provided having an improved gate coupling ratio, substantial suppression of p-type dopant segregation, and reduction in inter-poly dielectric current leakage. The memory device may be substantially free of any void spaces in a second conductive layer. Methods of manufacturing such a memory device are also provided.
    Type: Application
    Filed: January 25, 2013
    Publication date: July 31, 2014
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventor: Chi-Pin Lu
  • Patent number: 8779468
    Abstract: A nitride semiconductor structure including a silicon substrate, a nucleation layer, a discontinuous defect blocking layer, a buffer layer and a nitride semiconductor layer is provided. The nucleation layer disposed on the silicon substrate, wherein the nucleation layer has a defect density d1. A portion of the nucleation layer is covered by the discontinuous defect blocking layer. The buffer layer is disposed on the discontinuous defect blocking layer and a portion of the nucleation layer that is not covered by the discontinuous defect blocking layer. The nitride semiconductor layer is disposed on the buffer layer. A ratio of a defect density d2 of the nitride semiconductor layer to the defect density d1 of the nucleation layer is less than or equal to about 0.5, at a location where about 1 micrometer above the interface between the nitride semiconductor layer and the buffer layer.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: July 15, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Yen-Hsiang Fang, Chien-Pin Lu, Chen-Zi Liao, Rong Xuan, Yi-Keng Fu, Chih-Wei Hu, Hsun-Chih Liu
  • Publication number: 20140154819
    Abstract: A semiconductor substrate support for supporting a semiconductor substrate in a plasma processing chamber includes a heater array comprising thermal control elements operable to tune a spatial temperature profile on the semiconductor substrate, the thermal control elements defining heater zones each of which is powered by two or more power supply lines and two or more power return lines wherein each power supply line is connected to at least two of the heater zones and each power return line is connected to at least two of the heater zones. A power distribution circuit is mated to a baseplate of the substrate support, the power distribution circuit being connected to each power supply line and power return line of the heater array. A switching device is connected to the power distribution circuit to independently provide time-averaged power to each of the heater zones by time divisional multiplexing of a plurality of switches.
    Type: Application
    Filed: November 30, 2012
    Publication date: June 5, 2014
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Keith William Gaff, Tom Anderson, Keith Comendant, Ralph Jan-Pin Lu, Paul Robertson, Eric A. Pape, Neil Benjamin
  • Publication number: 20140124833
    Abstract: A nitride semiconductor structure including a silicon substrate, a nucleation layer, a discontinuous defect blocking layer, a buffer layer and a nitride semiconductor layer is provided. The nucleation layer disposed on the silicon substrate, wherein the nucleation layer has a defect density d1. A portion of the nucleation layer is covered by the discontinuous defect blocking layer. The buffer layer is disposed on the discontinuous defect blocking layer and a portion of the nucleation layer that is not covered by the discontinuous defect blocking layer. The nitride semiconductor layer is disposed on the buffer layer. A ratio of a defect density d2 of the nitride semiconductor layer to the defect density d1 of the nucleation layer is less than or equal to about 0.5, at a location where about 1 micrometer above the interface between the nitride semiconductor layer and the buffer layer.
    Type: Application
    Filed: December 26, 2012
    Publication date: May 8, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yen-Hsiang Fang, Chien-Pin Lu, Chen-Zi Liao, Rong Xuan, Yi-Keng Fu, Chih-Wei Hu, Hsun-Chih Liu
  • Patent number: 8706293
    Abstract: Embodiments of a vending machine are disclosed that can comprise one or more horizontally oriented shelves for supporting products to be vended, a plurality of vertically oriented dividers coupled to the shelves, a plurality of location markers located on the dividers and/or on the shelves, and an optical recognition module configured to optically recognize the location markers and to determine positions of the location markers and products relative to the shelves. In some embodiments, the optical recognition module can recognize the products by comparing images of the products to stored product images.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: April 22, 2014
    Assignee: Cereson Co., Ltd.
    Inventor: Pin Lu
  • Publication number: 20140097443
    Abstract: A nitride semiconductor device includes a silicon substrate, a nucleation layer, a buffer layer, a first type nitride semiconductor stacked layer, a light-emitting layer and a second type nitride semiconductor layer. The nucleation layer is disposed on the silicon substrate. The buffer layer is disposed on the nucleation layer. The first type nitride semiconductor stacked layer is disposed on the buffer layer. The first type nitride semiconductor stacked layer being a plurality of lattice mismatch stacked layers includes a plurality of first nitride semiconductor layers and a plurality of second nitride semiconductor layers. The first nitride semiconductor layers and the second nitride semiconductor layers are stacked alternately, and the first nitride semiconductor layers and the second nitride semiconductor layers are different material. The light-emitting layer is disposed on the first type nitride semiconductor stacked layer.
    Type: Application
    Filed: October 9, 2012
    Publication date: April 10, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yen-Hsiang Fang, Rong Xuan, Chen-Zi Liao, Yi-Keng Fu, Chih-Wei Hu, Chien-Pin Lu, Hsun-Chih Liu
  • Publication number: 20140097442
    Abstract: A nitride semiconductor device includes a silicon substrate, a nucleation layer, a first buffer layer, a first type nitride semiconductor layer, a light-emitting layer and a second type nitride semiconductor layer is provided. The nucleation layer is disposed on the silicon substrate. The first buffer layer is disposed on the nucleation layer. The first buffer layer includes a dopant and Gallium, and an atomic radius of the dopant is larger than an atomic radius of Gallium. The first type nitride semiconductor layer is disposed over the first buffer layer. The light-emitting layer is disposed on the first type nitride semiconductor layer. The second type nitride semiconductor layer is disposed on the light-emitting layer.
    Type: Application
    Filed: October 9, 2012
    Publication date: April 10, 2014
    Applicant: Industrial Technology Research Institute
    Inventors: Yen-Hsiang Fang, Chen-Zi Liao, Rong Xuan, Chien-Pin Lu, Yi-Keng Fu, Chih-Wei Hu, Hsun-Chih Liu
  • Publication number: 20140097444
    Abstract: A nitride semiconductor device includes a silicon substrate, a nucleation layer, a buffer layer, a first type nitride semiconductor layer, a light-emitting layer and a second type nitride semiconductor layer is provided. The nucleation layer is disposed on the silicon substrate. The buffer layer is disposed on the nucleation layer. The first type nitride semiconductor layer is disposed on the buffer layer. The first type nitride semiconductor layer is doped with a first type dopant, at least one of the buffer layer and the first type nitride semiconductor layer comprises a codopant distributed therein, and an atomic radius of the codopant is larger than an atomic radius of the first type dopant. The light-emitting layer is disposed on the first type nitride semiconductor layer. The second type nitride semiconductor layer is disposed on the light-emitting layer, the second type nitride semiconductor layer comprising a second type dopant.
    Type: Application
    Filed: October 9, 2012
    Publication date: April 10, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yen-Hsiang Fang, Chen-Zi Liao, Rong Xuan, Chien-Pin Lu, Yi-Keng Fu, Chih-Wei Hu, Hsun-Chih Liu
  • Patent number: 8587714
    Abstract: A method for capturing an image, suitable for an image capturing apparatus with a flash lamp, is provided. In the invention, a pre-flash image is captured when a pre-flash is fired by the flash lamp. An intensity of a main flash is estimated. Whether the pre-flash image is overexposed is determined for calculating an overexposure number. A brightness comparison data is looked up according to the overexposure number and a brightness target value, so as to reduce a photosensitivity. A raw image is captured according to the reduced photosensitivity when the main flash is fired by the flash lamp.
    Type: Grant
    Filed: August 9, 2011
    Date of Patent: November 19, 2013
    Assignee: Altek Corporation
    Inventors: Chung-Pin Lu, Yi-Yu Chen
  • Patent number: 8581322
    Abstract: A method for making a nonvolatile memory device includes the following steps. A conductive structure is formed, wherein the conductive structure has a first top portion. The first top portion is converted into a second top portion having a domed surface.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: November 12, 2013
    Assignee: Macronix International Co., Ltd.
    Inventors: Chi-Pin Lu, Jung-Yu Hsieh, Ling-Wuu Yang