Patents by Inventor Ping Wang

Ping Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250107454
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on a first sidewall of the MTJ, and a second spacer on a second sidewall of the MTJ. Preferably, the first spacer and the second spacer are asymmetric, the first spacer and the second spacer have different heights, and a top surface of the MTJ includes a reverse V-shape.
    Type: Application
    Filed: December 11, 2024
    Publication date: March 27, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Ying-Cheng Liu, Yi-An Shih, Yi-Hui Lee, Chen-Yi Weng, Chin-Yang Hsieh, I-Ming Tseng, Jing-Yin Jhang, Yu-Ping Wang
  • Publication number: 20250105401
    Abstract: A method for manufacturing an enclosure includes designing a two dimensional (2D) blank corresponding to a three dimensional (3D) enclosure body; laying out N of the 2D blanks on a metal sheet, where N is an integer greater than one; separating the N 2D blanks from the metal sheet; at least one of bending, folding and/or flanging the N 2D blanks into the 3D enclosure body; and joining a plurality of sides of the 3D enclosure body.
    Type: Application
    Filed: September 22, 2023
    Publication date: March 27, 2025
    Inventors: Lu HUANG, Ziqiang Sheng, Wei Wu, Hui-ping Wang, Liang Xi, Wai Ping Gloria Tam
  • Patent number: 12262544
    Abstract: A method for fabricating a semiconductor device includes the steps of: forming a magnetic tunneling junction (MTJ) on a substrate; forming a first spin orbit torque (SOT) layer on the MTJ; forming a passivation layer around the MTJ; forming a second SOT layer on the first SOT layer and the passivation layer, and patterning the second SOT layer and the passivation layer.
    Type: Grant
    Filed: March 4, 2024
    Date of Patent: March 25, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hung-Chan Lin, Yu-Ping Wang
  • Patent number: 12262647
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a spacer adjacent to the MTJ, a liner adjacent to the spacer, and a first metal interconnection on the MTJ. Preferably, the first metal interconnection includes protrusions adjacent to two sides of the MTJ and a bottom surface of the protrusions contact the liner directly.
    Type: Grant
    Filed: March 1, 2024
    Date of Patent: March 25, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • Patent number: 12257561
    Abstract: Provided is an efficient and energy-saving building slurry stirring device. The device includes a grouting assembly, which includes a base, a storage tank, a discharge pipe, a grouting pump and a control box. The storage tank is arranged at the top of the base, the discharge pipe is located at one side of the storage tank, the grouting pump is arranged on the discharge pipe, and the control box is fixed to the top of the base. When the fluidity of a grouting material in the storage tank is reduced due to solidification, the stirring assembly can stir the grouting material in the storage tank. Then, the stirring assembly stops stirring the grouting material to save energy. After the grouting is completed, an inner wall of the storage tank can be cleaned by the stirring assembly.
    Type: Grant
    Filed: November 4, 2024
    Date of Patent: March 25, 2025
    Assignee: Nanjing Kangtai Construction Grouting Tech Co., Ltd
    Inventors: Sensen Chen, Qilun Zhang, Ping Wang, Yanfeng Song, Hui Bao, Tao Jiang, Xiufa Guan, Yufeng Wang, Jie Jiang, Xingyang He, Zhong Wen, Zhuo Wen, Deng Chen, Longxi Li, Gang Luo
  • Publication number: 20250096357
    Abstract: The present disclosure describes a multi-function, integrated Super Beam assembly structure with integrated structural, cooling, and transverse elastic compliance functions; and Thermal Management Propagation (TMP) protection. The Super Beam assembly includes a pair of parallel face plates, coolant channel cover plates, and coolant channels that are defined by the face plate and the one or more coolant channel cover plates. The structural design of the cooling channels, and the corresponding air gaps formed in-between them, allows a transverse elastic compliance of the Super Beam assembly to be tuned to different amounts of elasticity. Top, bottom and/or end structural channels may be included. A pair of TMP suppression channels may be attached to the Super Beam assembly structure with an adhesive “thermal fuse” that preferentially melts and causes the pair of TMP suppression channels to detach from the Super Beam assembly during overheating in a TMP event.
    Type: Application
    Filed: November 1, 2023
    Publication date: March 20, 2025
    Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Lu Huang, Hui-ping Wang, Chengwu Duan, Derek F. Lahr, Zhenwen Hu, Jian Yao, Blair E. Carlson, Xiaoling Chen
  • Patent number: 12255205
    Abstract: A semiconductor device with isolation structures of different dielectric constants and a method of fabricating the same are disclosed. The semiconductor device includes fin structures with first and second fin portions disposed on first and second device areas on a substrate and first and second pair of gate structures disposed on the first and second fin portions. The second pair of gate structures is electrically isolated from the first pair of gate structures. The semiconductor device further includes a first isolation structure interposed between the first pair of gate structures and a second isolation structure interposed between the second pair of gate structures. The first isolation structure includes a first nitride liner and a first oxide fill layer. The second isolation structure includes a second nitride liner and a second oxide fill layer. The second nitride layer is thicker than the first nitride layer.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: March 18, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chieh-Ping Wang, Tai-Chun Huang, Yung-Cheng Lu, Ting-Gang Chen, Chi On Chui
  • Patent number: 12256556
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spin orbit torque (SOT) layer on the MTJ, a passivation layer around the MTJ, and a second SOT layer on the first SOT layer and the passivation layer. Preferably, a top surface of the passivation layer is lower than a top surface of the first SOT layer.
    Type: Grant
    Filed: March 4, 2024
    Date of Patent: March 18, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hung-Chan Lin, Yu-Ping Wang
  • Publication number: 20250088891
    Abstract: A first node receives a first reference signal and a second reference signal, a time-frequency resource occupied by the first reference signal and a time-frequency resource occupied by the second reference signal being both associated with a target reference signal resource; and transmits CSI; a measurement of the first reference signal is used to generate the CSI, and the second reference signal is no later than a CSI reference resource for the CSI in time domain; whether a measurement of the second reference signal is used to generate the CSI depends on one of the following: power-related information of the first reference signal and the second reference signal; location-related information of the first node; spatial Rx parameters corresponding to the first reference signal and the second reference signal; or time-domain resources occupied by the first reference signal and the second reference signal.
    Type: Application
    Filed: September 3, 2024
    Publication date: March 13, 2025
    Applicant: SHANGHAI LANGBO COMMUNICATION TECHNOLOGY COMPANY LIMITED
    Inventors: Qi JIANG, Ping WANG, Xiaobo ZHANG
  • Publication number: 20250084111
    Abstract: Provided is a method for preparing 4-(hydroxymethylphosphinyl)-2-oxobutanoic acid, comprising the following steps: a) mixing methylphosphonite diester, carboxylic acid and acryloyl cyanide, performing addition reaction, and performing distillation under reduced pressure to obtain a material solution of (3-cyano-3-carbonylpropyl)methylphosphonate; b) mixing the material solution of (3-cyano-3-carbonylpropyl)methylphosphonate obtained in step a) with water uniformity, cooling to 10° C.-40° C., then adding hydrochloric acid dropwise for acidification, and after the dropwise addition being completed, continuing stirring for 0.1 h-1 h, then performing hydrolysis reaction, and finally performing purification treatment to obtain 4-(hydroxymethylphosphinyl)-2-oxobutanoic acid. In the provided preparation method, cyanation reaction is not required, which avoids the use of cyclic phosphonic anhydride that is high in cost and difficult to obtain and the highly toxic sodium cyanide.
    Type: Application
    Filed: March 6, 2023
    Publication date: March 13, 2025
    Applicants: ZHEJIANG WYNCA CHEMICAL INDUSTRY GROUP CO., LTD, ZHEJIANG UNIVERSITY
    Inventors: Lirong YANG, Shuguang ZHOU, Haisheng ZHOU, Long QIN, Jianping WU, Shenluan YU, Linlin WANG, Bo ZHAN, Ping WANG
  • Publication number: 20250084109
    Abstract: The present invention provides a method for preparing 4-(hydroxymethylphosphinyl)-2-oxobutanoic acid, comprising the following steps: a) mixing acryloyl chloride, a first solvent, a polymerization inhibitor, a catalyst and potassium ferrocyanide, performing a substitution reaction, and performing distillation under reduced pressure to obtain an acryloyl cyanide intermediate; b) mixing the acryloyl cyanide intermediate obtained in step a) with hydrochloric acid and a polymerization inhibitor, performing a hydrolysis reaction, and then performing purification treatment to obtain crude 2-carbonyl-3-butenoic acid; c) mixing the crude 2-carbonyl-3-butenoic acid obtained in step b) with a second solvent and methyldichlorophosphine, and performing an addition reaction to obtain a solution containing diacyl chloride; d) mixing the solution containing diacyl chloride obtained in step c) with water, performing a hydrolysis reaction, and performing purification to obtain 4-(hydroxymethylphosphinyl)-2-oxobutanoic acid.
    Type: Application
    Filed: March 6, 2023
    Publication date: March 13, 2025
    Applicants: ZHEJIANG WYNCA CHEMICAL INDUSTRY GROUP CO., LTD, ZHEJIANG UNIVERSITY
    Inventors: Shuguang ZHOU, Lirong YANG, Long QIN, Haisheng ZHOU, Shenluan YU, Jianping wu, Linlin WANG, Bo ZHAN, Ping WANG
  • Publication number: 20250084110
    Abstract: A method for preparing 4-(hydroxymethylphosphinyl)-2-oxobutanoic acid, comprising the following steps: a) mixing 3-chloropropionyl chloride, a first solvent, trimethylsilyl cyanide and cyanide salt, performing a substitution reaction to obtain a material solution containing 4-chloro-2-oxobutyronitrile, then performing distillation under reduced pressure, and performing separation to obtain 4-chloro-2-oxobutyronitrile intermediate; b) subjecting the 4-chloro-2-oxobutyronitrile intermediate obtained in step a) and methyl phosphonite diester to Arbuzov reaction in a second solvent in the presence of cuprous iodide to obtain a material solution of (3-cyano-3-oxopropyl) methyl phosphinate, and performing purification to obtain crude (3-cyano-3-oxopropyl) methyl phosphinate; c) mixing the obtained crude (3-cyano-3-oxopropyl)methyl phosphinate with hydrochloric acid, performing hydrolysis reaction, and then performing purification treatment to obtain 4-(hydroxymethylphosphinyl)-2-oxobutanoic acid.
    Type: Application
    Filed: March 6, 2023
    Publication date: March 13, 2025
    Applicants: ZHEJIANG WYNCA CHEMICAL INDUSTRY GROUP CO., LTD, ZHEJIANG UNIVERSITY
    Inventors: Shuguang ZHOU, Lirong YANG, Long QIN, Haisheng ZHOU, Shenluan YU, Jianping WU, Linlin WANG, Bo ZHAN, Ping WANG
  • Publication number: 20250087785
    Abstract: A battery pack includes a first header having a first conduit and a second header having a second conduit. The battery pack also includes an energy storage system having energy storage cells arranged between the first header and the second header. A coolant plate assembly is arranged between the first header and the second header and abuts the plurality of energy storage cells. The coolant plate assembly includes a coolant channel having a first end fluidically connected to the first conduit, a second end fluidically connected to the second conduit, and an intermediate portion defining a flow path. The coolant plate assembly also includes a first planar section having a first surface facing the energy storage cells and a second surface having protrusions extending into the coolant channel.
    Type: Application
    Filed: November 2, 2023
    Publication date: March 13, 2025
    Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Zhenwen Hu, Xiaoling Chen, Derek F. Lahr, Hui-Ping Wang, Chengwu Duan, Jian Yao, Lu Huang
  • Publication number: 20250076238
    Abstract: According to one embodiment, a sensor includes an element section. The element section includes a base including a first region, a second region and a third region, a first element fixed to the first region, a second element fixed to the second region, and a third element fixed to the third region. The first element includes a first fixed portion fixed to the first region, and a first film portion supported by the first fixed portion. The first film portion includes a first resistance member and a first layer including a first material. The second element includes a second fixed portion fixed to the second region, and a second film portion supported by the second fixed portion. The third element includes a third fixed portion fixed to the third region, and a third film portion supported by the third fixed portion.
    Type: Application
    Filed: June 5, 2024
    Publication date: March 6, 2025
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke AKIMOTO, Akira FUJIMOTO, Yoshihiko KURUI, Ping WANG
  • Patent number: 12243948
    Abstract: Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as pillars and/or holes, effectively increase the effective absorption length resulting in a greater absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more.
    Type: Grant
    Filed: September 3, 2024
    Date of Patent: March 4, 2025
    Assignee: W&W Sens Devices, Inc.
    Inventors: Shih-Yuan Wang, Shih-Ping Wang
  • Patent number: 12243924
    Abstract: Semiconductor device structures with a gate structure having different profiles at different portions of the gate structure may include a fin structure on a substrate, a source/drain structure on the fin structure, and a gate structure over the fin structure and along a sidewall of the fin. The source/drain structure is proximate the gate structure. The gate structure has a top portion having a first sidewall profile and a bottom portion having a second sidewall profile different from the first sidewall profile.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: March 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih Ping Wang, Chao-Cheng Chen, Jr-Jung Lin, Chi-Wei Yang
  • Publication number: 20250064000
    Abstract: The present invention provides an anti-insect culture medium, comprising a shaped medium having a plurality of pores interconnected to each other, and an anti-insect agent evenly dispersed and fixed in the pores; wherein the shaped medium comprises at least one culture medium solid, the anti-insect agent comprises an anti-insect ingredient, and the anti-insect agent is a sustained-release formulation. The anti-insect culture medium of the present invention can provide a long-term and complete anti-insect efficacy to plant roots. The present invention further provides an anti-insect method, which reduces the amount of anti-insect agents and avoids the inconvenience of regular application.
    Type: Application
    Filed: August 5, 2024
    Publication date: February 27, 2025
    Applicant: ROYAL BASE CORPORATION
    Inventor: Hao-Ping WANG
  • Patent number: 12233305
    Abstract: The application relates to a dumbbell which is convenient for adjusting a load. By arranging telescopic sleeves which can be telescopically adjusted in a handle of the dumbbell, a number of counterweights nested on the telescopic sleeves is controlled, thus achieving an easy adjustment of the load. By arranging a rotatable knob, the telescopic sleeves inside the handle are driven to act through a gear transmission. Meanwhile, due to a position limitation of a division bar of the dumbbell, the counterweights nested on the telescopic sleeves are prevented from sliding left and right, thus ensuring a firm coupling.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: February 25, 2025
    Assignee: ZHEJIANG KANGWANG INDUSTRY & TRADE CO., LTD
    Inventor: Ping Wang
  • Patent number: 12226816
    Abstract: Systems and methods for bending a material to a target resultant bending parameter using a bend forming tool are disclosed. The systems and methods receive values for parameters of properties of the material and of a bending process to be performed by the bend forming tool, creating or retrieving a calibration curve relating input bending parameter and resultant bending parameter based on the values from a database of calibration curves, determining a first springback compensated input bending parameter based on the target resultant bending parameter using the calibration curve, inputting the first springback compensated input bending parameter to the bend forming tool, and in a first step of bending the material, bending the material to the first springback compensated input bending parameter by applying the bending process using the bend forming tool.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: February 18, 2025
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Lu Huang, Hui-ping Wang, Bradley J Blaski, Joshua Lee Solomon, Blair E Carlson
  • Patent number: 12224482
    Abstract: A 3D IC package is provided. The 3D IC package includes: a first IC die comprising a first substrate at a back side of the first IC die; a second IC die stacked at the back side of the first IC die and facing the first substrate; a TSV through the first substrate and electrically connecting the first IC die and the second IC die, the TSV having a TSV cell including a TSV cell boundary surrounding the TSV; and a protection module fabricated in the first substrate, wherein the protection module is electrically connected to the TSV, and the protection module is within the TSV cell.
    Type: Grant
    Filed: August 10, 2023
    Date of Patent: February 11, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Hsiang Huang, Fong-Yuan Chang, Tsui-Ping Wang, Yi-Shin Chu