Abstract: The disclosure relates in some aspects to enabling a user terminal (UT) to obtain information about nearby cells and any beams generated by nearby cells. For example, a network can send a neighbor cell list to UTs, where the list identifies the cells in that neighborhood and provides information about any beams generated by those cells. Thus, a UT can learn the neighboring beams/cells that the UT can reselect to if the current beam/cell becomes weak. In some aspects, the UE can learn the attitude (e.g., pitch, roll, yaw, or any combination thereof) profile of neighboring satellites as well as the pointing angles and the ON-OFF schedules of their beams. In some aspects, the UT can learn a start angle and a span for a satellite and use this information to identify a satellite the UT can reselect to if the current beam/cell becomes weak.

Abstract: Described is a low power, high-density non-volatile differential memory bit-cell. The transistors of the differential memory bit-cell can be planar or non-planer and can be fabricated in the frontend or backend of a die. A bit-cell of the non-volatile differential memory bit-cell comprises first transistor first non-volatile structure that are controlled to store data of a first value. Another bit-cell of the non-volatile differential memory bit-cell comprises second transistor and second non-volatile structure that are controlled to store data of a second value, wherein the first value is an inverse of the second value. The first and second volatile structures comprise ferroelectric material (e.g., perovskite, hexagonal ferroelectric, improper ferroelectric).

Abstract: Services with policy control may be provided. A computing device may receive registration information associated with a border device. The registration information may comprise information identifying a service provided by a server associated with the border device, information identifying the border device, and policies associated with the service. Then an address for the server may be determined. Next a request may be received comprising the information identifying the service provided by the server. In response to receiving the request comprising the information identifying the service provided by the server, the address for the server, the information identifying the border device, and the policies associated with the service may be provided.

Abstract: There is provided a system for modulating user commands via command input images displayed on a graphical user interface based on a user viewing direction relative to the displayed command input images and the graphical user interface. The system uses an image capturing device for capturing real time images of a user's face, eyes and irises and determines the eye orientation. The system separates the graphical user interface into interface portions and determines a correlation between the eye orientation and one or more portions to determine if any of the foregoing are viewed portions. The system determines whether a viewed portion contains a command input image and only allows user input commands via the command input image to be processed if the image is within a viewed portion.

Abstract: Described is a low power, high-density a 1T-1C (one transistor and one capacitor) memory bit-cell, wherein the capacitor comprises a pillar structure having ferroelectric material (perovskite, improper ferroelectric, or hexagonal ferroelectric) and conductive oxides as electrodes. In various embodiments, one layer of the conductive oxide electrode wraps around the pillar capacitor, and forms the outer electrode of the pillar capacitor. The core of the pillar capacitor can take various forms.

Abstract: A method of wireless communication by a base station includes receiving a user equipment (UE) radio capability and a UE machine learning capability. The method also includes determining a neural network function (NNF) based on the UE radio capability. The method includes determining a neural network model. The neural network model includes a model structure and a parameter set, based on the NNF, the UE machine learning capability, and a capability of a network entity. The method also includes configuring the network entity with the neural network model.

Abstract: A new class of logic gates are presented that use non-linear polar material. The logic gates include multi-input majority gates and threshold gates. Input signals in the form of analog, digital, or combination of them are driven to first terminals of non-ferroelectric capacitors. The second terminals of the non-ferroelectric capacitors are coupled to form a majority node. Majority function of the input signals occurs on this node. The majority node is then coupled to a first terminal of a capacitor comprising non-linear polar material. The second terminal of the capacitor provides the output of the logic gate, which can be driven by any suitable logic gate such as a buffer, inverter, NAND gate, NOR gate, etc. Any suitable logic or analog circuit can drive the output and inputs of the majority logic gate. As such, the majority gate of various embodiments can be combined with existing transistor technologies.

Abstract: This disclosure provides systems, methods, and devices for wireless communication that support AI model-based enhancements for RRC IDLE and INACTIVE state operations. In a first aspect, a method of wireless communication includes receiving, by a wireless communication device, artificial intelligence (AI) model configuration information for IDLE/INACTIVE state procedures; retrieving, by the wireless communication device, an AI model for IDLE/INACTIVE state procedures based on the AI model configuration information; and performing, by the wireless communication device, one or more IDLE/INACTIVE state procedures based on the AI model. Other aspects and features are also claimed and described.

Abstract: There is provided a system and for simultaneously displaying multiple graphical user interfaces via the same display. The multiple graphical user interfaces are hosted by one or more remote host controllers. A user device is in operative communication with the one or more remote host controllers and comprises an interface display for displaying one or more of the multiple graphical user interfaces. A system controller is in operative communication with the user display device. The system controller has a processor with an associated memory of processor executable code that when executed provides the controller with performing computer-implementable steps comprising separating the interface display in two or more interface display portions and selectively providing for two or more of the graphical user interfaces to be simultaneously displayed via respective ones of the two or more interface display portions.

Abstract: Automated techniques for converting network devices from a Layer 2 (L2) network into a Layer 3 (L3) network in a hierarchical manner are described herein. The network devices may be configured to boot such that their ports are in an initialization mode in which the ports are unable to transmit locally generated DHCP packets. When a network device detects that a neighbor (or “peer”) device has acquired an IP address or has been configured by a network controller, then the port on which the neighbor device is detected can then be transitioned from the initialization mode into a forwarding mode. In the forwarding mode, the port can be used to transmit packets to obtain an IP address. Thus, the network devices are converted from an L2 device to an L3 device in a hierarchical order such that upstream devices are discovered and converted into L3 devices before downstream devices.

Abstract: Various examples are directed to systems and methods for executing an enterprise resource planning solution using a database management system (DBMS). An order-to-cash process executing at the at least one processor accesses an indication of waste material for disposal and generates a waste disposal order, where the waste disposal order comprises a material description field including a description of the waste material, regulatory reporting data describing at least one report of the waste material to be provided to a regulatory agency, and a price field indicating a negative price.

Abstract: A low power sequential circuit (e.g., latch) uses a non-linear polar capacitor to retain charge with fewer transistors than traditional CMOS sequential circuits. The sequential circuit includes a 3-input majority gate having first, second, and third inputs, and a first output. The sequential circuit includes a driver coupled to the first output, wherein the driver is to generate a second output. The sequential circuit further includes an exclusive-OR (XOR) gate to receive a clock and the second output, wherein the XOR gate is to generate a third output which couples to the second input, where the first input is to receive a data, and wherein the third input is to receive the second output.

Abstract: Methods, systems, and devices for wireless communication are described. A user equipment (UE) may receive control signaling indicating a measurement configuration for minimization of drive test measurement and reporting supporting broadcast receptions within a single-frequency network. The UE may determine, based at least in part on the measurement configuration, a set of measurements for the single-frequency network. The UE may transmit a minimization of drive test report indicating the set of measurements.

Abstract: A memory is provided which comprises a capacitor including non-linear polar material. The capacitor may have a first terminal coupled to a node (e.g., a storage node) and a second terminal coupled to a plate-line. The capacitors can be a planar capacitor or non-planar capacitor (also known as pillar capacitor). The memory includes a transistor coupled to the node and a bit-line, wherein the transistor is controllable by a word-line, wherein the plate-line is parallel to the bit-line. The memory includes a refresh circuitry to refresh charge on the capacitor periodically or at a predetermined time. The refresh circuit can utilize one or more of the endurance mechanisms. When the plate-line is parallel to the bit-line, a specific read and write scheme may be used to reduce the disturb voltage for unselected bit-cells. A different scheme is used when the plate-line is parallel to the word-line.

Abstract: A low power sequential circuit (e.g., latch) uses a non-linear polar capacitor to retain charge with fewer transistors than traditional CMOS sequential circuits. In one example, a sequential circuit includes pass-gates and inverters, but without a feedback mechanism or memory element. In another example, a sequential uses load capacitors (e.g., capacitors coupled to a storage node and a reference supply). The load capacitors are implemented using ferroelectric material, paraelectric material, or linear dielectric. In one example, a sequential uses minority, majority, or threshold gates with ferroelectric or paraelectric capacitors. In one example, a sequential circuit uses minority, majority, or threshold gates configured as NAND gates.

Abstract: A memory is provided which comprises a capacitor including non-linear polar material. The capacitor may have a first terminal coupled to a node (e.g., a storage node) and a second terminal coupled to a plate-line. The capacitors can be a planar capacitor or non-planar capacitor (also known as pillar capacitor). The memory includes a transistor coupled to the node and a bit-line, wherein the transistor is controllable by a word-line, wherein the plate-line is parallel to the bit-line. The memory includes a refresh circuitry to refresh charge on the capacitor periodically or at a predetermined time. The refresh circuit can utilize one or more of the endurance mechanisms. When the plate-line is parallel to the bit-line, a specific read and write scheme may be used to reduce the disturb voltage for unselected bit-cells. A different scheme is used when the plate-line is parallel to the word-line.

Abstract: An Integrated Circuit (IC) includes a storage element and control circuitry. The control circuitry is configured to select, responsively to a scan-enable control, between a functional-data input and a scan-data input to serve as an input to the storage element, to selectively disable toggling of an output of the storage element, responsively to a clock-enable control, by gating a clock signal provided to the storage element, and, while the clock-enable control indicates that the output of the storage element is to be disabled from toggling, to select the input of the storage element to be the scan-data input.

Abstract: Ferroelectric capacitor is formed by conformably depositing a non-conductive dielectric over the etched first and second electrodes, and forming a metal cap or helmet over a selective part of the non-conductive dielectric, wherein the metal cap conforms to portions of sidewalls of the non-conductive dielectric. The metal cap is formed by applying physical vapor deposition at a grazing angle to selectively deposit a metal mask over the selective part of the non-conductive dielectric. The metal cap can also be formed by applying ion implantation with tuned etch rate. The method further includes isotopically etching the metal cap and the non-conductive dielectric such that non-conductive dielectric remains on sidewalls of the first and second electrodes but not on the third and fourth electrodes.

Abstract: Aspects present herein relate to methods and devices for wireless communication including an apparatus, e.g., a UE and/or a base station. The apparatus may receive, from a base station, a logged measurement configuration including a PLMN ID and a NID, the logged measurement configuration further including at least one of a trace reference, a logging area, a MDT PLMN list, or a MDT NPN list. The apparatus may also store the PLMN ID and the NID based on the received logged measurement configuration. Additionally, the apparatus may compare the PLMN ID and the NID to an MDT SNPN list to identify if the PLMN ID and the NID are included in the MDT SNPN list. The apparatus may also transmit, to the base station, an availability indicator if the PLMN ID and the NID are included in the MDT SNPN list.

Abstract: A high-density low voltage ferroelectric (or paraelectric) memory bit-cell that includes a planar ferroelectric or paraelectric capacitor. The memory bit-cell comprises 1T1C configuration, where a plate-line is parallel to a word-line, or the plate-line is parallel to a bit-line. The memory bit-cell can be 1TnC, where ‘n’ is a number. In a 1TnC bit-cell, the capacitors are vertically stacked allowing for multiple values to be stored in a single bit-cell. The memory bit-cell can be multi-element FE gain bit-cell. In a multi-element FE gain bit-cell, data sensing is done with signal amplified by a gain transistor in the bit-cell. As such, higher storage density is realized using multi-element FE gain bit-cells. In some examples, the 1T1C, 1TnC, and multi-element FE gain bit-cells are multi-level bit-cells. To realize multi-level bit-cells, the capacitor is placed in a partially switched polarization state by applying different voltage levels or different time pulse widths at the same voltage level.