Patents by Inventor Ralf Siemieniec

Ralf Siemieniec has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor Device with Stripe-Shaped Trench Gate Structures, Transistor Mesas and Diode Mesas
    Publication number: 20160190301
    Abstract: A semiconductor device includes stripe-shaped trench gate structures that extend in a semiconductor body along a first horizontal direction. Transistor mesas between neighboring trench gate structures include body regions and source zones, wherein the body regions form first pn junctions with a drift structure and second pn junctions with the source zones. The source zones directly adjoin two neighboring trench gate structures, respectively. Diode mesas that include at least portions of diode regions form third pn junctions with the drift structure. The diode mesas directly adjoin two neighboring trench gate structures, respectively. The transistor mesas and the diode mesas alternate at least along the first horizontal direction.
    Type: Application
    Filed: December 18, 2015
    Publication date: June 30, 2016
    Inventors: Thomas Aichinger, Dethard Peters, Ralf Siemieniec
  • METHOD OF FORMING A SILICON-CARBIDE DEVICE WITH A SHIELDED GATE
    Publication number: 20160172468
    Abstract: A silicon-carbide semiconductor substrate having a plurality of first doped regions being laterally spaced apart from one another and beneath a main surface, and a second doped region extending from the main surface to a third doped region that is above the first doped regions is formed. Fourth doped regions extending from the main surface to the first doped regions are formed. A gate trench having a bottom that is arranged over a portion of one of the first doped regions is formed. A high-temperature step is applied to the substrate so as to realign silicon-carbide atoms along sidewalls of the trench and form rounded corners in the gate trench. A surface layer that forms along the sidewalls of the gate trench during the high-temperature step from the substrate is removed.
    Type: Application
    Filed: December 11, 2014
    Publication date: June 16, 2016
    Inventors: Romain Esteve, Dethard Peters, Wolfgang Bergner, Ralf Siemieniec, Thomas Aichinger, Daniel Kueck
  • Semiconductor Device with a Trench Electrode
    Publication number: 20160163852
    Abstract: A semiconductor device includes a semiconductor body and a device cell in the semiconductor body. The device cell includes: drift, source, body and diode regions; a pn junction between the diode and drift regions; a trench with first and second opposing sidewalls and a bottom, the body region adjoining the first sidewall, the diode region adjoining the second sidewall, and the pn junction adjoining the trench bottom; a gate electrode in the trench and dielectrically insulated from the source, body, diode and drift regions by a gate dielectric; a further trench extending from a first surface of the semiconductor body into the semiconductor body; a source electrode arranged in the further trench adjoining the source and diode regions. The diode region includes a lower diode region arranged below the trench bottom. The lower diode region has a maximum of a doping concentration distant to the trench bottom.
    Type: Application
    Filed: December 2, 2015
    Publication date: June 9, 2016
    Inventors: Ralf Siemieniec, Wolfgang Bergner, Romain Esteve, Dethard Peters
  • Switch circuit and semiconductor device
    Patent number: 9356017
    Abstract: In an embodiment, a switch circuit includes an input drain node, an input source node and an input gate node, and a high voltage transistor having a current path coupled in parallel with a hybrid diode. The hybrid diode includes a depletion mode transistor serially coupled with a diode and operatively coupled in a cascode arrangement with the input source node.
    Type: Grant
    Filed: February 5, 2015
    Date of Patent: May 31, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Ralf Siemieniec, Gilberto Curatola
  • Method for forming a transistor device having a field electrode
    Patent number: 9324817
    Abstract: A method for forming a transistor device includes forming a field electrode arrangement by forming a trench in a first surface of a semiconductor body, forming a protection layer on sidewalls of the trench in an upper trench section, forming a dielectric layer on a bottom of the trench and on sidewall sections uncovered by the protection layer, and forming a field electrode at least on the dielectric layer. The method further includes forming a gate electrode and a gate electrode dielectric horizontally spaced apart from the field electrode arrangement with respect to the first surface, forming a body region adjacent the gate electrode and dielectrically insulated from the gate electrode by the gate dielectric, and forming a source region in the body region.
    Type: Grant
    Filed: July 13, 2015
    Date of Patent: April 26, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Ralf Siemieniec, Oliver Blank
  • Semiconductor device
    Patent number: 9293558
    Abstract: A semiconductor device includes at least two device cells integrated in a semiconductor body. Each device cell includes a drift region, a source region, a drain region arranged between the source region and the drift region, a diode region, a pn junction between the diode region and the drift region, and a trench with a first sidewall, a second sidewall opposite the first sidewall, and a bottom. The body region adjoins the first sidewall, the diode region adjoins the second sidewall, and the pn junction adjoins the bottom of the trench. Each device cell further includes a gate electrode arranged in the trench and dielectrically insulated from the body region, the diode region and the drift region by a gate dielectric. The diode regions of the at least two device cells are distant in a lateral direction of the semiconductor body.
    Type: Grant
    Filed: November 26, 2012
    Date of Patent: March 22, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Ralf Siemieniec, Dethard Peters, Romain Esteve
  • Semiconductor Device with Field Electrode Structure
    Publication number: 20160079376
    Abstract: According to an embodiment a semiconductor device includes a semiconductor body with a mesa section that may include a rectifying structure and a first drift zone section. The mesa section surrounds a field electrode structure that includes a field electrode and a field dielectric sandwiched between the field electrode and the semiconductor body. A maximum horizontal extension of the field electrode in a measure plane parallel to a first surface of the semiconductor body is at most 500 nm.
    Type: Application
    Filed: August 28, 2015
    Publication date: March 17, 2016
    Inventors: Franz Hirler, Oliver Blank, Ralf Siemieniec
  • Semiconductor Device with Field Electrode Structures, Gate Structures and Auxiliary Diode Structures
    Publication number: 20160079238
    Abstract: A semiconductor device includes field electrode structures extending in a direction vertical to a first surface in a semiconductor body. Cell mesas are formed from portions of the semiconductor body between the field electrode structures and include body zones that form first pn junctions with a drift zone. Gate structures between the field electrode structures control a current flow through the body zones. Auxiliary diode structures with a forward voltage lower than the first pn junctions are electrically connected in parallel with the first pn junctions, wherein semiconducting portions of the auxiliary diode structures are formed in the cell mesas.
    Type: Application
    Filed: September 9, 2015
    Publication date: March 17, 2016
    Inventors: Ralf Siemieniec, Oliver Blank, Franz Hirler, Martin Henning Vielemeyer
  • Semiconductor Device with Field Electrode and Contact Structure
    Publication number: 20160064496
    Abstract: A semiconductor device includes a field electrode structure with a field electrode and a field dielectric surrounding the field electrode. A semiconductor body includes a transistor section surrounding the field electrode structure and including a source zone, a first drift zone section and a body zone separating the source zone and the first drift zone section. The body zone forms a first pn junction with the source zone and a second pn junction with the first drift zone section. A gate structure surrounds the field electrode structure and includes a gate electrode and a gate dielectric separating the gate electrode and the body zone. A contact structure directly adjoins the source and body zones and surrounds the field electrode structure equably with respect to the field electrode structure.
    Type: Application
    Filed: August 7, 2015
    Publication date: March 3, 2016
    Inventors: Ralf Siemieniec, Oliver Blank, Michael Hutzler, David Laforet, Cedric Ouvrard, Li Juin Yip
  • Semiconductor Device with Field Electrode Structures in a Cell Area and Termination Structures in an Edge Area
    Publication number: 20160064547
    Abstract: A semiconductor device includes field electrode structures regularly arranged in lines in a cell area and forming a first portion of a regular pattern. Termination structures are formed in an inner edge area surrounding the cell area, wherein at least portions of the termination structures form a second portion of the regular pattern. Cell mesas separate neighboring ones of the field electrode structures from each other in the cell area and include first portions of a drift zone, wherein a voltage applied to a gate electrode controls a current flow through the cell mesas. At least one doped region forms a homojunction with the drift zone in the inner edge area.
    Type: Application
    Filed: August 18, 2015
    Publication date: March 3, 2016
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Ralf Siemieniec, Oliver Blank, Franz Hirler, Michael Hutzler, Martin Poelzl
  • Semiconductor Device with a Termination Mesa Between a Termination Structure and a Cell Field of Field Electrode Structures
    Publication number: 20160064548
    Abstract: A semiconductor device includes a cell field with a plurality of field electrode structures and cell mesas. The field electrode structures are arranged in lines. The cell mesas separate neighboring ones of the field electrode structures from each other. Each field electrode structure includes a field electrode and a field dielectric separating the field electrode from a semiconductor body. A termination structure surrounds the cell field, extends from a first surface into the semiconductor body, and includes a termination electrode and a termination dielectric separating the termination electrode from the semiconductor body. The termination and field dielectrics have the same thickness. A termination mesa, which is wider than the cell mesas, separates the termination structure from the cell field.
    Type: Application
    Filed: August 27, 2015
    Publication date: March 3, 2016
    Inventors: David Laforet, Ralf Siemieniec
  • Semiconductor Device and a Method for Manufacturing a Semiconductor Device
    Publication number: 20160064477
    Abstract: A semiconductor device comprises a semiconductor substrate structure comprising a cell region and an edge termination region surrounding the cell region. Further it comprises a plurality of needle-shaped cell trenches within the cell region reaching from a surface of the semiconductor substrate structure into the substrate structure and an edge termination trench within the edge termination region surrounding the cell region at the surface of the semiconductor substrate structure.
    Type: Application
    Filed: August 27, 2015
    Publication date: March 3, 2016
    Inventors: Oliver Blank, Franz Hirler, Ralf Siemieniec, Li Juin Yip
  • Junction field effect transistor with vertical PN junction
    Patent number: 9276135
    Abstract: An embodiment relates to a JFET with a channel region and a gate region forming a pn junction. Between a source region and a drain region in a semiconductor portion, the pn junction extends along a vertical direction perpendicular to a first surface of the semiconductor portion. The source, channel and drain regions have a first conductivity type and are arranged along the vertical direction. The gate region and a shielding region between the gate and drain regions have a second, complementary conductivity type. An auxiliary region separates the gate and shielding regions in the semiconductor portion.
    Type: Grant
    Filed: September 13, 2013
    Date of Patent: March 1, 2016
    Assignee: Infineon Technologies AG
    Inventors: Ralf Siemieniec, Cedric Ouvrard
  • Semiconductor device including a normally-off transistor and transistor cells of a normally-on GaN HEMT
    Patent number: 9263443
    Abstract: A semiconductor device includes a first semiconductor die including a normally-off transistor and a second semiconductor die including a plurality of transistor cells of a normally-on GaN HEMT. One of a source terminal and a drain terminal of the normally-off transistor is electrically coupled to a gate terminal of the normally-on GaN HEMT, and the other one of the source terminal and the drain terminal of the normally-off transistor is electrically coupled to one of a source terminal and a drain terminal of the normally-on GaN HEMT. The second semiconductor die further includes a gate resistor electrically coupled between the gate terminal of the normally-off transistor and respective gates of the plurality of transistor cells, and a voltage clamping element electrically coupled between the gate terminal and one of the source terminal and the drain terminal of the normally-on GaN HEMT.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: February 16, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Michael Treu, Ralf Siemieniec
  • Semiconductor component with a space saving edge structure
    Patent number: 9252251
    Abstract: A semiconductor component is disclosed. One embodiment includes a semiconductor body including a first semiconductor layer having at least one active component zone, a cell array with a plurality of trenches, and at least one cell array edge zone. The cell array edge zone is only arranged in an edge region of the cell array, adjoining at least one trench of the cell array, and being at least partially arranged below the at least one trench in the cell array.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: February 2, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Franz Hirler, Ralf Siemieniec, Christian Geissler, Oliver Blank, Maximilian Roesch
  • Power MOSFET and Method of Manufacturing a Power MOSFET
    Publication number: 20160020319
    Abstract: A power MOSFET includes a gate electrode in a gate trench in a main surface of a semiconductor substrate, the gate trench extending parallel to the main surface. The power MOSFET further includes a field electrode in a field plate trench in the main surface. The field plate trench has an extension length in a first direction which is less than double and more than half of an extension length of the field plate trench in a second direction perpendicular to the first direction, the first and the second directions being parallel to the main surface. The gate electrode includes a gate electrode material which comprises a metal.
    Type: Application
    Filed: July 8, 2015
    Publication date: January 21, 2016
    Inventors: David Laforet, Oliver Blank, Michael Hutzler, Cedric Ouvrard, Ralf Siemieniec, Li Juin Yip
  • Semiconductor Device Comprising a Field Electrode
    Publication number: 20160013280
    Abstract: A semiconductor device includes a gate electrode adjacent to a body region in a semiconductor substrate. The semiconductor device further includes a field electrode in a field plate trench in the main surface, the field plate trench having an extension length in a first direction parallel to a main surface. The extension length is less than the double of an extension length in a second direction that is perpendicular to the first direction parallel to the main surface. The extension length in the first direction is more than half of the extension length in the second direction. The field electrode is insulated from an adjacent drift zone by means of a field dielectric layer. A field plate material of the field electrode has a resistivity in a range from 105 to 10?1 Ohm·cm.
    Type: Application
    Filed: June 24, 2015
    Publication date: January 14, 2016
    Inventors: David Laforet, Franz Hirler, Oliver Blank, Ralf Siemieniec
  • Semiconductor Device Having a Lower Diode Region Arranged Below a Trench
    Publication number: 20150340487
    Abstract: A semiconductor device includes a semiconductor body and at least one device cell integrated in the semiconductor body. Each device cell includes: a drift region, a source region, and a body region arranged between the source and drift regions; a diode region and a pn junction between the diode and drift regions; a trench having a first sidewall, a second sidewall opposite the first sidewall, and a bottom, the body region adjoining the first sidewall, the diode region adjoining the second sidewall, and the pn junction adjoining the bottom; a gate electrode in the trench and dielectrically insulated from the body, diode and drift regions by a gate dielectric. The diode region has a lower diode region arranged below the trench bottom, and the lower diode region has a maximum of a doping concentration distant to the trench bottom. A corresponding method of manufacturing the device also is provided.
    Type: Application
    Filed: May 21, 2015
    Publication date: November 26, 2015
    Inventors: Ralf Siemieniec, Wolfgang Bergner, Romain Esteve, Dethard Peters
  • Method and contact structure for coupling a doped body region to a trench electrode of a semiconductor device
    Patent number: 9190480
    Abstract: A semiconductor body has a first surface, a second opposing surface, an edge, an active device region, and an edge termination region. A trench extends from the first surface into the semiconductor body in the edge termination region and includes sidewalls and an insulated electrode. A first conductivity type doped region extends from the first surface into the semiconductor body in the edge termination region and has a planar outer surface along the first surface that adjoins the trench at a corner of the trench sidewall and the first surface and has a side surface extending from the corner along the trench sidewall. A first interconnect contacts the trench electrode. A second interconnect contacts the outer surface and the side surface. A contact couples the first doped region to the trench electrode and has a bottom surface coplanar with the first surface from a contact edge to the corner.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: November 17, 2015
    Assignee: Infineon Technologies Austria AG
    Inventors: Ralf Siemieniec, Li Juin Yip, Oliver Blank
  • Method for Forming a Transistor Device having a Field Electrode
    Publication number: 20150318361
    Abstract: A method for forming a transistor device includes forming a field electrode arrangement by forming a trench in a first surface of a semiconductor body, forming a protection layer on sidewalls of the trench in an upper trench section, forming a dielectric layer on a bottom of the trench and on sidewall sections uncovered by the protection layer, and forming a field electrode at least on the dielectric layer. The method further includes forming a gate electrode and a gate electrode dielectric horizontally spaced apart from the field electrode arrangement with respect to the first surface, forming a body region adjacent the gate electrode and dielectrically insulated from the gate electrode by the gate dielectric, and forming a source region in the body region.
    Type: Application
    Filed: July 13, 2015
    Publication date: November 5, 2015
    Inventors: Ralf Siemieniec, Oliver Blank