Abstract: A vertical transistor device includes a silicon-carbide substrate, a gate trench formed in the silicon-carbide substrate, a body region adjacent the gate trench, a source region adjacent the gate trench and above the body region, and a dielectric material covering a bottom and a sidewall of the gate trench. A thickness of the dielectric material is greater at the bottom of the gate trench than along the sidewall of the gate trench. Further vertical transistor device embodiments and corresponding methods of manufacture are also described.

Abstract: A semiconductor device includes needle-shaped field plate structures extending from a first surface into transistor sections of a semiconductor portion in a transistor cell area. A grid structure separates the transistor sections from each other. The grid structure includes: stripe-shaped gate edge portions extending along one edge of the transistor sections, respectively; gate node portions wider than the gate edge portions and connecting two or more of the gate edge portions, respectively; and one or more connection sections of the semiconductor portion, wherein the one or more connection sections extend between neighboring transistor sections.

Abstract: According to an embodiment of a semiconductor device, the device includes a semiconductor body with a drift region and neighboring device cells integrated in the semiconductor body. Each device cell includes: a body region arranged between a source region and the drift region; a diode region and a pn junction between the diode region and the drift region; a trench with first and second opposing sidewalls and a bottom, the body region adjoining the first sidewall, the diode region adjoining the second sidewall, and the pn junction adjoining the bottom; and a gate electrode arranged in the trench and dielectrically insulated from the semiconductor body by a gate dielectric. The diode regions together with the drift region act as a JFET, which has a channel region in the drift region between the diode regions. The drift region has a locally increased doping concentration in the channel region of the JFET.

Abstract: A semiconductor body having a drift region layer, a body region layer adjoining the drift region layer, and a source region layer adjoining the body region layer and forming a first surface of the semiconductor body is provided. At least two trenches extend from the first surface of the semiconductor body through the source region layer and the body region layer. In each of the trenches a gate electrode and a gate dielectric are formed. Diode regions are directly adjacent to each of the at least two trenches. The diode regions extend from the first surface of the semiconductor body through the source region layer and the body region layer. The diode regions include a first region and a second region. A doping concentration in the diode regions varies such that a doping concentration is higher near the first surface than at the bottom of the trench.

Abstract: A semiconductor device includes a semiconductor body having a first silicon carbide region and a second silicon carbide region which forms a pn-junction with the first silicon carbide region, a first metallization on a front side of the semiconductor body, a contact region that forms an Ohmic contact with the second silicon carbide region, and a barrier-layer between the first metallization and the contact region and that is in Ohmic connection with the first metallization and the contact region. The barrier-layer forms a Schottky-junction with the first silicon carbide region, and includes molybdenum nitride or tantalum nitride. Additional semiconductor device embodiments and corresponding methods of manufacture are described.

Abstract: A body structure and a drift zone are formed in a semiconductor layer, wherein the body structure and the drift zone form a first pn junction. A silicon nitride layer is formed on the semiconductor layer. A silicon oxide layer is formed from at least a vertical section of the silicon nitride layer by oxygen radical oxidation.

Abstract: A semiconductor device comprises a semiconductor substrate structure comprising a cell region and an edge termination region surrounding the cell region. Further it comprises a plurality of needle-shaped cell trenches within the cell region reaching from a surface of the semiconductor substrate structure into the substrate structure and an edge termination trench within the edge termination region surrounding the cell region at the surface of the semiconductor substrate structure.

Abstract: A semiconductor device includes a semiconductor body formed from a semiconductor material with a band-gap of at least 2.0 eV, the semiconductor body having a diode region and a source region. The semiconductor device further includes a trench gate structure having a first sidewall and a second sidewall opposite the first sidewall, the first sidewall and the second sidewall extending along a common longitudinal direction. A doping concentration of a first doping type is higher in the diode region than in the source region. The trench gate structure projects from a first surface of the semiconductor body into the semiconductor body. A first portion of the second sidewall at the first surface is directly adjoined by the source region. A second portion of the second sidewall is in direct contact with the diode region. Additional semiconductor device embodiments are provided.

Abstract: A semiconductor device includes a cell field with a plurality of field electrode structures and cell mesas. The field electrode structures are arranged in lines. The cell mesas separate neighboring ones of the field electrode structures from each other. Each field electrode structure includes a field electrode and a field dielectric separating the field electrode from a semiconductor body. A termination structure surrounds the cell field, extends from a first surface into the semiconductor body, and includes a termination electrode and a termination dielectric separating the termination electrode from the semiconductor body. The termination and field dielectrics have the same thickness. A termination mesa, which is wider than the cell mesas, separates the termination structure from the cell field.

Abstract: According to an embodiment of a semiconductor device, the device includes a semiconductor body with a drift region and neighboring device cells integrated in the semiconductor body. Each device cell includes: a body region arranged between a source region and the drift region; a diode region and a pn junction between the diode region and the drift region; a trench with first and second opposing sidewalls and a bottom, the body region adjoining the first sidewall, the diode region adjoining the second sidewall, and the pn junction adjoining the bottom; and a gate electrode arranged in the trench and dielectrically insulated from the semiconductor body by a gate dielectric. The diode regions together with the drift region act as a JFET, which has a channel region in the drift region between the diode regions. The drift region has a locally increased doping concentration in the channel region of the JFET.

Abstract: A SIC transistor device includes a silicon-carbide semiconductor substrate having a plurality of first doped regions laterally spaced apart from one another and beneath a main surface of the substrate, a second doped region extending from the main surface to a third doped region that is above the first doped regions, and a plurality of fourth doped regions in the substrate extending from the main surface to the first doped regions. The second doped region has a first conductivity type. The first, third and fourth doped regions have a second conductivity type opposite the first conductivity type. A gate trench extends through the second and third doped regions. The gate trench has sidewalls, a bottom and rounded corners between the bottom and the sidewalls.

Abstract: A semiconductor body has a drift region layer, a body region layer adjoining the drift region layer, and a source region layer adjoining the body region layer and forming a first surface of the semiconductor body. At least two diode regions extend from the first surface through the source and body region layers into the drift region layer. Each diode region and the drift region layer form one pn-junction. At least two trenches have first and second opposing sidewalls and a bottom such that each trench adjoins the body region layer on one sidewall, one diode region on the second sidewall and one pn-junction on the bottom. In each trench, a gate dielectric dielectrically insulates a gate electrode from the semiconductor body. Sections of the source and body region layers remaining after forming the diode regions form source regions and body regions, respectively.

Abstract: A method for producing a field-effect semiconductor device includes providing a semiconductor body with a first surface defining a vertical direction, defining an active area, forming a vertical trench from the first surface into the semiconductor body, forming a field dielectric layer at least on a side wall and a bottom wall of the vertical trench, depositing a conductive layer on the field dielectric layer, forming a closed cavity on the conductive layer in the vertical trench, and forming an insulated gate electrode on the closed cavity in the vertical trench.

Abstract: A SIC transistor device includes a silicon-carbide semiconductor substrate having a plurality of first doped regions laterally spaced apart from one another and beneath a main surface of the substrate, a second doped region extending from the main surface to a third doped region that is above the first doped regions, and a plurality of fourth doped regions in the substrate extending from the main surface to the first doped regions. The second doped region has a first conductivity type. The first, third and fourth doped regions have a second conductivity type opposite the first conductivity type. A gate trench extends through the second and third doped regions. The gate trench has sidewalls, a bottom and rounded corners between the bottom and the sidewalls.

Abstract: An embodiment of a semiconductor device includes a transistor cell array having transistor cells in a semiconductor body. A planar gate structure is on the semiconductor body at a first side. Field electrode trenches extend into the semiconductor body from the first side. Each of the field electrode trenches includes a field electrode structure. A depth d of the field electrode trenches is greater than a maximum lateral dimension wmax of the field electrode trenches at the first side.

Abstract: A semiconductor device includes compensation structures that extend from a first surface into a semiconductor portion. Sections of the semiconductor portion between neighboring ones of the compensation structures form semiconductor mesas. A field dielectric separating a field electrode in the compensation structures from the semiconductor portion includes a thermally grown portion, which directly adjoins the semiconductor portion. A not fully densified deposited portion of the field dielectric has a lower density than the thermally grown portion.

Abstract: A semiconductor device includes a body region arranged between source and drift regions in a semiconductor body. A gate trench extends from a first surface of the semiconductor body, through the source and body regions and into the drift region. A diode region extends under the gate trench, and a pn junction is between the diode region and the drift region below the gate trench. A gate electrode arranged in the gate trench is dielectrically insulated from the source, body, diode and drift regions by a gate dielectric. A further trench spaced apart from the gate trench extends from the first surface of the semiconductor body, through the source and diode regions and into the drift region. A source electrode arranged in the further trench adjoins the drift region in the further trench to form a Schottky contact with the drift region.

Abstract: A method of manufacturing a semiconductor device includes: forming a trench extending into a semiconductor substrate and a polysilicon gate electrode in the trench; forming a body region of a first conductivity type in the substrate adjacent the trench and a source region of a second conductivity type adjacent the body region and the trench; forming a dielectric layer on the substrate; forming a gate metallization on the dielectric layer which covers part of the substrate and a source metallization on the dielectric layer which is electrically connected to the source region, spaced apart from the gate metallization and covering a different part of the substrate than the gate metallization; and forming a metal-filled groove in the polysilicon gate electrode which is electrically connected to the gate metallization. The metal-filled groove extends along a length of the trench underneath at least part of the source metallization.

Abstract: A transistor cell includes a drift region, a source region, and a body region arranged between the source region and the drift region in a semiconductor body. A drain region is below the drift region. An insulated gate trench extends into the drift region. A diode region extends deeper into the drift region than the insulated gate trench and partly under the insulated gate trench so as to form a pn junction with the drift region below a bottom of the insulated gate trench. The body region adjoins a first sidewall of the insulated gate trench and the diode region adjoins a second sidewall of the insulated gate trench opposite the first sidewall so that the body region of the transistor cell and a channel region including a region of the body region extending along the first sidewall are separated from the diode region by the insulated gate trench.

Abstract: A semiconductor device includes a semiconductor body and a device cell in the semiconductor body. The device cell includes: drift, source, body and diode regions; a pn junction between the diode and drift regions; a trench with first and second opposing sidewalls and a bottom, the body region adjoining the first sidewall, the diode region adjoining the second sidewall, and the pn junction adjoining the trench bottom; a gate electrode in the trench and dielectrically insulated from the source, body, diode and drift regions by a gate dielectric; a further trench extending from a first surface of the semiconductor body into the semiconductor body; a source electrode arranged in the further trench adjoining the source and diode regions. The diode region includes a lower diode region arranged below the trench bottom. The lower diode region has a maximum of a doping concentration distant to the trench bottom.