Abstract: A SIC transistor device includes a silicon-carbide semiconductor substrate having a plurality of first doped regions laterally spaced apart from one another and beneath a main surface of the substrate, a second doped region extending from the main surface to a third doped region that is above the first doped regions, and a plurality of fourth doped regions in the substrate extending from the main surface to the first doped regions. The second doped region has a first conductivity type. The first, third and fourth doped regions have a second conductivity type opposite the first conductivity type. A gate trench extends through the second and third doped regions. The gate trench has sidewalls, a bottom and rounded corners between the bottom and the sidewalls.

Abstract: A semiconductor body has a drift region layer, a body region layer adjoining the drift region layer, and a source region layer adjoining the body region layer and forming a first surface of the semiconductor body. At least two diode regions extend from the first surface through the source and body region layers into the drift region layer. Each diode region and the drift region layer form one pn-junction. At least two trenches have first and second opposing sidewalls and a bottom such that each trench adjoins the body region layer on one sidewall, one diode region on the second sidewall and one pn-junction on the bottom. In each trench, a gate dielectric dielectrically insulates a gate electrode from the semiconductor body. Sections of the source and body region layers remaining after forming the diode regions form source regions and body regions, respectively.

Abstract: A method for producing a field-effect semiconductor device includes providing a semiconductor body with a first surface defining a vertical direction, defining an active area, forming a vertical trench from the first surface into the semiconductor body, forming a field dielectric layer at least on a side wall and a bottom wall of the vertical trench, depositing a conductive layer on the field dielectric layer, forming a closed cavity on the conductive layer in the vertical trench, and forming an insulated gate electrode on the closed cavity in the vertical trench.

Abstract: A SIC transistor device includes a silicon-carbide semiconductor substrate having a plurality of first doped regions laterally spaced apart from one another and beneath a main surface of the substrate, a second doped region extending from the main surface to a third doped region that is above the first doped regions, and a plurality of fourth doped regions in the substrate extending from the main surface to the first doped regions. The second doped region has a first conductivity type. The first, third and fourth doped regions have a second conductivity type opposite the first conductivity type. A gate trench extends through the second and third doped regions. The gate trench has sidewalls, a bottom and rounded corners between the bottom and the sidewalls.

Abstract: An embodiment of a semiconductor device includes a transistor cell array having transistor cells in a semiconductor body. A planar gate structure is on the semiconductor body at a first side. Field electrode trenches extend into the semiconductor body from the first side. Each of the field electrode trenches includes a field electrode structure. A depth d of the field electrode trenches is greater than a maximum lateral dimension wmax of the field electrode trenches at the first side.

Abstract: A semiconductor device includes compensation structures that extend from a first surface into a semiconductor portion. Sections of the semiconductor portion between neighboring ones of the compensation structures form semiconductor mesas. A field dielectric separating a field electrode in the compensation structures from the semiconductor portion includes a thermally grown portion, which directly adjoins the semiconductor portion. A not fully densified deposited portion of the field dielectric has a lower density than the thermally grown portion.

Abstract: A semiconductor device includes a body region arranged between source and drift regions in a semiconductor body. A gate trench extends from a first surface of the semiconductor body, through the source and body regions and into the drift region. A diode region extends under the gate trench, and a pn junction is between the diode region and the drift region below the gate trench. A gate electrode arranged in the gate trench is dielectrically insulated from the source, body, diode and drift regions by a gate dielectric. A further trench spaced apart from the gate trench extends from the first surface of the semiconductor body, through the source and diode regions and into the drift region. A source electrode arranged in the further trench adjoins the drift region in the further trench to form a Schottky contact with the drift region.

Abstract: A method of manufacturing a semiconductor device includes: forming a trench extending into a semiconductor substrate and a polysilicon gate electrode in the trench; forming a body region of a first conductivity type in the substrate adjacent the trench and a source region of a second conductivity type adjacent the body region and the trench; forming a dielectric layer on the substrate; forming a gate metallization on the dielectric layer which covers part of the substrate and a source metallization on the dielectric layer which is electrically connected to the source region, spaced apart from the gate metallization and covering a different part of the substrate than the gate metallization; and forming a metal-filled groove in the polysilicon gate electrode which is electrically connected to the gate metallization. The metal-filled groove extends along a length of the trench underneath at least part of the source metallization.

Abstract: A transistor cell includes a drift region, a source region, and a body region arranged between the source region and the drift region in a semiconductor body. A drain region is below the drift region. An insulated gate trench extends into the drift region. A diode region extends deeper into the drift region than the insulated gate trench and partly under the insulated gate trench so as to form a pn junction with the drift region below a bottom of the insulated gate trench. The body region adjoins a first sidewall of the insulated gate trench and the diode region adjoins a second sidewall of the insulated gate trench opposite the first sidewall so that the body region of the transistor cell and a channel region including a region of the body region extending along the first sidewall are separated from the diode region by the insulated gate trench.

Abstract: A semiconductor device includes a semiconductor body and a device cell in the semiconductor body. The device cell includes: drift, source, body and diode regions; a pn junction between the diode and drift regions; a trench with first and second opposing sidewalls and a bottom, the body region adjoining the first sidewall, the diode region adjoining the second sidewall, and the pn junction adjoining the trench bottom; a gate electrode in the trench and dielectrically insulated from the source, body, diode and drift regions by a gate dielectric; a further trench extending from a first surface of the semiconductor body into the semiconductor body; a source electrode arranged in the further trench adjoining the source and diode regions. The diode region includes a lower diode region arranged below the trench bottom. The lower diode region has a maximum of a doping concentration distant to the trench bottom.

Abstract: A semiconductor device includes trench gate structures extending from a first surface into a semiconductor body from a wide-bandgap semiconductor material. The trench gate structures separate mesa portions of the semiconductor body from each other. In the mesa portions, body regions form first pn junctions with a drain structure and directly adjoin first mesa sidewalls. Source regions in the mesa portions form second pn junctions with the body regions, wherein the body regions separate the source regions from the drain structure. The source regions directly adjoin the first mesa sidewalls and second mesa sidewalls opposite to the first mesa sidewalls.

Abstract: A semiconductor device includes an array of needle-shaped trenches extending into a semiconductor substrate. The semiconductor device further includes a gate trench grid extending into the semiconductor substrate. A gate electrode of a transistor structure is located within the gate trench grid. A gate wiring structure of the transistor structure is connected to the gate electrode of the transistor structure. A field electrode located within at least one needle-shaped trench of the array of needle-shaped trenches is connected to the gate wiring structure of the transistor structure.

Abstract: A semiconductor device includes first and second load contacts and a semiconductor region extending along an extension direction. A surface region is arranged above and coupled to the semiconductor region. At least one control electrode is arranged within the surface region. At least one connector trench extends into the semiconductor region along the extension direction and includes a connector electrode. A contact pad is arranged within the surface region. A contact runner is arranged within the surface region and placed separately from both the contact pad and the at least one control electrode, the contact pad, the contact runner and the at least one control electrode being electrically coupled to each other. Either both the contact pad and the contact runner or both the contact runner and the at least one control electrode are electrically connected to the connector electrode of the at least one connector trench.

Abstract: A transistor cell includes, in a semiconductor body, a drift region of a first doping type, a source region of the first doping type, a body region of a second doping type, and a drain region of the first doping type. The body region is arranged between the source and drift regions. The drift region is arranged between the body and drain regions. A gate electrode is adjacent the body region and dielectrically insulated from the body region by a gate dielectric, and a field electrode is dielectrically insulated from the drift region by a field electrode dielectric. The drift region includes an avalanche region having a higher doping concentration than sections of the drift region adjacent the avalanche region and which is spaced apart from the field electrode dielectric in a direction perpendicular to the current flow direction. The field electrode is arranged in a needle-shaped trench.

Abstract: A semiconductor device includes a pair of stripe-shaped gate structures formed lengthwise in parallel in a first surface of a semiconductor body and extending into the semiconductor body, each stripe-shaped gate structure including a gate electrode and a gate dielectric separating the gate electrode from the semiconductor body. The semiconductor device further includes a plurality of field electrode structures formed in the semiconductor body between the pair of stripe-shaped gate structures, a body zone of a second conductivity type formed in the semiconductor body and extending between the pair of stripe-shaped gate structures, and a source zone of a first conductivity type opposite the second conductivity type formed in the body zone. Each field electrode structure includes a spicular or needle-shaped field electrode and a field dielectric adjacent the field electrode. Each spicular or needle-shaped field electrode has a diameter of at most 500 nm.

Abstract: A method of manufacturing a semiconductor device includes: forming field electrode structures extending in a direction vertical to a first surface in a semiconductor body; forming cell mesas from portions of the semiconductor body between the field electrode structures, including body zones forming first pn junctions with a drift zone; forming gate structures between the field electrode structures and configured to control a current flow through the body zones; and forming auxiliary diode structures with a forward voltage lower than the first pn junctions and electrically connected in parallel with the first pn junctions, wherein semiconducting portions of the auxiliary diode structures are formed in the cell mesas.

Abstract: A semiconductor device includes a field electrode structure with a field electrode and a field dielectric surrounding the field electrode. A semiconductor body includes a transistor section surrounding the field electrode structure and including a source zone, a first drift zone section and a body zone separating the source zone and the first drift zone section. The body zone forms a first pn junction with the source zone and a second pn junction with the first drift zone section. A gate structure surrounds the field electrode structure and includes a gate electrode and a gate dielectric separating the gate electrode and the body zone. A contact structure directly adjoins the source and body zones and surrounds the field electrode structure equably with respect to the field electrode structure.

Abstract: A semiconductor device includes a drift region extending from a first surface into a semiconductor portion. A body region between two portions of the drift region forms a first pn junction with the drift region. A source region forms a second pn junction with the body region. The pn junctions include sections perpendicular to the first surface. Gate structures extend into the body regions and include a gate electrode. Field plate structures extend into the drift region and include a field electrode separated from the gate electrode. A gate shielding structure is configured to reduce a capacitive coupling between the gate structures and a backplate electrode directly adjoining a second surface.

Abstract: A semiconductor device includes a semiconductor substrate, a body region of a first conductivity type in the substrate, a source region of a second conductivity type adjacent the body region, and a trench extending into the substrate. The trench contains a polysilicon gate electrode insulated from the substrate. The device further includes a dielectric layer on the substrate, a gate metallization on the dielectric layer and covering part of the substrate and a source metallization on the dielectric layer and electrically connected to the source region. The gate metallization includes two spaced apart fingers. The source metallization is spaced apart from the gate metallization and covers a different part of the substrate than the gate metallization. A metal-filled groove in the polysilicon gate electrode is electrically connected to the two spaced apart fingers, and extends along a length of the trench directly underneath at least part of the source metallization.

Abstract: A semiconductor device includes transistor cells in a semiconductor portion, wherein the transistor cells are electrically connected to a gate metallization, a source electrode and a drain electrode. In one example, the semiconductor device further includes a doped region in the semiconductor portion. The doped region is electrically connected to the source electrode. A resistance of the doped region has a negative temperature coefficient. An interlayer dielectric separates the gate metallization from the doped region. A drain structure in the semiconductor portion electrically connects the transistor cells with the drain electrode and forms a pn junction with the doped region.