Abstract: A method and system to allow power fail-safe write-back or write-through caching of data in a persistent storage device into one or more cache lines of a caching device. No metadata associated with any of the cache lines is written atomically into the caching device when the data in the storage device is cached. As such, specialized cache hardware to allow atomic writing of metadata during the caching of data is not required.

Abstract: In an embodiment, a command that specifies a logical block to trim in a storage device is acquired. An entry in a logical-to-physical address (L2P) table that contains a physical address that corresponds to the logical block may be set to point to an invalid address. A trim token that specifies the logical block may be generated. The trim token may be stored in a non-volatile storage contained in the storage device.

Abstract: A mass storage system employs a paging table for memory page redirection and maintains the paging table for power loss recovery (PLR) using a FIFO queue of paging table (L2P) segments to be written to non-volatile memory. The FIFO queue identifies a sequence of the L2P segments in conjunction with sequence number and marking data of the affected segments for recreating the paging table. Upon power failure, a power loss recovery (PLR) mechanism scans for the last segment written based on the FIFO queue. The PLR process recovers unwritten paging table entries by replaying the corresponding changes in the order defined by the sequence numbers. The recovery process continues for each sequence number in the current context, until the L2P information in the paging table is recreated to the point just prior to power loss.

Abstract: A memory storage system that includes at least a storage controller, a first non-volatile, solid-state memory and a second non-volatile, solid-state memory. The storage controller has an interface to receive commands from a host system. The first non-volatile, solid-state memory device is coupled with the storage controller to at least store data received from the host system. The second non-volatile, solid-state memory is coupled with the storage controller to store context information corresponding to the data stored in the first non-volatile, solid-state memory device.

Abstract: A non-volatile memory, such as a NAND memory, may be encrypted by reading source blocks, writing to destination blocks, and then erasing the source blocks. As part of the encryption sequence, a power fail recovery procedure, using sequence numbers, is used to reestablish a logical-to-physical translation table for the destination blocks.

Abstract: Embodiments of methods to securely bind a disk cache encryption key to a cache device are generally described herein. Other embodiments may be described and claimed.

Abstract: A method is provided for reducing the number of writes in a non-volatile memory (122). The method involves writing data in the non-volatile memory and determining a set of data from the data in the non-volatile memory to be written to a removable memory (126) that is operatively coupled to the non-volatile memory (e.g., a NAND memory). The method also involves writing the set of data to the removable memory (e.g., a hard disk) from the non-volatile memory. The method further involves writing a delineation marker (e.g., a sequence number) to the non-volatile memory specifying that the set of data has been written to the removable memory. Notably, the metadata of the data in the non-volatile memory comprises at least one marker set as a specific marker type (e.g., a valid marker and a dirty marker).

Abstract: A volatile or nonvolatile cache memory can cache mass storage device read data and write data. The cache memory may become inaccessible, and I/O operations may go directly to the mass storage device, bypassing the cache memory. A log of write operations may be maintained to update the cache memory when it becomes available.

Abstract: Embodiments of methods to securely bind a disk cache encryption key to a cache device are generally described herein. Other embodiments may be described and claimed.

Abstract: Techniques to recover data from an indirected non-volatile memory system after unexpected power failure, as, e.g., NAND memory in electronic devices are disclosed.

Abstract: A method and system to allow power fail-safe write-back or write-through caching of data in a persistent storage device into one or more cache lines of a caching device. No metadata associated with any of the cache lines is written atomically into the caching device when the data in the storage device is cached. As such, specialized cache hardware to allow atomic writing of metadata during the caching of data is not required.

Abstract: A method is provided. The method includes receiving data and classifying received data in one of several tiers of data. The method also includes storing each tier of data on a different non-volatile memory device.

Abstract: An anti-malware approach uses a storage drive with the capability to lock selected memory areas. Platform assets such as OS objects are stored in the locked areas and thus, unauthorized changes to them may not be made by an anti-malware entity.

Abstract: A method and system to allow power fail-safe write-back or write-through caching of data in a persistent storage device into one or more cache lines of a caching device. No metadata associated with any of the cache lines is written atomically into the caching device when the data in the storage device is cached. As such, specialized cache hardware to allow atomic writing of metadata during the caching of data is not required.

Abstract: Incrementing sequence numbers in the metadata of non-volatile memory is used in the event of a resume from power fail to determine which data in the memory is current and valid, and which data is not. To reduce the amount of metadata space consumed by these sequence numbers, the numbers are permitted to be small enough to wrap around when the maximum value is reached. Two different techniques are disclosed to keep this wrap around condition from causing ambiguity in the relative values of the sequence numbers.

Abstract: A method and system to perform caching based at least on one or more file-level heuristics. The caching of a storage medium in a caching device is performed by a cache policy engine. The cache policy engine receives file-level information of input/output access of data of the storage medium and caches or evicts the data of the storage medium in the caching device based on the received file-level information. By utilizing information about the files and file operations associated with the disk sectors or logical block addresses of the storage medium, the cache policy engine can make a better decision on the data selection of the storage medium to be cached in or evicted from the caching device in one embodiment of the invention. Higher cache hit rates can be achieved and the performance of the system utilizing the cache policy engine is improved.

Abstract: A volatile or nonvolatile cache memory can cache mass storage device read data and write data. The cache memory may become inaccessible, and I/O operations may go directly to the mass storage device, bypassing the cache memory. A log of write operations may be maintained to update the cache memory when it becomes available.

Abstract: Techniques to recover data from an indirected non-volatile memory system after unexpected power failure, as, e.g., NAND memory in electronic devices are disclosed.

Abstract: Disclosed is a method for reducing number of writes in a write-back non-volatile cache memory. The method comprises: writing a plurality of data in the cache memory, wherein cache lines meta data for each of the plurality of data is marked as dirty; determining a set of data of the plurality of the data in the cache memory to be flushed to a hard disk, wherein the hard disk is operatively coupled to the cache memory; flushing the set of data of the plurality of data to the hard disk from the cache memory; and writing a clean-marker to the cache memory specifying which of the plurality of the data has been flushed to the disk.

Abstract: A volatile or nonvolatile cache memory can cache mass storage device read data and write data. The cache memory may become inaccessible, and I/O operations may go directly to the mass storage device, bypassing the cache memory. A log of write operations may be maintained to update the cache memory when it becomes available.