Patents by Inventor Satoshi Sakai

Satoshi Sakai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6855642
    Abstract: A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of an oxide film and uniformity in thickness of the oxide film.
    Type: Grant
    Filed: April 28, 2003
    Date of Patent: February 15, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Yoshikazu Tanabe, Satoshi Sakai, Nobuyoshi Natsuaki
  • Publication number: 20050020018
    Abstract: A method of manufacturing a semiconductor integrated circuit device comprising forming a silicon oxide film as thin as 5 nm or less on the surfaces of p type wells and n type wells by wet oxidizing a substrate, heating the substrate in an atmosphere containing about 5% of an NO gas to introduce nitrogen into the silicon oxide film so as to form a silicon oxynitride film, exposing the substrate to a nitrogen plasma atmosphere to further introduce nitrogen into the silicon oxynitride film in order to form a silicon oxynitride gate insulating film having a first peak concentration near the interface with the substrate and a second peak concentration near the surface thereof. Thereby, the concentration of nitrogen in the gate insulating film is increased without raising the concentration of nitrogen near the interface between the substrate and the gate insulating film to a higher level than required.
    Type: Application
    Filed: August 13, 2004
    Publication date: January 27, 2005
    Inventors: Dai Ishikawa, Satoshi Sakai, Atsushi Hiraiwa
  • Publication number: 20040267694
    Abstract: Disclosed is a machine-readable medium for programming a computer that is a component of a computer network. The machine-readable medium includes a processor executable instruction for enabling a user to access over the computer network a dynamic web page with hierarchically arranged data representing information corresponding to the status of real world objects.
    Type: Application
    Filed: June 30, 2003
    Publication date: December 30, 2004
    Inventors: Satoshi Sakai, Kalev Kask
  • Publication number: 20040259306
    Abstract: Mutual diffusion of impurities in a gate electrode is suppressed near a boundary between an n-channel type MISFET and a p-channel type MISFET, which adopt a polycide's dual-gate structure. Since a gate electrode of an n-channel type MISFET and a gate electrode of a p-channel type MISFET are of mutually different conductivity types, they are separated to prevent the mutual diffusion of the impurities and are electrically connected to each other via a metallic wiring formed in the following steps. In a step before a gate electrode material is patterned to separate the gate electrodes, the mutual diffusion of the impurities before forming the gate electrodes is prevented by performing no heat treatment at a temperature of 700° C. or higher.
    Type: Application
    Filed: May 28, 2004
    Publication date: December 23, 2004
    Applicant: Renesas Technology Corp.
    Inventors: Satoshi Sakai, Daichi Matsumoto, Katsuyuki Asaka, Masatoshi Hasegawa, Kazutaka Mori
  • Publication number: 20040234309
    Abstract: After passing a position of transfer to a printing medium 10, a portion of an intermediate transfer member 1 on which an image is previously formed reaches the position of a cleaning unit 2. The cleaning unit 2 removes residual toner, whereby the intermediate transfer member 1 prepares for a next cycle of formation of images in the corresponding colors by means of the developing units 4, 5, 6, and 7. The cleaning unit 2 includes an application friction roller 21 and a bias roller 24. The application friction roller 21 has a function to weaken cohesion/firm adhesion of residual toner through application of a cleaning liquid to the intermediate transfer member 1 and a function to exfoliate and disperse the residual toner in the cleaning liquid through imposition of a shear force on the residual toner. The bias roller 24 includes a bias voltage generation mechanism 24a for applying a bias voltage between the bias roller 24 and the intermediate transfer member 1.
    Type: Application
    Filed: December 22, 2003
    Publication date: November 25, 2004
    Inventors: Isao Nagata, Satoshi Sakai, Hironaga Hongawa, Shigeharu Okano, Eri Yamanishi, Norihiro Yamasaku
  • Patent number: 6821854
    Abstract: A protection film is formed on a silicon oxide film 6 formed on the surface of a semiconductor substrate, a silicon oxide film is removed from a region where a thin gate-insulating film is to be formed by using, as a mask, a photoresist pattern that covers a region where a thick gate-insulating film is to be formed, and, then, the photoresist pattern is removed followed by washing. Then, the semiconductor substrate is heat-oxidized or a film is deposited thereon to form gate-insulating films having different thicknesses.
    Type: Grant
    Filed: August 5, 2002
    Date of Patent: November 23, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Takayuki Kanda, Atsushi Hiraiwa, Norio Suzuki, Satoshi Sakai, Shuji Ikeda, Yasuko Yoshida, Shinichi Horibe
  • Patent number: 6794257
    Abstract: A method of manufacturing a semiconductor integrated circuit device includes steps of forming a silicon oxide film as thin as 5 nm or less on the surfaces of p-type wells and n-type wells by wet oxidizing a substrate, heating the substrate in an atmosphere containing about 5% of an NO gas to introduce nitrogen into the silicon oxide film to form a silicon oxynitride film, and exposing the substrate to a nitrogen plasma atmosphere to further introduce nitrogen into the silicon oxynitride film to form a silcon oxynitride gate insulating film having a first peak concentration near the interface with the substrate and a second peak concentration near the surface thereof. Thereby, the concentration of nitrogen in the gate insulating film is increased without raising the concentration of nitrogen near the interface between the substrate and the gate insulating film to a higher level than required.
    Type: Grant
    Filed: June 20, 2003
    Date of Patent: September 21, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Dai Ishikawa, Satoshi Sakai, Atsushi Hiraiwa
  • Patent number: 6785501
    Abstract: In the present invention, a toner image produced through a development process of supplying a liquid toner onto an image bearing body bearing an electrostatic latent image is transferred from the image bearing body onto an intermediate transfer body and then transferred from the intermediate transfer body onto a printing medium by use of a backup roller in a transfer-and-fixation zone. The printing medium is preheated to a temperature required for transfer and fixation before the printing medium reaches the transfer-and-fixation zone. No heating means is provided in the transfer-and-fixation zone, and the intermediate transfer body and the backup roller are pressed against each other at a high pressure ranging from 10 kg/cm2 to 60 kg/cm2.
    Type: Grant
    Filed: February 19, 2003
    Date of Patent: August 31, 2004
    Assignee: PFU Limited
    Inventors: Hironaga Hongawa, Satoshi Sakai, Eri Yamanishi, Isao Nagata, Shigeharu Okano, Yutaka Nakashima, Tadashi Nishikawa, Akihiko Inamoto, Satoshi Miyamoto
  • Patent number: 6780940
    Abstract: The present invention relates to an adhesive resin composition comprising a heat-generating material (A) which generates heat when subjected to high frequency induction and a thermoplastic resin (B) modified with a monomer having a functional group which reacts with an inorganic, the thermoplastic resin (B) having a melting point ranging from 90° C. to 200° C. The present invention also relates to a method for separating a bonded article into adherends, the method comprising detaching by induction heating the bonded portions of adherends bonded together by the thermoplastic resin composition comprising a heat-generating material (A) which generates heat when subjected to high frequency induction and a thermoplastic resin (B) modified with a monomer having a functional group which reacts with an inorganic substance and has a melting point ranging from 90° C. to 200° C.
    Type: Grant
    Filed: September 25, 2001
    Date of Patent: August 24, 2004
    Assignee: Toyo Boseki Kabushiki Kaisha
    Inventors: Nori Yoshihara, Kenji Ohama, Satoshi Sakai, Hitoshi Kosugi, Koji Nakanishi
  • Publication number: 20040161945
    Abstract: A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of an oxide film and uniformity in thickness of the oxide film.
    Type: Application
    Filed: February 10, 2004
    Publication date: August 19, 2004
    Inventors: Yoshikazu Tanabe, Satoshi Sakai, Nobuyoshi Natsuaki
  • Publication number: 20040157467
    Abstract: A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of an oxide film and uniformity in thickness of the oxide film.
    Type: Application
    Filed: February 10, 2004
    Publication date: August 12, 2004
    Inventors: Yoshikazu Tanabe, Satoshi Sakai, Nobuyoshi Natsuaki
  • Publication number: 20040157468
    Abstract: A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of an oxide film and uniformity in thickness of the oxide film.
    Type: Application
    Filed: February 10, 2004
    Publication date: August 12, 2004
    Inventors: Yoshikazu Tanabe, Satoshi Sakai, Nobuyoshi Natsuaki
  • Publication number: 20040147137
    Abstract: According to the present invention, an oxide film with the film quality almost equivalent to that of the thermal oxide can be formed by the low-temperature treatment. After removing an insulator on the active region of the substrate which constitutes a semiconductor wafer, an insulator made of, for example, silicon oxide is deposited on the main surface of the semiconductor wafer by the low pressure CVD method. This insulator is a film to form a gate insulator of MISFET in a later step. Subsequently, a plasma treatment is performed in an atmosphere containing oxygen (oxygen plasma treatment) to the insulator in the manner as schematically shown by the arrows. By so doing, the film quality of the insulator formed by the CVD method can be improved to the extent almost equivalent to that of the insulator formed of the thermal oxide.
    Type: Application
    Filed: October 30, 2003
    Publication date: July 29, 2004
    Applicant: Renesas Technology Corp.
    Inventors: Atsushi Hiraiwa, Satoshi Sakai, Dai Ishikawa, Yoshihiro Ikeda
  • Publication number: 20040106289
    Abstract: In a process of forming MISFETs that have gate insulating films that are mutually different in thickness on the same substrate, the formation of an undesirable natural oxide film at the interface between the semiconductor substrate and the gate insulating film is suppressed. A gate insulating film of MISFETs constituting an internal circuit is comprised of a silicon oxynitride film. Another gate insulating film of MISFETs constituting an I/O circuit is comprised of a laminated silicon oxynitride film and a high dielectric film. A process of forming the two types of gate insulating films on the substrate is continuously carried out in a treatment apparatus of a multi-chamber system. Accordingly, the substrate will not be exposed to air. Therefore, it is possible to suppress the inclusion of undesirable foreign matter and the formation of a natural oxide film at the interface between the substrate and the gate insulating films.
    Type: Application
    Filed: November 4, 2003
    Publication date: June 3, 2004
    Inventors: Ryoichi Furukawa, Satoshi Sakai, Satoshi Yamamoto
  • Patent number: 6745002
    Abstract: A liquid-development electrophotographic apparatus utilizes a nonvolatile, high-viscosity, high-concentration liquid toner as a liquid developer. A developing section is in contact with photosensitive drums 11-14, on which an electrostatic latent image is formed, so that the liquid developer is supplied onto photosensitive drums 11-14. Toner particles contained in the liquid developer adhere to the photosensitive drums 11-14 according to an electric field established between the developing section and the photosensitive drums 11-14 to form toner images. The toner images are transferred from the photosensitive drums 11-14 to an intermediate transfer section. A transfer-and-fixation section includes a heater to melt-transfer the toner images onto the printing medium. A development section is disposed at a lower portion of the apparatus to prevent smudging of the printing medium and the intermediate transfer section even when the liquid toner spills.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: June 1, 2004
    Assignee: PFU Limited
    Inventors: Yutaka Nakashima, Akihiko Inamoto, Shigeki Uesugi, Satoru Moto, Masanari Takabatake, Motoharu Ichida, Shigeharu Okano, Seiichi Takeda, Tadashi Nishikawa, Satoshi Miyamoto, Hitoshi Terashima, Satoshi Sakai, Hironaga Hongawa, Masanobu Hongo
  • Patent number: 6713353
    Abstract: A protection film is formed on a silicon oxide film 6 formed on the surface of a semiconductor substrate, a silicon oxide film is removed from a region where a thin gate-insulating film is to be formed by using, as a mask, a photoresist pattern that covers a region where a thick gate-insulating film is to be formed, and, then, the photoresist pattern is removed followed by washing. Then, the semiconductor substrate is heat-oxidized or a film is deposited thereon to form gate-insulating films having different thicknesses.
    Type: Grant
    Filed: March 28, 2000
    Date of Patent: March 30, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Takayuki Kanda, Atsushi Hiraiwa, Norio Suzuki, Satoshi Sakai, Shuji Ikeda, Yasuko Yoshida, Shinichi Horibe
  • Publication number: 20040047656
    Abstract: A liquid-development electrophotographic apparatus forms on a toner-image-bearing body a plurality of color images developed by a plurality of developing units, one for each color, that use liquid toner. One or more carrier-removing units for removing excessive carrier from a toner layer that forms a toner image are disposed downstream of each developing unit and upstream of the next developing unit disposed upstream of the former developing unit with respect to a process progress direction. Each carrier-removing unit includes two or more conductive collection rollers to which a bias voltage is applied in such a direction as to press toner against the toner-image-bearing body and which is brought into contact with the toner-image-bearing body. The upstream roller is rotated in the same direction as the direction of surface movement of the toner-image-bearing body, whereas the downstream roller is rotated in the opposite direction.
    Type: Application
    Filed: July 16, 2003
    Publication date: March 11, 2004
    Inventors: Satoshi Sakai, Isao Nagata, Hironaga Hongawa, Shigeharu Okano, Eri Yamanishi, Yutaka Nakashima, Akihiko Inamoto, Tadashi Nishikawa, Norihiro Yamasaku
  • Publication number: 20030235962
    Abstract: A method of manufacturing a semiconductor integrated circuit device comprising forming a silicon oxide film as thin as 5 nm or less on the surfaces of p type wells and n type wells by wet oxidizing a substrate, heating the substrate in an atmosphere containing about 5% of an NO gas to introduce nitrogen into the silicon oxide film so as to form a silicon oxynitride film, exposing the substrate to a nitrogen plasma atmosphere to further introduce nitrogen into the silicon oxynitride film in order to form a silicon oxynitride gate insulating film having a first peak concentration near the interface with the substrate and a second peak concentration near the surface thereof. Thereby, the concentration of nitrogen in the gate insulating film is increased without raising the concentration of nitrogen near the interface between the substrate and the gate insulating film to a higher level than required.
    Type: Application
    Filed: June 20, 2003
    Publication date: December 25, 2003
    Inventors: Dai Ishikawa, Satoshi Sakai, Atsushi Hiraiwa
  • Patent number: 6660597
    Abstract: In a process of forming MISFETs that have gate insulating films that are mutually different in thickness on the same substrate, the formation of an undesirable natural oxide film at the interface between the semiconductor substrate and the gate insulating film is suppressed. A gate insulating film of MISFETs constituting an internal circuit is comprised of a silicon oxynitride film. Another gate insulating film of MISFETs constituting an I/O circuit is comprised of a laminated silicon oxynitride film and a high dielectric film. A process of forming the two types of gate insulating films on the substrate is continuously carried out in a treatment apparatus of a multi-chamber system. Accordingly, the substrate will not be exposed to air. Therefore, it is possible to suppress the inclusion of undesirable foreign matter and the formation of a natural oxide film at the interface between the substrate and the gate insulating films.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: December 9, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Ryoichi Furukawa, Satoshi Sakai, Satoshi Yamamoto
  • Publication number: 20030219995
    Abstract: A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of an oxide film and uniformity in thickness of the oxide film
    Type: Application
    Filed: April 28, 2003
    Publication date: November 27, 2003
    Inventors: Yoshikazu Tanabe, Satoshi Sakai, Nobuyoshi Natsuaki