Patents by Inventor Satoshi Sakai

Satoshi Sakai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070158599
    Abstract: The objectives of the present invention are to prevent or inhibit the deterioration of optical systems that determine the longevity of an optical apparatus which delivers effects such as light transmission, diffraction, reflection, spectrum generation, and interference, and these combinations, and by so doing, decrease the frequency of maintenance operations such as window replacement and to reduce the costs for such operations. This invention is characterized by steps of creating a near vacuum zone with a presence of active energy to excite an oxidation reaction of carbon wherein the near vacuum zone faces the lighting surfaces of the optical system; generating negative ions or radicals in the near vacuum zone such as unstable chemical seeds containing oxygen atoms, such as OH radicals, OH ions, ozone, O2-ions, O-radicals; and removing or reducing the accumulated carbon which deposits on the lighting surface, by reacting the deposited carbon with the negative ions or radicals.
    Type: Application
    Filed: March 6, 2007
    Publication date: July 12, 2007
    Inventors: Satoshi Sakai, Shigenori Tsuruga, Hideo Yamakoshi, Shizuma Kuribayashi, Minoru Danno, Hiroshi Futami, Noriko Yamazaki
  • Publication number: 20070158600
    Abstract: The objectives of the present invention are to prevent or inhibit the deterioration of optical systems that determine the longevity of an optical apparatus which delivers effects such as light transmission, diffraction, reflection, spectrum generation, and interference, and these combinations, and by so doing, decrease the frequency of maintenance operations such as window replacement and to reduce the costs for such operations. This invention is characterized by steps of creating a near vacuum zone with a presence of active energy to excite an oxidation reaction of carbon wherein the near vacuum zone faces the lighting surfaces of the optical system; generating negative ions or radicals in the near vacuum zone such as unstable chemical seeds containing oxygen atoms, such as OH radicals, OH.ions, ozone, O2.ions, O-radicals; and removing or reducing the accumulated carbon which deposits on the lighting surface, by reacting the deposited carbon with the negative ions or radicals.
    Type: Application
    Filed: March 6, 2007
    Publication date: July 12, 2007
    Inventors: Satoshi SAKAI, Shigenori Tsuruga, Hideo Yamakoshi, Shizuma Kuribayashi, Minoru Danno, Hiroshi Futami, Noriko Yamazaki
  • Publication number: 20070158598
    Abstract: The objectives of the present invention are to prevent or inhibit the deterioration of optical systems that determine the longevity of an optical apparatus which delivers effects such as light transmission, diffraction, reflection, spectrum generation, and interference, and these combinations, and by so doing, decrease the frequency of maintenance operations such as window replacement and to reduce the costs for such operations. This invention is characterized by steps of creating a near vacuum zone with a presence of active energy to excite an oxidation reaction of carbon wherein the near vacuum zone faces the lighting surfaces of the optical system; generating negative ions or radicals in the near vacuum zone such as unstable chemical seeds containing oxygen atoms, such as OH radicals, OH? ions, ozone, O2? ions, O-radicals; and removing or reducing the accumulated carbon which deposits on the lighting surface, by reacting the deposited carbon with the negative ions or radicals.
    Type: Application
    Filed: March 6, 2007
    Publication date: July 12, 2007
    Inventors: Satoshi Sakai, Shigenori Tsuruga, Hideo Yamakoshi, Shizuma Kuribayashi, Minoru Danno, Hiroshi Futami, Noriko Yamazaki
  • Publication number: 20070152172
    Abstract: The objectives of the present invention are to prevent or inhibit the deterioration of optical systems that determine the longevity of an optical apparatus which delivers effects such as light transmission, diffraction, reflection, spectrum generation, and interference, and these combinations, and by so doing, decrease the frequency of maintenance operations such as window replacement and to reduce the costs for such operations. This invention is characterized by steps of creating a near vacuum zone with a presence of active energy to excite an oxidation reaction of carbon wherein the near vacuum zone faces the lighting surfaces of the optical system; generating negative ions or radicals in the near vacuum zone such as unstable chemical seeds containing oxygen atoms, such as OH radicals, OH— ions, ozone, O2— ions, O-radicals; and removing or reducing the accumulated carbon which deposits on the lighting surface, by reacting the deposited carbon with the negative ions or radicals.
    Type: Application
    Filed: March 6, 2007
    Publication date: July 5, 2007
    Inventors: Satoshi Sakai, Shigenori Tsuruga, Hideo Yamakoshi, Shizuma Kuribayshi, Minoru Danno, Hiroshi Futami, Noriko Yamazaki
  • Patent number: 7217607
    Abstract: In a process of forming MISFETs that have gate insulating films that are mutually different in thickness on the same substrate, the formation of an undesirable natural oxide film at the interface between the semiconductor substrate and the gate insulating film is suppressed. A gate insulating film of MISFETs constituting an internal circuit is comprised of a silicon oxynitride film. Another gate insulating film of MISFETs constituting an I/O circuit is comprised of a laminated silicon oxynitride film and a high dielectric film. A process of forming the two types of gate insulating films on the substrate is continuously carried out in a treatment apparatus of a multi-chamber system. Accordingly, the substrate will not be exposed to air. Therefore, it is possible to suppress the inclusion of undesirable foreign matter and the formation of a natural oxide film at the interface between the substrate and the gate insulating films.
    Type: Grant
    Filed: October 20, 2004
    Date of Patent: May 15, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Ryoichi Furukawa, Satoshi Sakai, Satoshi Yamamoto
  • Patent number: 7211497
    Abstract: According to the present invention, an oxide film with the film quality almost equivalent to that of the thermal oxide can be formed by the low-temperature treatment. After removing an insulator on the active region of the substrate which constitutes a semiconductor wafer, an insulator made of, for example, silicon oxide is deposited on the main surface of the semiconductor wafer by the low pressure CVD method. This insulator is a film to form a gate insulator of MISFET in a later step. Subsequently, a plasma treatment is performed in an atmosphere containing oxygen (oxygen plasma treatment) to the insulator in the manner as schematically shown by the arrows. By so doing, the film quality of the insulator formed by the CVD method can be improved to the extent almost equivalent to that of the insulator formed of the thermal oxide.
    Type: Grant
    Filed: October 30, 2003
    Date of Patent: May 1, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Atsushi Hiraiwa, Satoshi Sakai, Dai Ishikawa, Yoshihiro Ikeda
  • Patent number: 7190512
    Abstract: The objectives of the present invention are to prevent or inhibit the deterioration of optical systems that determine the longevity of an optical apparatus which delivers effects such as light transmission, diffraction, reflection, spectrum generation, and interference, and these combinations, and by so doing, decrease the frequency of maintenance operations such as window replacement and to reduce the costs for such operations. This invention is characterized by steps of creating a near vacuum zone with a presence of active energy to excite an oxidation reaction of carbon wherein the near vacuum zone faces the lighting surfaces of the optical system; generating negative ions or radicals in the near vacuum zone such as unstable chemical seeds containing oxygen atoms, such as OH radicals, OH? ions, ozone, O2? ions, O-radicals; and removing or reducing the accumulated carbon which deposits on the lighting surface, by reacting the deposited carbon with the negative ions or radicals.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: March 13, 2007
    Assignee: Mitsubishi Heavy Industries, Ltd.
    Inventors: Satoshi Sakai, Shigenori Tsuruga, Hideo Yamakoshi, Shizuma Kuribayashi, Minoru Danno, Hiroshi Futami, Noriko Yamazaki
  • Publication number: 20070051156
    Abstract: A workpiece 20b is formed that includes a circular bottom portion 22b having a hole 23b and an inner wall portion 24b around the hole 23b, and a skirt-shaped outer wall portion 25b that includes prong portions 26b on the outer circumference of the bottom portion 22b and linking portions 27b that link these prong portions 26b, and by cutting off the linking portions 27b and the portion that includes the inner wall portion 24b from the formed workpiece, a pronged annular member that includes the circular bottom portion 22b that has a hole 23b and the prong portions 26b on the outer circumference of the bottom portion 22b.
    Type: Application
    Filed: August 30, 2006
    Publication date: March 8, 2007
    Applicant: Aisin AW Co., Ltd.
    Inventors: Takehiko Adachi, Satoshi Sakai, Masaki Nakajima, Hiromu Sakamaki, Ariyoshi Terao, Hideyuki Nagai, Yasuyuki Takasahara
  • Patent number: 7186604
    Abstract: After forming a silicon oxide film 9 on the surface of a region A of a semiconductor substrate 1, a high dielectric constant insulating film 10, a silicon film, a silicon oxide film 14 are successively deposited over the semiconductor substrate 1, and they are patterned to leave the silicon oxide film 14 in regions for forming gate electrodes. Then, after fabricating silicon films 13n and 13p by using the patterned silicon oxide film 14 as a mask, when removing the silicon oxide film 14, etching is performed under the condition where the etching selectivity of the silicon oxide film 14 to the high dielectric constant insulating film 10 becomes large, thereby leaving the high dielectric constant insulating film 10 also to portions below the end of the gate electrodes (13n, 13p). Thus, it is possible to ensure the voltage withstanding thereof and improve the characteristics of MISFET.
    Type: Grant
    Filed: August 15, 2002
    Date of Patent: March 6, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Satoshi Sakai, Satoshi Yamamoto, Atsushi Hiraiwa, Ryoichi Furukawa
  • Patent number: 7158853
    Abstract: Analysis is performed on sheet metal products to determine characteristics (or feature vectors) of the sheet metal products. Multiple feature vectors can be obtained for each sheet metal product. Exemplary analyses include a first order moment and a second order moment. The characteristics can be compared with characteristics of other sheet metal part shapes to determine how similar the shapes are.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: January 2, 2007
    Assignee: Amada Company, Limited
    Inventors: Satoshi Sakai, Masanobu Ishii
  • Publication number: 20060275991
    Abstract: A method of manufacturing a semiconductor integrated circuit device comprising forming a silicon oxide film as thin as 5 nm or less on the surfaces of p type wells and n type wells by wet oxidizing a substrate, heating the substrate in an atmosphere containing about 5% of an NO gas to introduce nitrogen into the silicon oxide film so as to form a silicon oxynitride film, exposing the substrate to a nitrogen plasma atmosphere to further introduce nitrogen into the silicon oxynitride film in order to form a silicon oxynitride gate insulating film having a first peak concentration near the interface with the substrate and a second peak concentration near the surface thereof. Thereby, the concentration of nitrogen in the gate insulating film is increased without raising the concentration of nitrogen near the interface between the substrate and the gate insulating film to a higher level than required.
    Type: Application
    Filed: August 17, 2006
    Publication date: December 7, 2006
    Inventors: Dai Ishikawa, Satoshi Sakai, Atsushi Hiraiwa
  • Publication number: 20060275969
    Abstract: Mutual diffusion of impurities in a gate electrode is suppressed near a boundary between an n-channel type MISFET and a p-channel type MISFET, which adopt a polycide's dual-gate structure. Since a gate electrode of an n-channel type MISFET and a gate electrode of a p-channel type MISFET are of mutually different conductivity types, they are separated to prevent the mutual diffusion of the impurities and are electrically connected to each other via a metallic wiring formed in the following steps. In a step before a gate electrode material is patterned to separate the gate electrodes, the mutual diffusion of the impurities before forming the gate electrodes is prevented by performing no heat treatment at a temperature of 700° C. or higher.
    Type: Application
    Filed: August 14, 2006
    Publication date: December 7, 2006
    Inventors: Satoshi Sakai, Daichi Matsumoto, Katsuyuki Asaka, Masatoshi Hasegawa, Kazutaka Mori
  • Patent number: 7109076
    Abstract: Mutual diffusion of impurities in a gate electrode is suppressed near a boundary between an n-channel type MISFET and a p-channel type MISFET, which adopt a polycide's dual-gate structure. Since a gate electrode of an n-channel type MISFET and a gate electrode of a p-channel type MISFET are of mutually different conductivity types, they are separated to prevent the mutual diffusion of the impurities and are electrically connected to each other via a metallic wiring formed in the following steps. In a step before a gate electrode material is patterned to separate the gate electrodes, the mutual diffusion of the impurities before forming the gate electrodes is prevented by performing no heat treatment at a temperature of 700° C. or higher.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: September 19, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Satoshi Sakai, Daichi Matsumoto, Katsuyuki Asaka, Masatoshi Hasegawa, Kazutaka Mori
  • Patent number: 7105394
    Abstract: A method of manufacturing a semiconductor device having an n-type FET and p-type FET, each formed over a semiconductor substrate, calls for (a) forming, over the n-type FET and p-type FET, a first insulating film, for generating a tensile stress in the channel formation region of the n-type FET, to cover gate electrodes of the FETs, while covering, with an insulating film, a semiconductor region between the gate electrode of the p-type FET and an element isolation region of the semiconductor substrate; (b) selectively removing the first insulating film from the upper surface of the p-type FET by etching; (c) forming, over the n-type and p-type FETs, a second insulating film, for generating a compressive stress in the channel formation region of the p-type FET, to cover gate electrodes of the FETs; and (d) selectively removing the second insulating film from the upper surface of the n-type FET.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: September 12, 2006
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., LTD
    Inventors: Kiyota Hachimine, Akihiro Shimizu, Nagatoshi Ooki, Satoshi Sakai, Naoki Yamamoto
  • Publication number: 20060137735
    Abstract: A light scattering film having the structure which guides electrical signal to a desired position and scatters incident light and the surface of which is substantially flat, and a photoelectric device using the same. The light scattering film includes a medium made of transparent conductive material and a light scatterer embedded in the medium. The light scattering film realizes conductivity and the light-scattering characteristic by single component. It is not necessary to make the texture of a surface with concavity and convexity deliberately to achieve the light-scattering characteristic. Desirably, the surface is substantially flat. When a semiconductor layer is formed on the surface, the defects are suppressed because of the flatness of the surface. The photoelectric device having the light scattering film and the semiconductor device on the surface of the film can achieve high photoelectric conversion efficiency.
    Type: Application
    Filed: December 8, 2005
    Publication date: June 29, 2006
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Yasuyuki Kobayashi, Satoshi Sakai, Koji Satake
  • Publication number: 20060121740
    Abstract: After forming a silicon oxide film 9 on the surface of a region A of a semiconductor substrate 1, a high dielectric constant insulating film 10, a silicon film, a silicon oxide film 14 are successively deposited over the semiconductor substrate 1, and they are patterned to leave the silicon oxide film 14 in regions for forming gate electrodes. Then, after fabricating silicon films 13n and 13p by using the patterned silicon oxide film 14 as a mask, when removing the silicon oxide film 14, etching is performed under the condition where the etching selectivity of the silicon oxide film 14 to the high dielectric constant insulating film 10 becomes large, thereby leaving the high dielectric constant insulating film 10 also to portions below the end of the gate electrodes (13n, 13p). Thus, it is possible to ensure the voltage withstanding thereof and improve the characteristics of MISFET.
    Type: Application
    Filed: August 15, 2002
    Publication date: June 8, 2006
    Inventors: Satoshi Sakai, Satoshi Yamamoto, Atsushi Hiraiwa, Ryoichi Furukawa
  • Patent number: 7053007
    Abstract: A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of an oxide film and uniformity in thickness of the oxide film.
    Type: Grant
    Filed: May 19, 2005
    Date of Patent: May 30, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Yoshikazu Tanabe, Satoshi Sakai, Nobuyoshi Natsuaki
  • Publication number: 20060106757
    Abstract: An apparatus and method is provided for managing and distributing design and manufacturing information throughout a factory in order to facilitate the production of components, such as bent sheet metal components. In accordance with an aspect of the present invention, the management and distribution of critical design and manufacturing information is achieved by storing and distributing the design and manufacturing information associated with each job. By replacing the traditional paper job set-up or work sheet with, for example, an electronically stored job sheet that can be accessed instantaneously from any location in the factory, the present invention improves the overall efficiency of the factory. In addition, through the various aspects and features of the invention, the organization and accessibility of part information and stored expert knowledge is improved.
    Type: Application
    Filed: November 15, 2004
    Publication date: May 18, 2006
    Applicant: Amada Company, Limited
    Inventors: Satoshi Sakai, Kensuke Hazama, Yoshie Hazama, Yeam-Tzuo Hwang
  • Publication number: 20060090790
    Abstract: A photoelectric conversion device is composed of a substrate, a lower electrode layer formed to cover the substrate, and a first semiconductor layer formed on the lower electrode. The lower electrode layer includes a first matrix formed of transparent conductive material, and light scattering granules embedded within the first matrix.
    Type: Application
    Filed: February 9, 2005
    Publication date: May 4, 2006
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Yasuyuki Kobayashi, Satoshi Sakai, Koji Satake
  • Publication number: 20060089738
    Abstract: Analysis is performed on sheet metal products to determine characteristics (or feature vectors) of the sheet metal products. Multiple feature vectors can be obtained for each sheet metal product. Exemplary analyses include a first order moment and a second order moment. The characteristics can be compared with characteristics of other sheet metal part shapes to determine how similar the shapes are.
    Type: Application
    Filed: October 25, 2004
    Publication date: April 27, 2006
    Applicant: Amada Company, Limited
    Inventors: Satoshi Sakai, Masanobu Ishii