Patents by Inventor Satoshi Sakai

Satoshi Sakai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090273037
    Abstract: After silicon oxide film (9) is formed on the surface of a semiconductor substrate (1), the silicon oxide film (9) in a region in which a gate insulation film having a small effective thickness is formed is removed using diluted HF and after that, high dielectric constant insulation film (10) is formed on the semiconductor substrate (1). Consequently, two kinds of gate insulation films, namely, a gate insulation film (12) comprised of stacked film of high dielectric constant insulation film (10) and silicon oxide film (9) and gate insulation film (11) comprised of the high dielectric constant insulation film (10) are formed on the semiconductor substrate (1).
    Type: Application
    Filed: June 18, 2009
    Publication date: November 5, 2009
    Inventors: Satoshi SAKAI, Atsushi HIRAIWA, Satoshi YAMAMOTO
  • Publication number: 20090208141
    Abstract: An image processor comprising a control unit, wherein the control unit includes an obtaining unit that obtains image data generated as a result of reading a document by a reader in which a predetermined document reading condition is set; a selecting unit that allows a user to select an intended use of the image data obtained by the obtaining unit out of a plurality of the intended uses set in advance; a processing unit that processes the image data obtained by the obtaining unit according to an image processing condition suitable for the intended use selected by the selecting unit; and a transferring unit that transfers the image data after being processed by the processing unit to an application suitable for the intended use selected by the selecting unit.
    Type: Application
    Filed: September 29, 2008
    Publication date: August 20, 2009
    Applicant: PFU LIMITED
    Inventors: Satoshi Kubo, Satoshi Sakai, Koichi Kitagawa, Yasunori Taniguchi, Takayuki Kawanaka, Kiyoto Kosaka
  • Publication number: 20090179781
    Abstract: A sheet or overlay has plasticity and covers a keyboard including a plurality of keys, provided with a standard key indication based on a given language environment. The sheet has regions facing the keys on the keyboard, and an optional key indication based on a language environment different from the given language environment is provided in the regions so as to be visible by an operator when the sheet covers the keyboard. If the operator's use language is different from a language of the standard key indication on the keyboard, the keyboard is covered by the sheet supporting the operator's use language. In this way, an electronic apparatus coupled to the keyboard is set to support the language environment of the operator.
    Type: Application
    Filed: October 9, 2008
    Publication date: July 16, 2009
    Applicant: PFU LIMITED
    Inventors: Satoshi SAKAI, Yoshiaki Fujimoto, Motoshi Shibuya, Akihisa Kozakura
  • Patent number: 7560772
    Abstract: After silicon oxide film (9) is formed on the surface of a semiconductor substrate (1), the silicon oxide film (9) in a region in which a gate insulation film having a small effective thickness is formed is removed using diluted HF and after that, high dielectric constant insulation film (10) is formed on the semiconductor substrate (1). Consequently, two kinds of gate insulation films, namely, a gate insulation film (12) comprised of stacked film of high dielectric constant insulation film (10) and silicon oxide film (9) and gate insulation film (11) comprised of the high dielectric constant insulation film (10) are formed on the semiconductor substrate (1).
    Type: Grant
    Filed: December 23, 2007
    Date of Patent: July 14, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Satoshi Sakai, Atsushi Hiraiwa, Satoshi Yamamoto
  • Patent number: 7544313
    Abstract: An electrically conductive resin composition of a polyamide type, characterized in that, (A) 95 to 40% by mass of polyamide resin, (B) 5 to 30% by mass of electrically conductive carbon black, (C) 10 to 40% by mass of an ethylene-?-olefin copolymer having a reactive functional group which is able to react with a terminal group of the polyamide resin and/or an amide group of the main chain and (D) 1 to 10% by mass of a high-density polyethylene resin are compounded; the polyamide resin (A) forms a continuous phase; the ethylene-?-olefin copolymer (C) in particles having an average particle diameter of not more than 2 ?m is present by being dispersed in the continuous phase of the polyamide resin (A); and not less than 80% by mass of the electrically conductive carbon black (B) is present by being dispersed in the polyamide resin phase (A) which is a continuous phase, as well as a cap for fuel tank comprising it.
    Type: Grant
    Filed: September 16, 2005
    Date of Patent: June 9, 2009
    Assignee: Toyo Boseki Kabushiki Kaisha
    Inventors: Akira Taniguchi, Satoshi Sakai, Hiroyuki Nakagawa, Kazuhisa Ishida, Kiyomitsu Terashima
  • Publication number: 20090130417
    Abstract: A thin-walled light resin composition engine cover has reduced mass and thickness while retaining radiated sound reduction effects, heat resistance, and mechanical properties. The cover has an average thickness of 2.0 mm or less. The resin composition includes (a) a polyamide resin composed of essentially at least one of scrap of vehicle airbag fabric made of nylon 66 containing a copper-based stabilizer and vehicle airbag fabric recycled, (b) a modified polypropylene resin, (c) a reinforcement material, (d) a metal deactivator and a photo-thermal stabilizer, and (e) a viscosity regulator. The resin composition has a melt flow rate of not less than 40 g/10 min.
    Type: Application
    Filed: November 14, 2008
    Publication date: May 21, 2009
    Applicants: TOYODA GOSEI CO., LTD., TOYO BOSEKI KABUSHIKI KAISHA
    Inventors: Itsuro Maeda, Kenji Shiga, Yasuto Fujii, Satoshi Sakai
  • Publication number: 20090027300
    Abstract: An electromagnetic screen (1) comprises a plurality of antennas (4) each of which reflects an electromagnetic wave having a specific frequency. The plurality of antennas (4) are arranged so as to constitute a pattern. Each of the antennas (4) has three segment-shaped first element parts (4a) and three segment-shaped second element parts (4b). The three first element parts (4a) radially extend from the center of the antenna (4) by substantially the same length such that any two of the three first element parts (4a) form an angle of 120° with each other. Each of the second element parts (4b) are connected to an outer edge of a corresponding one of the first element parts (4a).
    Type: Application
    Filed: February 15, 2006
    Publication date: January 29, 2009
    Applicant: MITSUBISHI CABLE INDUSTRIES, LTD.
    Inventors: Toshio Kudo, Kazuyuki Kashihara, Katsunori Hosotani, Satoshi Sakai
  • Patent number: 7453630
    Abstract: The objectives of the present invention are to prevent or inhibit the deterioration effects such as light transmission, diffraction, reflection, spectrum generation, and interference, and these combinations, and by so doing, decrease the frequency of maintenance operations such as window replacement and to reduce the costs for such operations. This invention is characterized by steps of creating a near vacuum zone with a presence of active energy to excite an oxidation reaction of carbon wherein the near vacuum zone faces the lighting surfaces of the optical system; generating negative ions or radicals in the near vacuum zone such as unstable chemical seeds containing oxygen atoms, such as OH radicals, OH ions, ozone, O2 ions, O-radicals; and removing or reducing the accumulated carbon which deposits on the lighting surface, by reacting the deposited carbon with the negative ions or radicals.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: November 18, 2008
    Assignee: Mitsubishi Heavy Industries, Ltd.
    Inventors: Satoshi Sakai, Shigenori Tsuruga, Hideo Yamakoshi, Shizuma Kuribayashi, Minoru Danno, Hiroshi Futami, Noriko Yamazaki
  • Patent number: 7440206
    Abstract: An optical properties restoration apparatus improves reliability and longevity of optical properties of an optical system, lying upon a vacuum boundary, by preventing, suppressing, or improving degradation of optical properties. The apparatus includes creating the near vacuum zone to excite an oxidation reaction of carbon, generating a flow of an oxygen atom-containing gas such as water gas or oxide gas in the near vacuum zone, and supplying active energy in the near vacuum zone to cause a carbon oxidation reaction between the oxygen atom-containing gas and the carbon. The near vacuum zone faces the lighting surfaces of the optical system and a lower limit value for a partial pressure of the gases containing oxygen atoms that is supplied to the near vacuum zone is set to a level over a speed of the carbon buildup that deposits on the lighting surfaces of the optical system.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: October 21, 2008
    Assignee: Mitsubishi Heavy Industries, Ltd.
    Inventors: Satoshi Sakai, Shigenori Tsuruga, Hideo Yamakoshi, Shizuma Kuribayashi, Minoru Danno, Hiroshi Futami, Noriko Yamazaki
  • Patent number: 7398129
    Abstract: Data for a 3D sheet metal part model is stored in a file. The stored data includes features of the part and manufacturing information. When different manufacturing processes are used, different geometry can be created. The file can store multiple processes for manufacturing the part and the geometry associated with each process. Thus, when manufacturing the part, the user can view information for multiple stored processes because all of the information is stored together. In addition, both 2D and 3D data is stored for the part.
    Type: Grant
    Filed: October 7, 2004
    Date of Patent: July 8, 2008
    Assignee: Amada Company, Limited
    Inventors: Masanobu Ishii, Satoshi Sakai, Thanapandi Periasamy
  • Publication number: 20080105923
    Abstract: After silicon oxide film (9) is formed on the surface of a semiconductor substrate (1), the silicon oxide film (9) in a region in which a gate insulation film having a small effective thickness is formed is removed using diluted HF and after that, high dielectric constant insulation film (10) is formed on the semiconductor substrate (1). Consequently, two kinds of gate insulation films, namely, a gate insulation film (12) comprised of stacked film of high dielectric constant insulation film (10) and silicon oxide film (9) and gate insulation film (11) comprised of the high dielectric constant insulation film (10) are formed on the semiconductor substrate (1).
    Type: Application
    Filed: December 23, 2007
    Publication date: May 8, 2008
    Inventors: Satoshi SAKAI, Atsushi Hiraiwa, Satoshi Yamamoto
  • Publication number: 20080073620
    Abstract: An electrically conductive resin composition of a polyamide type, characterized in that, (A) 95 to 40% by mass of polyamide resin, (B) 5 to 30% by mass of electrically conductive carbon black, (C) 10 to 40% by mass of an ethylene-?-olefin copolymer having a reactive functional group which is able to react with a terminal group of the polyamide resin and/or an amide group of the main chain and (D) 1 to 10% by mass of a high-density polyethylene resin are compounded; the polyamide resin (A) forms a continuous phase; the ethylene-?-olefin copolymer (C) in particles having an average particle diameter of not more than 2 ?m is present by being dispersed in the continuous phase of the polyamide resin (A); and not less than 80% by mass of the electrically conductive carbon black (B) is present by being dispersed in the polyamide resin phase (A) which is a continuous phase, as well as a cap for fuel tank comprising it.
    Type: Application
    Filed: September 16, 2005
    Publication date: March 27, 2008
    Inventors: Akira Taniguchi, Satoshi Sakai, Hiroyuki Nakagawa, Kazuhisa Ishida, Kiyomitsu Terashima
  • Patent number: 7335561
    Abstract: After silicon oxide film (9) is formed on the surface of a semiconductor substrate (1), the silicon oxide film (9) in a region in which a gate insulation film having a small effective thickness is formed is removed using diluted HF and after that, high dielectric constant insulation film (10) is formed on the semiconductor substrate (1). Consequently, two kinds of gate insulation films, namely, a gate insulation film (12) comprised of stacked film of high dielectric constant insulation film (10) and silicon oxide film (9) and gate insulation film (11) comprised of the high dielectric constant insulation film (10) are formed on the semiconductor substrate (1).
    Type: Grant
    Filed: November 30, 2001
    Date of Patent: February 26, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Satoshi Sakai, Atsushi Hiraiwa, Satoshi Yamamoto
  • Publication number: 20080045027
    Abstract: A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of oxide film and uniformity in thickness of the oxide film.
    Type: Application
    Filed: June 13, 2007
    Publication date: February 21, 2008
    Inventors: Yoshikazu Tanabe, Satoshi Sakai, Nobuyoshi Natsuaki
  • Publication number: 20070221269
    Abstract: The efficiency of a thin film Si solar battery is improved. Between a back face electrode and a transparent conductive film provided on a front face side of the back face electrode, a refractive index adjustment layer is interposed made from a material that has a lower refractive index than that of the transparent conductive film. For example when the transparent conductive film is GZO, SiO2 is interposed between the transparent conductive film and the back face electrode made from Ag. As a result light that penetrates into and is absorbed at the back face electrode is reduced, and the reflectivity of light at the back face electrode is improved.
    Type: Application
    Filed: October 24, 2006
    Publication date: September 27, 2007
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Satoshi Sakai, Yasuyuki Kobayashi, Saneyuki Goya, Youji Nakano
  • Patent number: 7266419
    Abstract: An apparatus prepares data for manufacturing a product or a part with a pre-determined shape by using a bending press provided with detachable tools. The apparatus includes a computer memory that stores bending order information for manufacturing the product or the part. The bending order information is obtained after successfully completing bending operations and is associated with the product or the part.
    Type: Grant
    Filed: November 15, 2004
    Date of Patent: September 4, 2007
    Assignee: Amada Company, Limited
    Inventors: Satoshi Sakai, Yoshie Hazama, legal representative, Yeam-Tzuo Hwang, Kensuke Hazama, deceased
  • Patent number: 7262101
    Abstract: A method of manufacturing a semiconductor integrated circuit device comprising forming a silicon oxide film as thin as 5 nm or less on the surfaces of p type wells and n type wells by wet oxidizing a substrate, heating the substrate in an atmosphere containing about 5% of an NO gas to introduce nitrogen into the silicon oxide film so as to form a silicon oxynitride film, exposing the substrate to a nitrogen plasma atmosphere to further introduce nitrogen into the silicon oxynitride film in order to form a silicon oxynitride gate insulating film having a first peak concentration near the interface with the substrate and a second peak concentration near the surface thereof. Thereby, the concentration of nitrogen in the gate insulating film is increased without raising the concentration of nitrogen near the interface between the substrate and the gate insulating film to a higher level than required.
    Type: Grant
    Filed: August 13, 2004
    Date of Patent: August 28, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Dai Ishikawa, Satoshi Sakai, Atsushi Hiraiwa
  • Publication number: 20070190744
    Abstract: According to the present invention, an oxide film with the film quality almost equivalent to that of the thermal oxide can be formed by the low-temperature treatment. After removing an insulator on the active region of the substrate which constitutes a semiconductor wafer, an insulator made of, for example, silicon oxide is deposited on the main surface of the semiconductor wafer by the low pressure CVD method. This insulator is a film to form a gate insulator of MISFET in a later step. Subsequently, a plasma treatment is performed in an atmosphere containing oxygen (oxygen plasma treatment) to the insulator in the manner as schematically shown by the arrows. By so doing, the film quality of the insulator formed by the CVD method can be improved to the extent almost equivalent to that of the insulator formed of the thermal oxide.
    Type: Application
    Filed: March 23, 2007
    Publication date: August 16, 2007
    Inventors: Atsushi Hiraiwa, Satoshi Sakai, Dai Ishikawa, Yoshihiro Ikeda
  • Publication number: 20070187764
    Abstract: In a process of forming MISFETs that have gate insulating films that are mutually different in thickness on the same substrate, the formation of an undesirable natural oxide film at the interface between the semiconductor substrate and the gate insulating film is suppressed. A gate insulating film of MISFETs constituting an internal circuit is comprised of a silicon oxynitride film. Another gate insulating film of MISFETs constituting an I/O circuit is comprised of a laminated silicon oxynitride film and a high dielectric film. A process of forming the two types of gate insulating films on the substrate is continuously carried out in a treatment apparatus of a multi-chamber system. Accordingly, the substrate will not be exposed to air. Therefore, it is possible to suppress the inclusion of undesirable foreign matter and the formation of a natural oxide film at the interface between the substrate and the gate insulating films.
    Type: Application
    Filed: April 23, 2007
    Publication date: August 16, 2007
    Inventors: RYOICHI FURUKAWA, Satoshi Sakai, Satoshi Yamamoto
  • Patent number: 7250376
    Abstract: A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of an oxide film and uniformity in thickness of the oxide film.
    Type: Grant
    Filed: May 19, 2005
    Date of Patent: July 31, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Yoshikazu Tanabe, Satoshi Sakai, Nobuyoshi Natsuaki