Patents by Inventor Sheng Wei
Sheng Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240122856Abstract: A method of preparing polylactic acid (PLA) microsphere and polylactic-co-glycolic acid (PLGA) microsphere is provided, including the following steps. A first solution is provided, including polylactic acid or polylactic-co-glycolic acid and an organic solvent. A second solution is provided, including polyvinyl alcohol, sodium carboxymethyl cellulose and an aqueous solution. The first solution is added to the second solution and, at the same time, the second solution is agitated until polylactic acid is solidified to form a plurality of polylactic acid microspheres, or until polylactic-co-glycolic acid is solidified to form a plurality of polylactic-co-glycolic acid microspheres. The polylactic acid microspheres or polylactic-co-glycolic acid microspheres are collected.Type: ApplicationFiled: December 27, 2023Publication date: April 18, 2024Inventors: Ming-Thau SHEU, Yu-Ying HSU, Yu-De SU, Yu-Hsuan LIU, Pu-Sheng WEI
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Patent number: 11958090Abstract: The present disclosure relates to an apparatus and a method for wafer cleaning. The apparatus can include a wafer holder configured to hold a wafer; a cleaning nozzle configured to dispense a cleaning fluid onto a first surface (e.g., front surface) of the wafer; and a cleaning brush configured to clean a second surface (e.g., back surface) of the wafer. Using the cleaning fluid, the cleaning brush can clean the second surface of the wafer with a scrubbing motion and ultrasonic vibration.Type: GrantFiled: July 28, 2022Date of Patent: April 16, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Bo Chen Chen, Sheng-Wei Wu, Yung-Li Tsai
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Patent number: 11955554Abstract: A method of fabrication of a multi-gate semiconductor device that includes providing a fin having a plurality of a first type of epitaxial layers and a plurality of a second type of epitaxial layers. The plurality of the second type of epitaxial layers is oxidized in the source/drain region. A first portion of a first layer of the second type of epitaxial layers is removed in a channel region of the fin to form an opening between a first layer of the first type of epitaxial layer and a second layer of the first type of epitaxial layer. A portion of a gate structure is then formed in the opening.Type: GrantFiled: July 15, 2022Date of Patent: April 9, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Huan-Sheng Wei, Hung-Li Chiang, Chia-Wen Liu, Yi-Ming Sheu, Zhiqiang Wu, Chung-Cheng Wu, Ying-Keung Leung
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Patent number: 11954441Abstract: A device and method for generating article markup information are provided. The method for generating article markup information includes the following. Segmentation processing is performed on an article to generate a segmentation result. Name entity recognition is performed on the segmentation result to generate a first recognition result. Whether the segmentation result includes any word in an expansion list is determined. Expanded entity classification conversion is performed on the first recognition result to generate a second recognition result. The second recognition result and the segmentation result are used as markup information.Type: GrantFiled: January 4, 2022Date of Patent: April 9, 2024Assignee: Acer IncorporatedInventors: Yi-Chun Lin, Yueh-Yarng Tsai, Pin-Cyuan Lin, Ke-Han Pan, Sheng-Wei Chu
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Patent number: 11942134Abstract: A memory circuit includes a memory array including a plurality of memory cells, each memory cell of the plurality of memory cells including an n-type channel layer including a metal oxide material, and a gate structure overlying and adjacent to the n-type channel layer, the gate structure including a conductive layer overlying a ferroelectric layer. The memory circuit is configured to apply a gate voltage to each memory cell of the plurality of memory cells in first and second write operations, the gate voltage has a positive polarity and a first magnitude in the first write operation and a negative polarity and a second magnitude greater than the first magnitude in the second write operation.Type: GrantFiled: November 18, 2022Date of Patent: March 26, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Huan-Sheng Wei, Tzer-Min Shen, Zhiqiang Wu
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Patent number: 11927392Abstract: The present disclosure is directed to a wafer drying system and method that detects airborne molecular contaminants in a drying gas as a feedback parameter for a single wafer or multi-wafer drying process. For example, the system comprises a wafer drying station configured to dispense a drying gas over one or more wafers to dry the one or more wafers, a valve configured to divert the drying gas to a first portion and a second portion, and an exhaust line configured to exhaust the first portion of the drying gas. The system further comprises a detector configured to receive the second portion of the drying gas and to determine a real time property of the second portion of the drying gas, and a control unit configured to control a feedback operation of the wafer drying station based on the real time property of the second portion of the drying gas.Type: GrantFiled: March 29, 2021Date of Patent: March 12, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Wei-Chun Hsu, Sheng-Wei Wu, Shu-Yen Wang
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Publication number: 20240062899Abstract: An electronic device and a method for diagnosing heart state based on electrocardiogram (ECG) are provided. An ECG file is obtained, and the ECG file is in a first file format and includes a plurality of potential traces of a plurality of leads. The ECG file is converted to a second file format to obtain electrocardiogram data corresponding to multiple leads. Each potential trace relative to time in the ECG file is converted to the ECG data of each lead. Integrated ECG data associated with the leads is generated based on the ECG data of the plurality of leads through the zero-padding operation and the stacking operation. A diagnostic result of heart status is generated based on the integrated ECG data and a deep learning model.Type: ApplicationFiled: December 22, 2022Publication date: February 22, 2024Applicants: Acer Incorporated, Acer Medical Inc., National Health Research Institutes, Chang Gung Memorial Hospital, KeelungInventors: Jun-Hong Chen, Sheng-Wei Chu, Pin-Cyuan Lin, Yi-Chun Lin, Chi-Hsiao Yeh, Ting-Fen Tsai
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Patent number: 11903183Abstract: Systems, methods, and apparatus including conductive line contact regions having multiple multi-direction conductive lines and staircase conductive line contact structures for semiconductor devices. One memory device comprises arrays of vertically stacked memory cells, having multiple multi-direction conductive lines arrays of vertically stacked memory cells, including a vertical stack of layers formed from repeating iterations of a group of layers, the group of layers comprising: a first dielectric material layer, a semiconductor material layer, and a second dielectric material layer, the second dielectric material layer having a conductive line formed in a horizontal plane therein, and the vertical stack of layers having multiple multi-direction conductive lines in an interconnection region with a first portion of the interconnection region formed in an array region and a second portion formed in a conductive line contact region that is spaced from the array region.Type: GrantFiled: October 1, 2020Date of Patent: February 13, 2024Assignee: Micron Technology, Inc.Inventors: Byung Yoon Kim, Sheng Wei Yang, Si-Woo Lee, Mark Zaleski
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Patent number: 11883536Abstract: A method of preparing polylactic acid (PLA) microsphere and polylactic-co-glycolic acid (PLGA) microsphere is provided, including the following steps. A first solution is provided, including polylactic acid or polylactic-co-glycolic acid and an organic solvent. A second solution is provided, including polyvinyl alcohol, sodium carboxymethyl cellulose and an aqueous solution. The first solution is added to the second solution and, at the same time, the second solution is agitated until polylactic acid is solidified to form a plurality of polylactic acid microspheres, or until polylactic-co-glycolic acid is solidified to form a plurality of polylactic-co-glycolic acid microspheres. The polylactic acid microspheres or polylactic-co-glycolic acid microspheres are collected.Type: GrantFiled: March 31, 2021Date of Patent: January 30, 2024Assignees: TAIPEI MEDICAL UNIVERSITY, PANION & BF BIOTECH INC.Inventors: Ming-Thau Sheu, Yu-Ying Hsu, Yu-De Su, Yu-Hsuan Liu, Pu-Sheng Wei
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Patent number: 11879934Abstract: A test kit for testing a device under test (DUT) includes a socket structure for containing the DUT, and a plunger assembly detachably coupled with the socket structure. The plunger assembly includes a multi-layered structure having at least an interposer substrate sandwiched by a top socket and a nest.Type: GrantFiled: May 3, 2022Date of Patent: January 23, 2024Assignee: MEDIATEK INC.Inventors: Jing-Hui Zhuang, Ying-Chou Shih, Sheng-Wei Lei, Chang-Lin Wei, Chih-Yang Liu, Che-Hsien Huang, Yi-Chieh Lin
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Publication number: 20240021475Abstract: A semiconductor structure includes a substrate, several gate structures formed in the substrate, dielectric portions formed on the respective gate structures, spacers adjacent to and extending along the sidewalls of the dielectric portions, source regions formed between the substrate and the spacers, and contact plugs formed between adjacent gate structures and contact the respective source regions. The source regions are adjacent to the gate structures. The sidewalls of the spacers are aligned with the sidewalls of the underlying source regions.Type: ApplicationFiled: July 12, 2022Publication date: January 18, 2024Applicant: Vanguard International Semiconductor CorporationInventors: Po-Hsiang LIAO, Sheng-Wei FU, Chung-Yeh LEE
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Publication number: 20230420529Abstract: A semiconductor device includes a substrate, a body region on the substrate, a source region on the body region, a first trench electrode passing through the source region, the body region and a portion of the substrate, a first dielectric cap layer, a first dielectric liner and a conductive layer. The first dielectric cap layer includes a first dielectric portion directly above the first trench electrode and first dielectric spacers on two opposite sides of the first dielectric portion. The first dielectric liner surrounds the first trench electrode and the first dielectric portion. The conductive layer covers the first dielectric cap layer and includes an electrode contact. The electrode contact includes a first portion in the body region and a second portion adjacent to one of the first dielectric spacers, where the first and second portions have the same width.Type: ApplicationFiled: June 26, 2022Publication date: December 28, 2023Applicant: Vanguard International Semiconductor CorporationInventors: Po-Hsiang Liao, Sheng-Wei Fu, Chung-Yeh Lee
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Patent number: 11848282Abstract: Semiconductor devices having metallization structures including crack-inhibiting structures, and associated systems and methods, are disclosed herein. In one embodiment, a semiconductor device includes a metallization structure formed over a semiconductor substrate. The metallization structure can include a bond pad electrically coupled to the semiconductor substrate via one or more layers of conductive material, and an insulating material—such as a low-? dielectric material—at least partially around the conductive material. The metallization structure can further include a crack-inhibiting structure positioned beneath the bond pad between the bond pad and the semiconductor substrate. The crack-inhibiting structure can include a barrier member extending vertically from the bond pad toward the semiconductor substrate and configured to inhibit crack propagation through the insulating material.Type: GrantFiled: August 16, 2022Date of Patent: December 19, 2023Assignee: Micron Technology, Inc.Inventors: Hyunsuk Chun, Sheng Wei Yang, Shams U. Arifeen
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Publication number: 20230384030Abstract: The present disclosure is directed to a wafer drying system and method that detects airborne molecular contaminants in a drying gas as a feedback parameter for a single wafer or multi-wafer drying process. For example, the system comprises a wafer drying station configured to dispense a drying gas over one or more wafers to dry the one or more wafers, a valve configured to divert the drying gas to a first portion and a second portion, and an exhaust line configured to exhaust the first portion of the drying gas. The system further comprises a detector configured to receive the second portion of the drying gas and to determine a real time property of the second portion of the drying gas, and a control unit configured to control a feedback operation of the wafer drying station based on the real time property of the second portion of the drying gas.Type: ApplicationFiled: August 9, 2023Publication date: November 30, 2023Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Wei-Chun Hsu, Sheng-Wei Wu, Shu-Yen Wang
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Publication number: 20230384813Abstract: A low-dropout regulator circuit includes a reference circuit, an amplifying circuit, a power switch circuit, a feedback circuit, and a control circuit. The reference circuit is configured to generate a reference voltage. The amplifying circuit is configured to generate an amplifying voltage according to the reference voltage and a feedback voltage. The power switch circuit is configured to receive the amplifying voltage and generate an output voltage at an output terminal according to an input voltage. The feedback circuit is configured to generate the feedback voltage according to the output voltage. The control circuit is configured to control the power switch circuit according to the input voltage and a signal from the reference circuit.Type: ApplicationFiled: May 11, 2023Publication date: November 30, 2023Inventors: Sheng-Wei LIN, Wei-Cheng TANG
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Patent number: 11818912Abstract: A display may have organic light-emitting diode pixels formed from thin-film circuitry. The thin-film circuitry may be formed in thin-film transistor (TFT) layers and the organic light-emitting diodes may include anodes and cathodes and an organic emissive layer formed over the TFT layers between the anodes and cathodes. The organic emissive layer may be formed via chemical evaporation techniques. The display may include moisture blocking structures such as organic emissive layer disconnecting structures that introduce one or more gaps in the organic emissive layer during evaporation so that any potential moisture permeating path from the display panel edge to the active area of the display is completely terminated.Type: GrantFiled: October 31, 2019Date of Patent: November 14, 2023Assignee: Apple Inc.Inventors: Tsung-Ting Tsai, Abbas Jamshidi Roudbari, Chuan-Sheng Wei, HanChi Ting, Jae Won Choi, Jianhong Lin, Nai-Chih Kao, Shih Chang Chang, Shin-Hung Yeh, Takahide Ishii, Ting-Kuo Chang, Yu Hung Chen, Yu-Wen Liu, Yu-Chuan Pai, Andrew Lin
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Publication number: 20230348555Abstract: Disclosed are compositions and methods for treating disease or condition caused or exacerbated by S100A9 activity, such as myelodysplastic syndromes (MDS) using a composition comprising an effective amount of a CD33/S100A9 inhibitor.Type: ApplicationFiled: February 20, 2023Publication date: November 2, 2023Inventors: Alan F. List, Sheng Wei
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Patent number: 11766703Abstract: The present disclosure relates to an apparatus and a method for wafer cleaning. The apparatus can include a wafer holder configured to hold a wafer; a cleaning nozzle configured to dispense a cleaning fluid onto a first surface (e.g., front surface) of the wafer; and a cleaning brush configured to clean a second surface (e.g., back surface) of the wafer. Using the cleaning fluid, the cleaning brush can clean the second surface of the wafer with a scrubbing motion and ultrasonic vibration.Type: GrantFiled: August 6, 2019Date of Patent: September 26, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Bo Chen Chen, Sheng-Wei Wu, Yung-Li Tsai
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Patent number: 11745110Abstract: A teammate recommendation method for a multiplayer online game is proposed. The teammate recommendation method includes the steps of: determining one or more characteristic values for each of a plurality of players based on past game performance information of the players; dividing the players into a plurality of groups based on the characteristic values of the players; determining a Key Performance Indicator (KPI) for each of a plurality of combinations of the groups based on teammate information and team ranking of each game in the past game performance information; selecting one of the combinations, which includes a first group that the first player belongs to, based on the KPIs of the combinations; and recommending one or more second players based on the selected combination.Type: GrantFiled: May 5, 2021Date of Patent: September 5, 2023Assignee: ACER INCORPORATEDInventors: Chun-Hsien Li, Sheng-Wei Chu, Chia-Shang Yuan, Jun-Hong Chen, Te-Chung Huang, Tsung-Hsien Tsai, Yueh-Yarng Tsai, Pin-Cyuan Lin
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Patent number: 11745917Abstract: Embodiments of the disclosure are directed to a transportation system for carrying servers. The transportation system includes a server rack and a shock-absorbing pallet. The shock-absorbing pallet is secured under the server rack and configured to move relative to the server rack to dampen vibration during transportation of the server rack. The shock-absorbing pallet includes a top cover, a bottom cover, one or more isolation devices, and one or supporting layers. The one or more isolation devices are disposed between the top cover and the bottom cover. Each isolation device includes a shock-absorbing component coupled to the top cover and the bottom cover. The one or more supporting layers are secured between the top cover and the bottom cover around the one or more isolation devices. The one or more supporting layers have a plurality of slots for guiding a pallet lifter therethrough.Type: GrantFiled: December 14, 2021Date of Patent: September 5, 2023Assignee: QUANTA COMPUTER INC.Inventors: Chao-Jung Chen, Ming-Sheng Chang, Sheng-Wei Tang, Ta-Chih Chen