Abstract: A data display method of a test instrument for a rivet nut setting tool is disclosed. When the rivet nut setting tool is operated, a value of a pull force detected by the pull-force detector is transmitted to the first display area through a circuit module, and a first display area displays variation of the value of the detected pull force in waveform, and the first display area also displays an upper-limit waveform value, a waveform data unit, a current value and a historical maximum value; when the rivet nut setting tool is operated continuously, the first display area displays a continuous waveform, and the second display area displays historical data and average values of maximum pull force values.

Abstract: A semiconductor memory structure includes a substrate having thereon a transistor forming region and a capacitor forming region. A transistor is disposed on the substrate within the transistor forming region. A capacitor is disposed within the capacitor forming region and electrically coupled to the transistor. A first inter-layer dielectric layer covers the transistor forming region and the capacitor forming region. The first inter-layer dielectric layer surrounds a metal gate of the transistor and a bottom plate of the capacitor. A cap layer is disposed on the first inter-layer dielectric layer. The cap layer has a first thickness within the transistor forming region and a second thickness within the capacitor forming region. The first thickness is greater than the second thickness. The cap layer within the capacitor forming region acts as a capacitor dielectric layer of the capacitor.

Abstract: A 3D semiconductor structure includes a buffer layer, a n-type high electron mobility transistor (HEMT) disposed on a first surface of the buffer layer, and a p-type high hole mobility transistor (HHMT) disposed on a second surface of the buffer layer opposite to the first surface.

Abstract: A multilayer-type on-chip inductor with a conductive structure includes an insulating redistribution layer disposed on an inter-metal dielectric layer, a first spiral trace layer disposed in the insulating redistribution layer, and a second spiral trace layer disposed in the inter-metal dielectric layer and correspondingly formed below the first spiral trace layer. The inter-metal dielectric layer has a separating region to divide the second spiral trace layer into line segments. First slit openings each passes through a corresponding line segment, and extends in an extending direction of a length of the corresponding line segment.

Abstract: A semiconductor device includes a substrate having a magnetic tunneling junction (MTJ) region and a logic region, a magnetic tunneling junction (MTJ) on the MTJ region and a first metal interconnection on the MTJ. Preferably, a top view of the MTJ includes a circle and a top view of the first metal interconnection includes an ellipse overlapping the circle.

Abstract: A wafer pod transfer assembly includes a wafer pod port to receive a wafer pod, a transfer axle coupled to the wafer pod port, a shaft receiver, a shaft coupled to the transfer axle and to the shaft receiver, a pin through the shaft receiver and through the shaft, wherein the pin comprises a first end and a second end, opposite the first end, and a pin buckle including a first loop and a second loop. The pin buckle is coupled to the pin, the first loop encircles the first end of the pin, and the second loop encircles the second end of the pin.

Abstract: A micro LED display device is provided. The micro LED display device includes a substrate having a display region, a plurality of micro LED structures disposed inside the display region and arranged in an array, and a plurality of light-converting structures disposed on some micro LED structures. The micro LED display device also includes a positioning frame disposed outside the display region and an isolation frame surrounding the positioning frame. The water vapor transmission rate of the isolation frame is lower than the water vapor transmission rate of the positioning frame. The micro LED display device further includes a cover plate disposed on the substrate and connected to the substrate by the positioning frame and the isolation frame.

Abstract: An apparatus for performing a deposition process on a semiconductor wafer includes a chamber, a wafer holder, and a shielding structure. The chamber contains a reaction area, the wafer holder is disposed in the chamber to hold the semiconductor wafer, and the reaction area is above the semiconductor wafer. The shielding structure is disposed in the chamber and isolates an inner sidewall of the chamber from the reaction area. The shielding structure includes a base member, a first member, and a second member. The base member is disposed between the inner sidewall of the chamber and the wafer holder. The first member is disposed on the base member and is windowless. The second member is disposed on the base member and within the first member, and the second member includes a sidewall provided with a first window to transfer the semiconductor wafer.

Abstract: A micro LED display device includes a circuit substrate, an epitaxial structure layer, a metal conductive layer, a light conversion layer and a light-shielding structure. The epitaxial structure layer includes a first surface, a second surface, and a plurality of micro LED units separated from each other. The micro LED units are electrically connected to the circuit substrate. The metal conductive layer is disposed on the second surface and directly contacts the epitaxial structure layer, and has a plurality of light conversion region each corresponds to one of the micro LED units. The light conversion layer is disposed in a part of the light conversion regions. The light-shielding structure does not cover the light conversion regions. In the direction perpendicular to a bonding surface of the circuit substrate, the thickness of the metal conductive layer is greater than that of the epitaxial structure layer.

Abstract: A micro light-emitting diode display panel includes a substrate, a plurality of pixel structures, and a plurality of wavelength conversion structures. The pixel structures are disposed on the substrate. Each pixel structure includes a plurality of micro light-emitting diodes. The micro light-emitting diodes are formed by a plurality of different portions of a connected epitaxial structure. The wavelength conversion structures are disposed in the epitaxial structure and are respectively aligned with at least a portion of the micro light-emitting diodes.

Abstract: A testing probe structure for wafer level testing semiconductor IC packaged devices under test (DUT). The structure includes a substrate, through substrate vias, a bump array formed on a first surface of the substrate for engaging a probe card, and at least one probing unit on a second surface of the substrate. The probing unit includes a conductive probe pad formed on one surface of the substrate and at least one microbump interconnected to the pad. The pads are electrically coupled to the bump array through the vias. Some embodiments include a plurality of microbumps associated with the pad which are configured to engage a mating array of microbumps on the DUT. In some embodiments, the DUT may be probed by applying test signals from a probe card through the bump and microbump arrays without direct probing of the DUT microbumps.

Abstract: A high-speed connector includes an insulating housing, and a first terminal assembly mounted in the insulating housing. The first terminal assembly includes a plurality of first terminals including a plurality of first grounding terminals, a first base body, and a first shielding plate disposed under the first base body. The plurality of the first terminals are fastened to the first base body. The first shielding plate has a first base plate, a first metal layer and a plurality of first ribs. Several portions of a top surface of the first base plate extend upward to form the plurality of the first ribs. The first metal layer is a pattern with a plurality of pores. Several of the first grounding terminals contact with the first metal layer which is attached to top surfaces of the plurality of the first ribs to form a grounding structure.

Abstract: A micro LED display device includes an epitaxial structure layer, a connection layer, a light conversion layer and a transparent layer. The epitaxial structure layer includes a plurality of micro LEDs disposed apart from each other. The connection layer is disposed at one side of the epitaxial structure layer away from the micro LEDs. The light conversion layer is fixed on the epitaxial structure layer through the connection layer and includes a plurality of light conversion portions. Each of the light conversion portions corresponds to one of the micro LEDs. The transparent layer is disposed at one side of the light conversion layer away from the epitaxial structure layer. The ratio of the thickness of the transparent layer to the width of each light conversion portion is between 0.1 and 40. A manufacturing method of the micro LED display device is also provided.

Abstract: A magnetoresistive random access memory (MRAM) includes a first transistor and a second transistor on a substrate, a source line coupled to a first source/drain region of the first transistor, and a first metal interconnection coupled to a second source/drain region of the first transistor. Preferably, the first metal interconnection is extended to overlap the first transistor and the second transistor and the first metal interconnection further includes a first end coupled to the second source/drain region of the first transistor and a second end coupled to a magnetic tunneling junction (MTJ).

Abstract: A one-time programmable (OTP) memory cell includes a substrate having a first conductivity type and having an active area surrounded by an isolation region, a transistor disposed on the active area, and a capacitor disposed on the active area and electrically coupled to the transistor. The capacitor comprises a diffusion region of a second conductivity type in the substrate, a metallic film in direct contact with the active area, a capacitor dielectric layer on the metallic film, and a metal gate surrounded by the capacitor dielectric layer. The diffusion region and the metallic film constitute a capacitor bottom plate.

Abstract: A modular planting material for natural turf in sports field and its manufacturing process, the material is consist of a far-infrared mineral substrate, a multi-biochar, and a polysaccharide polymer; wherein the far-infrared mineral substrate is composed of SiO2, ZnO, CaO, Al2O3, Fe2O3, K2O, MgO, TiO2, CeO2, La2O3, pulverized fuel ash 1, and raw carbon powder; the multi-biochar is composed of rice husk, oil millet husk, and oil millet stalk; the polysaccharide polymer is composed of polyuronic acid, sodium salt, and cellulose; The present invention let 75˜85% far-infrared mineral substrate, 10-20% multi-biochar, and 2˜5% polysaccharide polymer be mixed, stirred, dried, heated and pressed into shape, high temperature sterilized and molded, and cooled and pressed, then cut to form a natural turf modular planting material. Since the modular planting material has many pores, it has the feature of water retention, air permeability and promoting the growth of the beneficial bacteria and the plants.

Abstract: An image processing system and a processing method of video stream are provided. The first image is obtained according to a parameter. The deformation correction procedure is performed on the first image, and the second image is generated. The identification detection procedure is performed on the second image, and a detected result is generated. Control information is generated according to the detected result. The parameter is adjusted according to the control information, and a third image is generated. The second image and the third image are output. Therefore, the subsequent application could be enhanced through the dual image outputs.

Abstract: A twistable electronic device module including a twistable substrate, an electrode pattern layer, an insulating layer, a circuit layer, a plurality of circuit boards and a plurality of electronic devices is provided. The electrode pattern layer is disposed on the twistable substrate. The insulating layer is disposed on the electrode pattern layer. The edge of the insulating layer has an opening located at the edge of the twistable substrate and exposing a part of the electrode pattern layer. The circuit layer is disposed on the insulating layer and on the sidewall of the opening, and is connected with the electrode pattern layer. The plurality of circuit boards are disposed on the circuit layer, and each is electrically connected to the circuit layer. The plurality of electronic devices are disposed on the plurality of circuit boards, and each is electrically connected to a corresponding one of the plurality of circuit boards.

Abstract: A flash memory initialization method executed by a flash memory initialization device to initialize a flash memory device having a flash memory and a flash memory controller includes: determining an acceptable maximum number N of candidate addresses; determining a number M of different capacity sizes; classifying the candidate addresses into M portions; determining a difference value between two address values of any two adjacent addresses among the m-th portion of candidate addresses; determining multiple address values of the m-th portion of candidate addresses according to the difference value; and determining actual addresses of the m-th portion of candidate addresses according to the multiple address values; and controlling the flash memory controller to write the boot up information into at least one storage location corresponding to at least one of the m-th portion of candidate addresses according to the actual addresses.

Abstract: A radio frequency (RF) match assembly for a chemical vapor deposition processing chamber. The assembly includes a top electrically insulating column and a bottom electrically insulating column. The assembly further includes a one-piece RF match strap that has a head, a main body and a body extension. The main body of the one-piece RF match strap is configured to extend through the top electrically insulating column and the bottom electrically insulating column. A flexible chamber lid strap connects the processing chamber to the top of the one piece RF match strap.