Abstract: A wafer pod transfer assembly includes a wafer pod port to receive a wafer pod, a transfer axle coupled to the wafer pod port, a shaft receiver, a shaft coupled to the transfer axle and to the shaft receiver, a pin through the shaft receiver and through the shaft, wherein the pin comprises a first end and a second end, opposite the first end, and a pin buckle including a first loop and a second loop. The pin buckle is coupled to the pin, the first loop encircles the first end of the pin, and the second loop encircles the second end of the pin.

Abstract: A semiconductor device includes a substrate having a high electron mobility transistor (HEMT) region and a capacitor region, a first mesa isolation on the HEMT region, a HEMT on the first mesa isolation, a second mesa isolation on the capacitor region, and a capacitor on the second mesa isolation. The semiconductor device further includes buffer layer between the substrate, the first mesa isolation, and the second mesa isolation, in which bottom surfaces of the first mesa isolation and the second mesa isolation are coplanar.

Abstract: The present application provides a solid metal material quickly soluble in water, comprising components of magnesium, gadolinium, yttrium, praseodymium, neodymium, platinum, hafnium, nickel, potassium, and manganese in a specific proportion. Furthermore, the solid metal material quickly soluble in water further comprises aluminum, copper, calcium, iron, zinc, and sodium. The present application also provides a preparation method for the solid metal material quickly soluble in water. The solid metal material quickly soluble in water provided by the present application is a quickly soluble magnesium alloy material capable of adapting to the waiting time requirement of the public for washing, can be hydrolyzed, and can react with water in a washing machine, and is environmentally friendly. Washing substances remaining on the clothes have no irritation to human skin contact, and the washing and discharging sewage discharged after washing has no harm to the environment.

Abstract: A multilayer-type on-chip inductor with a conductive structure includes an insulating redistribution layer disposed on an inter-metal dielectric layer, a first spiral trace layer disposed in the insulating redistribution layer, and a second spiral trace layer disposed in the inter-metal dielectric layer correspondingly formed below the first spiral trace layer, wherein the inter-metal dielectric layer has a separating region to divide the second spiral trace layer into a plurality of line segments, and wherein each of a plurality of first slit openings and each of a plurality of second slit openings pass through a corresponding line segment, and extend in an extending direction of a length of the corresponding line segment.

Abstract: A one-time programmable (OTP) memory cell includes a substrate comprising an active area surrounded by an isolation region, a transistor disposed on the active area, and a diffusion-contact fuse electrically coupled to the transistor. The diffusion-contact fuse includes a diffusion region in the active area, a silicide layer on the diffusion region, and a contact partially landed on the silicide layer and partially landed on the isolation region.

Abstract: A preclean process may be omitted from a eutectic bonding sequence. To remove oxide from one or more surfaces of a device wafer of a micro-electromechanical-system (MEMS) structure, a duration of an acid-based etch process in the eutectic bonding sequence may be increased relative to the duration of the acid-based etch process when the preclean process is performed. The increased duration of the acid-based etch process enables the acid-based etch process to remove the oxide from the one or more surfaces of the device wafer without the use of a preceding preclean process. This reduces the complexity and cycle time of the eutectic bonding sequence, reduces the risk of stiction between suspended mechanical components of the MEMS structure, and/or reduces the likelihood that the MEMS structure may be rendered defective or inoperable during manufacturing, which increases process yield.

Abstract: A display panel and a manufacturing method thereof are provided. The display panel includes a circuit substrate and a plurality of micro light-emitting diode structures. The micro light-emitting diode structures each include a micro light-emitting chip and a molding structure. The micro light-emitting chip is electrically bonded to the circuit substrate, and includes a first surface, a second surface, and a peripheral surface. The first surface is located on a side of the micro light-emitting chip facing the circuit substrate. The second surface is disposed opposite to the first surface. The peripheral surface connects the first surface and the second surface. The molding structure surrounds the peripheral surface and encloses the second surface of the micro light-emitting chip. The molding structure extends in a direction away from the circuit substrate and forms an inner side wall. The inner side wall and the second surface constitute an accommodating portion.

Abstract: A high-speed connector includes an insulating housing, a first terminal assembly received in the insulating housing, a second terminal assembly received in the insulating housing, a third terminal assembly received in the insulating housing, and a fourth terminal assembly received in the insulating housing. The second terminal assembly is opposite to the first terminal assembly along an up-down direction. The third terminal assembly is disposed between the first terminal assembly and the second terminal assembly. The fourth terminal assembly is corresponding to the third terminal assembly. The fourth terminal assembly is disposed between the second terminal assembly and the third terminal assembly.

Abstract: An OTP memory capacitor structure includes a semiconductor substrate, a bottom electrode, a capacitor insulating layer and a metal electrode stack structure. The bottom electrode is provided on the semiconductor substrate. The capacitor insulating layer is provided on the bottom electrode. The metal electrode stack structure includes a metal layer, an insulating sacrificial layer and a capping layer stacked in sequence. The metal layer is provided on the capacitor insulating layer and is used as a top electrode. The insulating sacrificial layer is provided between the metal layer and the capping layer. A manufacturing method of the OTP memory capacitor structure is also provided. By the provision of the insulating sacrificial layer, the bottom electrode formed first can be prevented from being damaged by subsequent etching and other processes, so that the OTP memory capacitor structure has better electrical characteristics.

Abstract: A data storage device and a selecting bad data block method thereof which includes: writing data to a sample block; reading written data of the sample block as read data; comparing the read data and the written data of each data column in sample block, and calculating a number of error bits in each chunk accordingly; selecting a column with the largest number of error bits in a chunk with the largest number of error bits as a bad data column; and recording the sample block as a bad data block when determining that the number of error bits in the chunk is greater than or equal to the first threshold value and the number of bad columns in the chunk is greater than or equal to the second threshold value.

Abstract: A selecting bad data column method suitable for a data storage device is provided. The data storage device includes a control unit and a data storage medium. The selecting method performed by the control unit includes: reading written data of each data column as read data; comparing the read data and the written data of each data column to calculate an average number of error bits of each data column; determining whether the average number of error bits of each data column is greater than or equal to a predetermined value; and recording a data column as a bad data column when the average number of error bits of the data column is greater than or equal to the predetermined value. In this way, in order to avoid the problems that the error correction code can't be corrected or the correction capability is excessively consumed.

Abstract: A data storage device, and an error tolerance selecting method thereof which includes: writing data to data blocks of the data storage device; reading written data of the data blocks as read data; comparing the read data and the written data of each data column in the data blocks, and calculating a number of error bits in each chunk including a plurality of data columns accordingly; calculating a difference value between the number of error bits in the chunk and a first threshold value to store the difference value in an error tolerance list; and selecting a largest difference value in the error tolerance list as an error tolerance.

Abstract: A controller having a wireless transmission interface is provided. The controller includes an amplifier, an analog-to-digital converter, a digital filter, a processor, and a radio frequency signal transceiver. The amplifier is coupled to the wireless transmission interface, and generates an amplification signal according to an input signal. The analog-to-digital converter is coupled to the amplifier, and configured to convert the amplification signal into a digital format. The digital filter is coupled to the analog-to-digital converter, and configured to filter the amplification signal in the digital format to generate a filtered signal. The processor is coupled to the digital filter, and configured to perform a calculation on the filtered signal to generate a calculation result. The radio frequency signal transceiver is coupled to the processor, and obtains received information according to the calculation result and the filtered signal.

Abstract: A magnetoresistive random access memory (MRAM) includes a first transistor and a second transistor on a substrate, a source line coupled to a first source/drain region of the first transistor, and a first metal interconnection coupled to a second source/drain region of the first transistor. Preferably, the first metal interconnection is extended to overlap the first transistor and the second transistor and the first metal interconnection further includes a first end coupled to the second source/drain region of the first transistor and a second end coupled to a magnetic tunneling junction (MTJ).

Abstract: A micro LED display device includes: a substrate; a plurality of micro light-emitting diodes disposed on the substrate; and a reflective layer and a black layer sequentially stacked on the substrate. The reflective layer and the black layer cover a surface of the substrate, wherein a top surface of the plurality of micro light-emitting diodes is exposed through the reflective layer and the black layer. A plurality of reflective banks and a plurality of black banks are sequentially disposed on the black layer and exposing the plurality of micro light-emitting diodes; and a color-conversion material covers the top surface of at least one of the plurality of micro light-emitting diodes. The color-conversion material is laterally disposed between the plurality of reflective banks. The reflective layer, the black layer, the plurality of reflective banks, and the plurality of black banks overlap each other in a display direction.

Abstract: A mounting base is provided. The mounting base is adapted to be selectively affixed to different supporting structures. The mounting base includes a mounting base body, a first hook, a second hook and a rotatable member. The first hook is formed on the mounting base body. The second hook is formed on the mounting base body. The rotatable member is pivoted on the mounting base body. The rotatable member is adapted to be rotated between a first orientation and the second orientation relative to the mounting base body. When the rotatable member is in the first orientation, the rotatable member is restricted by the mounting base body. When the rotatable member is in the second orientation, the rotatable member is restricted by the mounting base body.

Abstract: An exposure apparatus including a micro light emitting diode display unit and a first projection optical system is provided. The micro light emitting diode display unit has a plurality of micro light emitting diodes. The micro light emitting diode display unit is adapted to individually control light emission signals of the micro light emitting diodes and forming a predetermined pattern. The first projection optical system is disposed on a light emitting path of the micro light emitting diode display unit. The first projection optical system is configured to form an exposure pattern on a photosensitive material layer at once by applying the predetermined pattern.

Abstract: A resistor-transistor-logic (RTL) circuit with GaN structure, including a GaN layer, a AlGaN barrier layer on the GaN layer, multiple p-type doped GaN capping layers on the AlGaN barrier layer, wherein parts of the p-type doped GaN capping layers in a high-voltage region and in a low-voltage region convert the underlying GaN layer into gate depletion areas, the GaN layer not covered by the p-type doped GaN capping layers in a resistor region becomes a 2DEG resistor.

Abstract: A high electron mobility transistor (HEMT) includes a carrier transit layer, a carrier supply layer, a main gate, a control gate, a source electrode and a drain electrode. The carrier transit layer is on a substrate. The carrier supply layer is on the carrier transit layer. The main gate and the control gate are on the carrier supply layer. The source electrode and the drain electrode are at two opposite sides of the main gate and the control gate, wherein the source electrode is electrically connected to the control gate by a metal interconnect. The present invention also provides a method of forming a high electron mobility transistor (HEMT).

Abstract: The micro-LED display device provided includes a substrate having a first circuit layer and a second circuit layer; a first pad on the first circuit layer and a second pad on the second circuit layer; a plurality of micro-LEDs, wherein each of the micro-LEDs includes a first electrode connected to the first pad and a second electrode connected to the second pad; a first bonding support layer disposed between the first and second pad and in direct contact with the substrate and the micro-LED; and a plurality of second bonding support layers, wherein each of the second bonding support layers includes a lower portion and a upper portion over the lower portion, wherein both portion are disposed between and in lateral contact with adjacent two of the micro-LEDs, and an optical density of the lower portion is greater than that of the upper portion under the same thickness.