Abstract: A semiconductor device includes: a SOI substrate; a semiconductor element having first and second impurity layers disposed in an active layer of the SOI substrate, the second impurity layer surrounding the first impurity layer; and multiple first and second conductive type regions disposed in a part of the active layer adjacent to an embedded insulation film of the SOI substrate. The first and second conductive type regions are alternately arranged. The first and second conductive type regions have a layout, which corresponds to the semiconductor element.

Abstract: A wireless communication performance test method for testing a performance of a wireless processor which is arranged in a wireless transmission device for performing a transmission and reception operation of a wireless signal, includes operations of transmitting, performing, and measuring. The operation of transmitting is for transmitting, to the wireless processor, a wireless signal including control information for controlling the transmission and reception operation performed by the wireless processor from a wireless transmission test use measurement device for measuring a wireless transmission performance of the wireless processor. The operation of performing is for performing the transmission and reception operation in the wireless processor based on the control information extracted from the wireless signal transmitted from the wireless transmission test use measurement device.

Abstract: A semiconductor device includes: a semiconductor substrate; a lateral MOS transistor disposed in the substrate; a Zener diode disposed in the substrate; and a capacitor disposed in the substrate. The transistor includes a drain and a gate, and the diode and the capacitor are coupled in series between the drain and the gate. This device has minimized dimensions and high switching speed. Further, both of a switching loss and a surge voltage are improved.

Abstract: A method of reduction treatment of metal oxides characterized by using as a material a powder containing metal oxides and containing alkali metals and halogen elements and further, in accordance with need, carbon, mixing said material with water to produce a slurry, then dehydrating this and charging the dehydrated material, mixed with another material in accordance with need, into a rotary hearth type reduction furnace for reduction.

Abstract: A magnetic material of a magnetoresistive element is formed on a lower electrode. An upper electrode is formed on the magnetic material. A resist for nano-imprint lithography is formed on the upper electrode. A first pattern or a second pattern is formed in the resist by setting a first template or a second template into contact with the resist and curing the resist. The first template has the first pattern that corresponds to the magnetoresistive element and the lower electrode. The second template has the second pattern that corresponds to the magnetoresistive element and the upper electrode. The magnetic material and the lower electrode are patterned at the same time by using the resist having the first pattern, or the magnetic material and the upper electrode are patterned at the same time by using the resist having the second pattern.

Abstract: A receiving device includes a receiving circuit and an impedance control circuit. The receiving circuit receives a signal transmitted through a communication line. The impedance control circuit is coupled with the receiving circuit and has a detecting part. The detecting part detects a physical value of the signal and the physical value includes at least one of a voltage, an electric current, and an electric power. The impedance control circuit changes an input impedance based on the detected value so that a ringing of the signal is reduced.

Abstract: A switching circuit includes: a transistor having a first electrode, a second electrode and a control electrode; a zener diode; and a capacitor. A connection between the first electrode and the second electrode is capable of temporally switching between a condition state and a non-conduction state by switching a control voltage of the transistor. The zener diode and the capacitor are coupled in series between the first electrode and the control electrode of the transistor. The first electrode is a drain or a collector.

Abstract: A magnetoresistive element includes a stacked structure including a fixed layer having a fixed direction of magnetization, a recording layer having a variable direction of magnetization, and a nonmagnetic layer sandwiched between the fixed layer and the recording layer, a first protective film covering a circumferential surface of the stacked structure, and made of silicon nitride, and a second protective film covering a circumferential surface of the first protective film, and made of silicon nitride. A hydrogen content in the first protective film is not more than 4 at %, and a hydrogen content in the second protective film is not less than 6 at %.

Abstract: A magnetic memory includes an interlayer insulation layer provided on a substrate, a conductive underlying layer provided on the interlayer insulation layer, and a magnetoresistive element provided on the underlying layer and including two magnetic layers and a nonmagnetic layer interposed between the magnetic layers. The underlying layer has an etching rate lower than an etching rate of each of the magnetic layers.

Abstract: A resistance-change memory includes an interlayer insulating film, a lower electrode layer, a fixed layer, a first insulating film, a recording layer, a second insulating film, a conducting layer and an interconnect. The interlayer insulating film is formed on a semiconductor substrate and has a step. The lower electrode layer is formed on the interlayer insulating film including the step. The fixed layer is formed on the lower electrode layer and has invariable magnetization. The first insulating film is formed on the fixed layer. The recording layer is formed on part of the first insulating film and has variable magnetization. The second insulating film is over the recording layer and in contact with the first insulating film. The conducting layer is formed on the second insulating film. The interconnect is connected to the conducting layer.

Abstract: A switching circuit includes: a transistor having a first electrode, a second electrode and a control electrode; a zener diode; and a capacitor. A connection between the first electrode and the second electrode is capable of temporally switching between a condition state and a non-conduction state by switching a control voltage of the transistor. The zener diode and the capacitor are coupled in series between the first electrode and the control electrode of the transistor. The first electrode is a drain or a collector.

Abstract: A signal receiver includes: a receiving circuit that receives a differential signal via a transmission line, which includes a pair of signal wires for transmitting the differential signal; and an impedance control circuit that controls an input impedance so as to reduce a common mode noise. The impedance control circuit includes a detection element for detecting at least one of a voltage, a current and an electric power of the common mode noise. The impedance control circuit controls the input impedance in accordance with change of the at least one of the voltages the current and the electric power of the common mode noise.

Abstract: A receiving device is provided capable of avoiding reception of unnecessary energy when a signal waveform actually changes on a receiving side. An impedance control circuit includes a sensing unit to sense one or more of a voltage, current, or power of a signal to be received by a receiving circuit. The impedance control unit varies an input impedance according to the change in the sensed one or more quantities so that the received signal will be reflected. Thus the excess energy of the signal is reflected and fed to any other receiving circuit achieving stable communications.

Abstract: A magneto-resistance effect element includes: a first ferromagnetic layer serving as a magnetization fixed layer; a magnetization free layer including a second ferromagnetic layer provided on one side of the first ferromagnetic layer, a third ferromagnetic layer which is formed on an opposite side of the second ferromagnetic layer from the first ferromagnetic layer and has a film face having an area larger than that of the second ferromagnetic layer and whose magnetization direction is changeable by an external magnetic field, and an intermediate layer provided between the second ferromagnetic layer and the third ferromagnetic layer; and a tunnel baffler layer provided between the first ferromagnetic layer and the second ferromagnetic layer. The second ferromagnetic layer and the third ferromagnetic layer are magnetically coupled via the intermediate layer, and an aspect ratio of a plane shape of the third ferromagnetic layer is within a range from 1 to 2.

Abstract: There are provided a first reference layer, in which a direction of magnetization is fixed, and a storage layer including a main body, in which a length in an easy magnetization axis direction is longer than a length in a hard magnetization axis direction, and a projecting portion provided to a central portion of the main body in the hard magnetization axis direction, a direction of magnetization of the storage layer being changeable in accordance with an external magnetic field.

Abstract: A semiconductor apparatus comprises: a semiconductor substrate; and a lateral type MIS transistor disposed on a surface part of the semiconductor substrate. The lateral type MIS transistor includes: a line coupled with a gate of the lateral type MIS transistor; a polycrystalline silicon resistor that is provided in the line, and that has a conductivity type opposite to a drain of the lateral type MIS transistor; and an insulating layer through which a drain voltage of the lateral type MIS transistor is applied to the polycrystalline silicon resistor.

Abstract: A semiconductor device includes: a semiconductor substrate; multiple MOS type first transistors coupled in parallel with a current path; and a nonvolatile memory for memorizing operating information. Each transistor includes first and second electrodes and a gate electrode for controlling current flowing therebetween. Based on the operating information, each first transistor is selectively set to an active state. When the transistors provide a single transistor, an effective channel width of the single transistor is variable in accordance with the number of the first transistors under the active state.

Abstract: A semiconductor device includes: a semiconductor substrate; a separation region in the substrate; an embedded layer; a channel forming region; a source region; a drain region; a first electrode for the source region; a second electrode for the channel forming region; a third electrode for the drain region; a trench penetrating the channel forming region between the source region and the drain region; a trench gate electrode in the trench; an offset layer on a portion to be a current path provided by the trench gate electrode; and an electric field relaxation layer under the channel forming region and the offset layer connected to the channel forming region and covering a bottom of the trench.

Abstract: An object of the present invention is to provide a three-dimensional photonic crystal which allows an internal formation of a defect structure with an arbitrary shape and size. Multiple holes extending to two different directions are formed obliquely to a base body surface in order to form a first crystal and a second crystal. Base body left between the holes are made to be rods. Moreover, a connection crystal layers is formed by a part of rods having a size different from that of the rods in the first crystal and the second crystal. The connection crystal layer is held between the first crystal and the second crystal and they are fused. In a three-dimensional photonic crystal thus obtained, the rod becomes a point defect. The shape and size of the point defect can be arbitrarily set in any directions within the connection crystal layer. The shape and size of the point defect can also be controlled by adjusting the thickness of the connection crystal layer.

Abstract: A semiconductor device includes: a semiconductor substrate; a lateral MOS transistor disposed in the substrate; a Zener diode disposed in the substrate; and a capacitor disposed in the substrate. The transistor includes a drain and a gate, and the diode and the capacitor are coupled in series between the drain and the gate. This device has minimized dimensions and high switching speed. Further, both of a switching loss and a surge voltage are improved.