Abstract: A diode has a semiconductor layer and cathode and anode electrodes on a surface of the semiconductor layer. The semiconductor layer has cathode and anode regions respectively contacting the cathode and anode electrodes. The anode region has a first diffusion region having high surface concentration, a second diffusion region having intermediate surface concentration, and a third diffusion region having low surface concentration. The first diffusion region is covered with the second and third diffusion regions. The second diffusion region has a first side surface facing the cathode region, a second side surface opposite to the cathode region, and a bottom surface extending between the first and second side surfaces. The third diffusion region covers at least one of the first corner part connecting the first side surface with the bottom surface and the second corner part connecting the second side surface with the bottom surface.

Abstract: A switching circuit includes: a transistor having a first electrode, a second electrode and a control electrode; a zener diode; and a capacitor. A connection between the first electrode and the second electrode is capable of temporally switching between a conduction state and a non-conduction state by switching a control voltage of the transistor. The zener diode and the capacitor are coupled in series between the first electrode and the control electrode of the transistor. The first electrode is a drain or a collector.

Abstract: A receiving device is provided capable of avoiding reception of unnecessary energy when a signal waveform actually changes on a receiving side. An impedance control circuit includes a sensing unit to sense one or more of a voltage, current, or power of a signal to be received by a receiving circuit. The impedance control unit varies an input impedance according to the change in the sensed one or more quantities so that the received signal will be reflected. Thus the excess energy of the signal is reflected and fed to any other receiving circuit achieving stable communications.

Abstract: A magnetic memory according to an embodiment includes: at least one memory cell comprising a magnetoresistive element as a memory element, and first and second electrodes that energize the magnetoresistive element. The magnetoresistive element includes: a first magnetic layer having a variable magnetization direction perpendicular to a film plane; a tunnel barrier layer on the first magnetic layer; and a second magnetic layer on the tunnel barrier layer, and having a fixed magnetization direction perpendicular to the film plane. The first magnetic layer including: a first region; and a second region outside the first region so as to surround the first region, and having a smaller perpendicular magnetic anisotropy energy than that of the first region. The second magnetic layer including: a third region; and a fourth region outside the third region, and having a smaller perpendicular magnetic anisotropy energy than that of the third region.

Abstract: According to one embodiment, a magnetic recording element includes a stacked body including a first stacked unit and a second stacked unit. The first stacked unit includes a first ferromagnetic layer, a second ferromagnetic layer and a first nonmagnetic layer. Magnetization of the first ferromagnetic layer is substantially fixed in a first direction being perpendicular to a first ferromagnetic layer surface. The second stacked unit includes a third ferromagnetic layer, a fourth ferromagnetic layer and a second nonmagnetic layer. Magnetization of the fourth ferromagnetic layer is substantially fixed in a second direction being perpendicular to a fourth ferromagnetic layer surface. The first direction is opposite to the second direction.

Abstract: A N-channel lateral insulated-gate bipolar transistor includes a semiconductor substrate, a drift layer, a collector region, a channel layer, an emitter region, a gate insulation film, a gate electrode, a collector electrode, an emitter electrode. The collector region includes a high impurity concentration region having a high impurity concentration and a low impurity concentration region having a lower impurity concentration than the high impurity concentration region. The collector electrode is in ohmic contact with the high impurity concentration region and in schottky contact with the low impurity concentration region.

Abstract: A transmission apparatus for differential communication includes a driver bridge circuit and a pair of noise protection circuits. The driver bridge circuit includes four output devices that are independently connected between each of a pair of transmission lines and a power line or a ground line. Each noise protection circuit is provided to a corresponding transmission lines. Each noise protection circuit includes a ground potential detector and an impedance controller. The ground potential detector detects a potential of the corresponding transmission line with respect to the ground line. The impedance controller causes an impedance of the corresponding transmission line with respect to the ground line to become equal to an impedance of the other transmission line with respect to the ground line, when the detected potential becomes outside a predetermined potential range.

Abstract: A magnetoresistive element includes a stacked structure including a fixed layer having a fixed direction of magnetization, a recording layer having a variable direction of magnetization, and a nonmagnetic layer sandwiched between the fixed layer and the recording layer, a first protective film covering a circumferential surface of the stacked structure, and made of silicon nitride, and a second protective film covering a circumferential surface of the first protective film, and made of silicon nitride. A hydrogen content in the first protective film is not more than 4 at %, and a hydrogen content in the second protective film is not less than 6 at %.

Abstract: A semiconductor device having a lateral semiconductor element includes a semiconductor substrate, a first electrode on the substrate, a second electrode on the substrate, and an isolation structure located in the substrate to divide the substrate into a first island and a second island electrically insulated from the first island. The lateral semiconductor element includes a main cell located in the first island and a sense cell located in the second island. The main cell causes a first current to flow between the first electrode and the second electrode so that the first current flows in a lateral direction along the surface of the substrate. The first current is detected by detecting a second current flowing though the sense cell.

Abstract: A lateral insulated gate bipolar transistor includes a semiconductor substrate including a drift layer, a collector region, a channel layer, an emitter region, a gate insulating layer, a gate electrode, a collector electrode, an emitter electrode, and a barrier layer. The barrier layer is disposed along either side of the collector region and is located to a depth deeper than a bottom of the channel layer. The barrier layer has an impurity concentration that is higher than an impurity concentration of the drift layer. The barrier layer has a first end close to the collector region and a second end far from the collector region. The first end is located between the channel layer and the collector region, and the second end is located on the bottom of the channel layer.

Abstract: An apparatus is provided for controlling a graphic equalizer which is implemented by digital filters, each being assignable to a frequency band for regulating a level of the frequency band. In the apparatus, a set of control devices are provided in correspondence to respective frequency bands, each control device being operable to specify the level of the corresponding frequency band to either of a reference level or other level than the reference level. An assignment section operates when a number of the digital filters is less than a total number of the frequency bands, for assigning the digital filters to the frequency bands which are specified with the levels other than the reference level. A control section controls remaining digital filters which are not assigned to any of the frequency bands in a through state.

Abstract: A magnetic material of a magnetoresistive element is formed on a lower electrode. An upper electrode is formed on the magnetic material. A resist for nano-imprint lithography is formed on the upper electrode. A first pattern or a second pattern is formed in the resist by setting a first template or a second template into contact with the resist and curing the resist. The first template has the first pattern that corresponds to the magnetoresistive element and the lower electrode. The second template has the second pattern that corresponds to the magnetoresistive element and the upper electrode. The magnetic material and the lower electrode are patterned at the same time by using the resist having the first pattern, or the magnetic material and the upper electrode are patterned at the same time by using the resist having the second pattern.

Abstract: A semiconductor apparatus comprises: a semiconductor substrate; and a lateral type MIS transistor disposed on a surface part of the semiconductor substrate. The lateral type MIS transistor includes: a line coupled with a gate of the lateral type MIS transistor; a polycrystalline silicon resistor that is provided in the line, and that has a conductivity type opposite to a drain of the lateral type MIS transistor; and an insulating layer through which a drain voltage of the lateral type MIS transistor is applied to the polycrystalline silicon resistor.

Abstract: A connector includes: a housing having a plurality of cavities; and a plurality of terminal fittings that are inserted into the cavities individually and respectively, wherein a lance is formed in each of the cavities, the lance having a lock portion to be locked in a corresponding one of the terminal fittings, wherein the cavities are disposed to be aligned in a bending direction of the lances, and wherein an escape portion is provided in the terminal fitting which is inserted into the cavity disposed to be opposed to the back surface, the escape portion being formed to dent an outer surface of the terminal fitting opposed to the back surface of the lance so that at least a part of a back face portion of the lance is allowed to enter the escape portion when the lance bends elastically toward the back face.

Abstract: A switching circuit includes: a transistor having a first electrode, a second electrode and a control electrode; a zener diode; and a capacitor. A connection between the first electrode and the second electrode is capable of temporally switching between a conduction state and a non-conduction state by switching a control voltage of the transistor. The zener diode and the capacitor are coupled in series between the first electrode and the control electrode of the transistor. The first electrode is a drain or a collector.

Abstract: An object of the present invention is to provide a three-dimensional photonic crystal which allows an internal formation of a defect structure with an arbitrary shape and size. Multiple holes extending to two different directions are formed obliquely to a base body surface in order to form a first crystal and a second crystal. Base body left between the holes are made to be rods. Moreover, a connection crystal layer is formed by a part of rods having a size different from that of the rods in the first crystal and the second crystal. The connection crystal layer is held between the first crystal and the second crystal and they are fused. In a three-dimensional photonic crystal thus obtained, the rod becomes a point defect. The shape and size of the point defect can be arbitrarily set in any directions within the connection crystal layer. The shape and size of the point defect can also be controlled by adjusting the thickness of the connection crystal layer.

Abstract: A plasma etching method capable of oblique etching with a high aspect ratio and high uniformity is provided. In the plasma etching method, a base body is etched with a high aspect ratio by the following process: An electric-field control device having an ion-introducing orifice penetrating therethrough in a direction inclined from the normal to the surface of a base body is placed on or above the surface of this base body. Plasma is generated on the surface of the base body on or above which the electric-field control is placed. A potential difference is formed between the plasma and the base body so as to attract ions in the plasma toward the base body.

Abstract: In a transmission device for differential communication, a first cathode-side element part is coupled between a first communication line and a cathode-side power supply line, a second cathode-side element part is coupled between a second communication line and the cathode-side power supply line, a first anode-side element part is coupled between the first communication line and an anode-side power supply line, and a second anode-side element part is coupled between the second communication line and the anode-side power supply line. A driving portion drives the element parts based on transmission data input from an outside. A target potential generating portion generates target potentials of the element parts based on potentials of the first communication line and the second communication line.

Abstract: A method of reduction treatment of metal oxides characterized by using as a material a powder containing metal oxides and containing alkali metals and halogen elements and further, in accordance with need, carbon, mixing said material with water to produce a slurry, then dehydrating this and charging the dehydrated material, mixed with another material in accordance with need, into a rotary hearth type reduction furnace for reduction.

Abstract: A transmission apparatus for differential communication includes a driver bridge circuit and a pair of noise protection circuits. The driver bridge circuit includes four output devices that are independently connected between each of a pair of transmission lines and a power line or a ground line. Each noise protection circuit is provided to a corresponding transmission lines. Each noise protection circuit includes a ground potential detector and an impedance controller. The ground potential detector detects a potential of the corresponding transmission line with respect to the ground line. The impedance controller causes an impedance of the corresponding transmission line with respect to the ground line to become equal to an impedance of the other transmission line with respect to the ground line, when the detected potential becomes outside a predetermined potential range.