Abstract: A semiconductor device includes: a SOI substrate; a semiconductor element having first and second impurity layers disposed in an active layer of the SOI substrate, the second impurity layer surrounding the first impurity layer; and multiple first and second conductive type regions disposed in a part of the active layer adjacent to an embedded insulation film of the SOI substrate. The first and second conductive type regions are alternately arranged. The first and second conductive type regions have a layout, which corresponds to the semiconductor element.

Abstract: In order to provide a spot size converter and a method for making the same which enable the optical connection with low loss and are able to reduce the excess loss for the position misalignment in mounting, a spot size converter according to an exemplary aspect of the present invention includes: a substrate on which an optical waveguide including a first core is laminated and which includes a notch; a core reducing part which is formed so that a cross-section area of the first core may gradually decrease toward an end part of the first core in the direction of light propagation; a second core which surrounds the core reducing part and is made of a material whose refractive index is smaller than that of the first core; a peripheral clad which surrounds the second core and is made of a material whose refractive index is smaller than that of the second core; and a lower clad which is formed in a lower part of the second core and includes the peripheral clad; wherein the lower clad is formed in the notch.

Abstract: According to one embodiment, a method of manufacturing a magnetoresistive element, the method includes forming a first magnetic layer, forming a tunnel barrier layer on the first magnetic layer, forming a second magnetic layer on the tunnel barrier layer, forming a hard mask layer on the second magnetic layer, and patterning the second magnetic layer, the tunnel barrier layer, and the first magnetic layer, with a cluster ion beam using the hard mask layer as a mask, wherein the cluster ion beam comprises cluster ions, cluster sizes of the cluster ions are distributed, and a peak value of the distribution of the cluster sizes is 2 pieces or more and 1000 pieces or less.

Abstract: According to one embodiment, a magnetic memory includes at least one memory cell including a magnetoresistive element, and first and second electrodes. The element includes a first magnetic layer, a tunnel barrier layer, a second magnetic layer, and a third magnetic layer provided on the second magnetic layer and having a magnetization antiparallel to the magnetization direction of the second magnetic layer. A diameter of an upper surface of the first magnetic layer is smaller than that of a lower surface of the tunnel barrier layer. A diameter of a lower surface of the second magnetic layer is not more than that of an upper surface of the tunnel barrier layer.

Abstract: A switching circuit includes: a transistor having a first electrode, a second electrode and a control electrode; a zener diode; and a capacitor. A connection between the first electrode and the second electrode is capable of temporally switching between a conduction state and a non-conduction state by switching a control voltage of the transistor. The zener diode and the capacitor are coupled in series between the first electrode and the control electrode of the transistor. The first electrode is a drain or a collector.

Abstract: According to one embodiment, a magnetic recording element includes a stacked body including a first stacked unit and a second stacked unit. The first stacked unit includes a first ferromagnetic layer, a second ferromagnetic layer and a first nonmagnetic layer. Magnetization of the first ferromagnetic layer is substantially fixed in a first direction being perpendicular to a first ferromagnetic layer surface. The second stacked unit includes a third ferromagnetic layer, a fourth ferromagnetic layer and a second nonmagnetic layer. Magnetization of the fourth ferromagnetic layer is substantially fixed in a second direction being perpendicular to a fourth ferromagnetic layer surface. The first direction is opposite to the second direction.

Abstract: A diode has a semiconductor layer and cathode and anode electrodes on a surface of the semiconductor layer. The semiconductor layer has cathode and anode regions respectively contacting the cathode and anode electrodes. The anode region has a first diffusion region having high surface concentration, a second diffusion region having intermediate surface concentration, and a third diffusion region having low surface concentration. The first diffusion region is covered with the second and third diffusion regions. The second diffusion region has a first side surface facing the cathode region, a second side surface opposite to the cathode region, and a bottom surface extending between the first and second side surfaces. The third diffusion region covers at least one of the first corner part connecting the first side surface with the bottom surface and the second corner part connecting the second side surface with the bottom surface.

Abstract: A connector includes: a housing having a plurality of cavities; and a plurality of terminal fittings that are inserted into the cavities individually and respectively, wherein a lance is formed in each of the cavities, the lance having a lock portion to be locked in a corresponding one of the terminal fittings, wherein the cavities are disposed to be aligned in a bending direction of the lances, and wherein an escape portion is provided in the terminal fitting which is inserted into the cavity disposed to be opposed to the back surface, the escape portion being formed to dent an outer surface of the terminal fitting opposed to the back surface of the lance so that at least a part of a back face portion of the lance is allowed to enter the escape portion when the lance bends elastically toward the back face.

Abstract: A semiconductor device with a lateral element includes a semiconductor substrate, first and second electrodes on the substrate, and a resistive field plate extending from the first electrode to the second electrode. The lateral element passes a current between the first and second electrodes. A voltage applied to the second electrode is less than a voltage applied to the first electrode. The resistive field plate has a first end portion and a second end portion opposite to the first end portion. The second end portion is located closer to the second electrode than the first end portion. An impurity concentration in the second end portion is equal to or greater than 1×1018 cm?3.

Abstract: A receiving device includes a receiving circuit and an impedance control circuit. The receiving circuit receives a signal transmitted through a communication line. The impedance control circuit is coupled with the receiving circuit and has a detecting part. The detecting part detects a physical value of the signal and the physical value includes at least one of a voltage, an electric current, and an electric power. The impedance control circuit changes an input impedance based on the detected value so that a ringing of the signal is reduced.

Abstract: According to one embodiment, a method for manufacturing a nonvolatile memory device including a plurality of memory cells is disclosed. Each of the plurality of memory cells includes a base layer including a first electrode, a magnetic tunnel junction device provided on the base layer, and a second electrode provided on the magnetic tunnel junction device. The magnetic tunnel junction device includes a first magnetic layer, a tunneling barrier layer provided on the first magnetic layer, and a second magnetic layer provided on the tunneling barrier layer. The method can include etching a portion of the second magnetic layer and a portion of the first magnetic layer by irradiating gas clusters onto a portion of a surface of the second magnetic layer or a portion of a surface of the first magnetic layer.

Abstract: A N-channel lateral insulated-gate bipolar transistor includes a semiconductor substrate, a drift layer, a collector region, a channel layer, an emitter region, a gate insulation film, a gate electrode, a collector electrode, an emitter electrode. The collector region includes a high impurity concentration region having a high impurity concentration and a low impurity concentration region having a lower impurity concentration than the high impurity concentration region. The collector electrode is in ohmic contact with the high impurity concentration region and in schottky contact with the low impurity concentration region.

Abstract: In a transmission device for differential communication, a first cathode-side element part is coupled between a first communication line and a cathode-side power supply line, a second cathode-side element part is coupled between a second communication line and the cathode-side power supply line, a first anode-side element part is coupled between the first communication line and an anode-side power supply line, and a second anode-side element part is coupled between the second communication line and the anode-side power supply line. A driving portion drives the element parts based on transmission data input from an outside. A target potential generating portion generates target potentials of the element parts based on potentials of the first communication line and the second communication line.

Abstract: A method of reduction treatment of metal oxides characterized by using as a material a powder containing metal oxides and containing alkali metals and halogen elements and further, in accordance with need, carbon, mixing the material with water to produce a slurry, then dehydrating this and charging the dehydrated material, mixed with another material in accordance with need, into a rotary hearth type reduction furnace for reduction.

Abstract: According to one embodiment, a method of manufacturing a multilayer film, the method includes forming a first layer, forming a second layer on the first layer, and transcribing a crystal information of one of the first and second layers to the other one of the first and second layers by executing a GCIB-irradiation to the second layer.

Abstract: According to one embodiment, a method of manufacturing a magnetic memory, the method includes forming a first magnetic layer having a variable magnetization, forming a tunnel barrier layer on the first magnetic layer, forming a second magnetic layer on the tunnel barrier layer, the second magnetic layer having an invariable magnetization, forming a hard mask layer as a mask on the second magnetic layer, patterning the second magnetic layer by using the mask of the hard mask layer, and executing a GCIB-irradiation by using the mask of the hard mask layer, after the patterning.

Abstract: According to one embodiment, a magnetic memory includes at least one memory cell including a magnetoresistive element, and first and second electrodes. The element includes a first magnetic layer, a tunnel barrier layer, a second magnetic layer, and a third magnetic layer provided on the second magnetic layer and having a magnetization antiparallel to the magnetization direction of the second magnetic layer. A diameter of an upper surface of the first magnetic layer is smaller than that of a lower surface of the tunnel barrier layer. A diameter of a lower surface of the second magnetic layer is not more than that of an upper surface of the tunnel barrier layer.

Abstract: A signal receiver includes: a receiving circuit that receives a differential signal via a transmission line, which includes a pair of signal wires for transmitting the differential signal; and an impedance control circuit that controls an input impedance so as to reduce a common mode noise. The impedance control circuit includes a detection element for detecting at least one of a voltage, a current and an electric power of the common mode noise. The impedance control circuit controls the input impedance in accordance with change of the at least one of the voltages the current and the electric power of the common mode noise.

Abstract: A switching circuit includes: a transistor having a first electrode, a second electrode and a control electrode; a zener diode; and a capacitor. A connection between the first electrode and the second electrode is capable of temporally switching between a conduction state and a non-conduction state by switching a control voltage of the transistor. The zener diode and the capacitor are coupled in series between the first electrode and the control electrode of the transistor. The first electrode is a drain or a collector.

Abstract: A diode has a semiconductor layer and cathode and anode electrodes on a surface of the semiconductor layer. The semiconductor layer has cathode and anode regions respectively contacting the cathode and anode electrodes. The anode region has a first diffusion region having high surface concentration, a second diffusion region having intermediate surface concentration, and a third diffusion region having low surface concentration. The first diffusion region is covered with the second and third diffusion regions. The second diffusion region has a first side surface facing the cathode region, a second side surface opposite to the cathode region, and a bottom surface extending between the first and second side surfaces. The third diffusion region covers at least one of the first corner part connecting the first side surface with the bottom surface and the second corner part connecting the second side surface with the bottom surface.