Patents by Inventor Shigeki Takahashi

Shigeki Takahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9136362
    Abstract: A semiconductor device with a lateral element includes a semiconductor substrate, first and second electrodes on the substrate, and a resistive field plate extending from the first electrode to the second electrode. The lateral element passes a current between the first and second electrodes. A voltage applied to the second electrode is less than a voltage applied to the first electrode. The resistive field plate has a first end portion and a second end portion opposite to the first end portion. The second end portion is located closer to the second electrode than the first end portion. An impurity concentration in the second end portion is equal to or greater than 1×1018 cm?3.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: September 15, 2015
    Assignee: DENSO CORPORATION
    Inventors: Takeshi Sakai, Akira Yamada, Shigeki Takahashi, Youichi Ashida, Satoshi Shiraki
  • Publication number: 20150253471
    Abstract: A rib waveguide type high-order mode filter includes a plate-like slab region 1; a projection portion 2 formed in a stripe along a waveguiding direction of light on the slab region 1; and a mesa region 4 having a bottom surface positioned at the same level as that of the bottom surface of the slab region 1 and a top surface positioned at a higher level than that of the top surface of the slab region 1, on at least one side of the slab region 1, wherein the projection portion 2, the slab region 1, and the mesa region 4 are made of the same material; and the mesa region 4 includes a doped area 4a in which an optical-absorption function is added by impurity doping into the material.
    Type: Application
    Filed: June 18, 2013
    Publication date: September 10, 2015
    Inventor: Shigeki Takahashi
  • Patent number: 9082961
    Abstract: According to one embodiment, a method of manufacturing a multilayer film, the method includes forming a first layer, forming a second layer on the first layer, and transcribing a crystal information of one of the first and second layers to the other one of the first and second layers by executing a GCIB-irradiation to the second layer.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: July 14, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yuichi Ohsawa, Shigeki Takahashi, Junichi Ito, Daisuke Saida, Kyoichi Suguro, Hiroaki Yoda
  • Publication number: 20150188034
    Abstract: A magnetic tunnel junction device includes: a first magnetic layer that has an easy axis vertical to a surface; a non-magnetic layer on the first magnetic layer; and a second magnetic layer that has an easy axis vertical to a surface on the non-magnetic layer, and an interface layer formed of a Heussler alloy between the non-magnetic layer and at least one of the first and second magnetic layers. The at least one of the first and second magnetic layers is formed of MnGa. A lattice constant of the interface layer parallel to a major surface thereof in a bulk state thereof is between a lattice constant of the non-magnetic layer parallel to a major surface thereof in a bulk state thereof and a lattice constant of the at least one of the first and second magnetic layers parallel to a major surface thereof in a bulk state thereof.
    Type: Application
    Filed: December 22, 2014
    Publication date: July 2, 2015
    Inventors: Shigeki Takahashi, Yoshiaki Sonobe, Koki Takanashi
  • Patent number: 8986558
    Abstract: A plasma etching method capable of oblique etching with a high aspect ratio and high uniformity is provided. In the plasma etching method, a base body is etched with a high aspect ratio by the following process: An electric-field control device having an ion-introducing orifice penetrating therethrough in a direction inclined from the normal to the surface of a base body is placed on or above the surface of this base body. Plasma is generated on the surface of the base body on or above which the electric-field control is placed. A potential difference is formed between the plasma and the base body so as to attract ions in the plasma toward the base body.
    Type: Grant
    Filed: August 27, 2009
    Date of Patent: March 24, 2015
    Assignee: Japan Science and Technology Agency
    Inventors: Susumu Noda, Shigeki Takahashi
  • Patent number: 8981507
    Abstract: According to one embodiment, a method for manufacturing a nonvolatile memory device including a plurality of memory cells is disclosed. Each of the plurality of memory cells includes a base layer including a first electrode, a magnetic tunnel junction device provided on the base layer, and a second electrode provided on the magnetic tunnel junction device. The magnetic tunnel junction device includes a first magnetic layer, a tunneling barrier layer provided on the first magnetic layer, and a second magnetic layer provided on the tunneling barrier layer. The method can include etching a portion of the second magnetic layer and a portion of the first magnetic layer by irradiating gas clusters onto a portion of a surface of the second magnetic layer or a portion of a surface of the first magnetic layer.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: March 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeki Takahashi, Kyoichi Suguro, Junichi Ito, Yuichi Ohsawa, Hiroaki Yoda
  • Publication number: 20150049978
    Abstract: In a region in which silicon semiconductor layers having first and second conductive types are stacked, a concavoconvex structure including a Si1-xGex (x=0.01 to 0.9) layer is formed on a surface of the first silicon semiconductor layer, a relatively thin dielectric is formed on the concavoconvex structure, and a silicon semiconductor layer having the second conductive type is further stacked.
    Type: Application
    Filed: March 14, 2013
    Publication date: February 19, 2015
    Inventors: Junichi Fujikata, Shigeki Takahashi
  • Patent number: 8854033
    Abstract: A semiconductor device having a lateral semiconductor element includes a semiconductor substrate, a first electrode on the substrate, a second electrode on the substrate, and an isolation structure located in the substrate to divide the substrate into a first island and a second island electrically insulated from the first island. The lateral semiconductor element includes a main cell located in the first island and a sense cell located in the second island. The main cell causes a first current to flow between the first electrode and the second electrode so that the first current flows in a lateral direction along the surface of the substrate. The first current is detected by detecting a second current flowing though the sense cell.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: October 7, 2014
    Assignee: DENSO CORPORATION
    Inventors: Satoshi Shiraki, Norihito Tokura, Shigeki Takahashi, Masahiro Yamamoto, Akira Yamada, Hiroyasu Kudo, Youichi Ashida, Akio Nakagawa
  • Publication number: 20140286606
    Abstract: A high-order mode filter includes a slab region, a band-shaped projection elongated in an optical waveguide direction, a first optical waveguide including a disturbance element and a second optical waveguide. The disturbance element is formed by doping impurities into the slab region, thus indicating a lower refractive index than the slab region. Both the first optical waveguide and the second optical waveguide are alternately arranged. The first optical waveguide may include a disturbance element positioned close to the projection, while the second optical waveguide may include a disturbance element distanced from the projection in the slab region. The high-order mode filter causes a large high-order mode loss due to interference between a removable high-order mode and an intentional high-order mode at the connecting face between the first optical waveguide and the second optical waveguide, thus reducing reflected light and stray light.
    Type: Application
    Filed: November 29, 2012
    Publication date: September 25, 2014
    Applicant: NEC Corporation
    Inventor: Shigeki Takahashi
  • Patent number: 8791500
    Abstract: A semiconductor device having a lateral insulated gate bipolar transistor includes a first conductivity type drift layer, a second conductivity type collector region formed in a surface portion of the drift layer, a second conductivity type channel layer formed in the surface portion of the drift layer, a first conductivity type emitter region formed in a surface portion of the channel layer, and a hole stopper region formed in the drift layer and located between the collector region and the emitter region. Holes are injected from the collector region into the drift layer and flow toward the emitter region through a hole path. The hole stopper region blocks a flow of the holes and narrows the hole path to concentrate the holes.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: July 29, 2014
    Assignee: DENSO CORPORATION
    Inventors: Youichi Ashida, Shigeki Takahashi
  • Patent number: 8791690
    Abstract: A semiconductor device having a lateral semiconductor element includes a semiconductor substrate, a first electrode on the substrate, a second electrode on the substrate, and an isolation structure located in the substrate to divide the substrate into a first island and a second island electrically insulated from the first island. The lateral semiconductor element includes a main cell located in the first island and a sense cell located in the second island. The main cell causes a first current to flow between the first electrode and the second electrode so that the first current flows in a lateral direction along the surface of the substrate. The first current is detected by detecting a second current flowing though the sense cell.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: July 29, 2014
    Assignee: DENSO CORPORATION
    Inventors: Satoshi Shiraki, Norihito Tokura, Shigeki Takahashi, Masahiro Yamamoto, Akira Yamada, Hiroyasu Kudo, Youichi Ashida, Akio Nakagawa
  • Publication number: 20140206106
    Abstract: A magnetic memory according to an embodiment includes: at least one memory cell comprising a magnetoresistive element as a memory element, and first and second electrodes that energize the magnetoresistive element. The magnetoresistive element includes: a first magnetic layer having a variable magnetization direction perpendicular to a film plane; a tunnel barrier layer on the first magnetic layer; and a second magnetic layer on the tunnel barrier layer, and having a fixed magnetization direction perpendicular to the film plane. The first magnetic layer including: a first region; and a second region outside the first region so as to surround the first region, and having a smaller perpendicular magnetic anisotropy energy than that of the first region. The second magnetic layer including: a third region; and a fourth region outside the third region, and having a smaller perpendicular magnetic anisotropy energy than that of the third region.
    Type: Application
    Filed: March 24, 2014
    Publication date: July 24, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shigeki Takahashi, Yuichi Ohsawa, Junichi Ito, Chikayoshi Kamata, Saori Kashiwada, Minoru Amano, Hiroaki Yoda
  • Patent number: 8780269
    Abstract: A television (100) includes: a receiving section (202) for receiving additional information which is added to and transmitted along with a broadcast content; a processing section (222) for processing additional information so that a mobile device (120) can obtain information that is specific to unique information which the television (100) has; and a transmitting section (224) for transmitting processed additional information.
    Type: Grant
    Filed: April 2, 2012
    Date of Patent: July 15, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shigeki Takahashi, Daiki Ogasawara, Katsuo Doi, Yasunori Yamashita, Masafumi Hirata
  • Patent number: 8716034
    Abstract: According to one embodiment, a method of manufacturing a magnetic memory, the method includes forming a first magnetic layer having a variable magnetization, forming a tunnel barrier layer on the first magnetic layer, forming a second magnetic layer on the tunnel barrier layer, the second magnetic layer having an invariable magnetization, forming a hard mask layer as a mask on the second magnetic layer, patterning the second magnetic layer by using the mask of the hard mask layer, and executing a GCIB-irradiation by using the mask of the hard mask layer, after the patterning.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: May 6, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuichi Ohsawa, Shigeki Takahashi, Junichi Ito, Daisuke Saida, Kyoichi Suguro, Hiroaki Yoda
  • Publication number: 20140118068
    Abstract: An amplification output control device includes: a determination unit that determines whether or not a gain of a power amplifier varies based on a monitor value of input power from a driver amplifier to the power amplifier, and, when determining that the gain varies, outputs a monitor value of output power of the power amplifier to a driver control unit to cause the driver control unit to execute control of a bias voltage of the driver amplifier; and a control unit that determines whether or not the gain varies based on the monitor value of the output power of the power amplifier when determining that the gain does not vary based on the monitor value of the input power to the power amplifier, and, when determining that the gain varies, controls the bias voltage of the power amplifier.
    Type: Application
    Filed: September 11, 2013
    Publication date: May 1, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Katsuhiko KAWASAKI, Mitsuhiko MANPO, Shigeki TAKAHASHI
  • Patent number: 8710605
    Abstract: A magnetic memory according to an embodiment includes: at least one memory cell comprising a magnetoresistive element as a memory element, and first and second electrodes that energize the magnetoresistive element. The magnetoresistive element includes: a first magnetic layer having a variable magnetization direction perpendicular to a film plane; a tunnel barrier layer on the first magnetic layer; and a second magnetic layer on the tunnel barrier layer, and having a fixed magnetization direction perpendicular to the film plane. The first magnetic layer including: a first region; and a second region outside the first region so as to surround the first region, and having a smaller perpendicular magnetic anisotropy energy than that of the first region. The second magnetic layer including: a third region; and a fourth region outside the third region, and having a smaller perpendicular magnetic anisotropy energy than that of the third region.
    Type: Grant
    Filed: September 13, 2011
    Date of Patent: April 29, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeki Takahashi, Yuichi Ohsawa, Junichi Ito, Chikayoshi Kamata, Saori Kashiwada, Minoru Amano, Hiroaki Yoda
  • Publication number: 20140105544
    Abstract: An optical waveguide type optical terminator forms an optical waveguide structure including at least an optical absorption core (103) which is formed on a clad layer (102) and includes a portion composed of silicon in which an impurity of 1019 cm?3 or more is doped, and is used by being optically connected in series with an optical waveguide including a core (105) composed of silicon. The optical absorption core (103) is sufficient provided that, at least, an impurity of around 1019 cm?3 is doped therein. For example, its impurity concentration is sufficient provided that it falls within a range of 1019 -1020 cm?3. The existence of this impurity causes absorption of light in the optical absorption core (103).
    Type: Application
    Filed: May 10, 2012
    Publication date: April 17, 2014
    Applicant: NEC Corporation
    Inventors: Jun Ushida, Shigeru Nakamura, Shigeki Takahashi
  • Publication number: 20140070271
    Abstract: A lateral insulated gate bipolar transistor includes a semiconductor substrate including a drift layer, a collector region, a channel layer, an emitter region, a gate insulating layer, a gate electrode, a collector electrode, an emitter electrode, and a barrier layer. The barrier layer is disposed along either side of the collector region and is located to a depth deeper than a bottom of the channel layer. The barrier layer has an impurity concentration that is higher than an impurity concentration of the drift layer. The barrier layer has a first end close to the collector region and a second end far from the collector region. The first end is located between the channel layer and the collector region, and the second end is located on the bottom of the channel layer.
    Type: Application
    Filed: November 12, 2013
    Publication date: March 13, 2014
    Applicant: DENSO CORPORATION
    Inventors: Shigeki TAKAHASHI, Norihito TOKURA, Satoshi SHIRAKI, Youichi ASHIDA, Akio NAKAGAWA
  • Publication number: 20140048911
    Abstract: A lateral semiconductor device includes a semiconductor layer, an insulating layer, and a resistive field plate. The semiconductor layer includes a first semiconductor region and a second semiconductor region at a surface portion, and the second semiconductor region makes a circuit around the first semiconductor region. The insulating layer is formed on a surface of the semiconductor layer and is disposed between the first and second semiconductor regions. The resistive field plate is formed on a surface of the insulating layer. Between the first and second semiconductor regions, a first section and a second section are adjacent to each other along a circumferential direction around the first semiconductor region. The resistive field plate includes first and second resistive field plate sections respectively formed in the first and second sections, and the first and second resistive field plate sections are separated from each other.
    Type: Application
    Filed: May 10, 2012
    Publication date: February 20, 2014
    Applicant: DENSO CORPORATION
    Inventors: Takashi Suzuki, Norihito Tokura, Satoshi Shiraki, Shigeki Takahashi, Youichi Ashida, Akira Yamada
  • Publication number: 20140016036
    Abstract: A television (100) includes: a receiving section (202) for receiving additional information which is added to and transmitted along with a broadcast content; a processing section (222) for processing additional information so that a mobile device (120) can obtain information that is specific to unique information which the television (100) has; and a transmitting section (224) for transmitting processed additional information.
    Type: Application
    Filed: April 2, 2012
    Publication date: January 16, 2014
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Shigeki Takahashi, Daiki Ogasawara, Katsuo Doi, Yasunori Yamashita, Masafumi Hirata