Patents by Inventor Shunpei Yamazaki

Shunpei Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240065038
    Abstract: A display device in which a puddle in the vicinity of a partition of a light-emitting element is reduced when a light-emitting layer is formed by a wet process is provided. The display device includes a first anode; a second anode adjacent to the first anode in an X direction; a third anode adjacent to the first anode in a Y direction; a hole-injection layer provided across the first anode to the third anode; a partition provided over the hole-injection layer; a first light-emitting layer; a second light-emitting layer; a third light-emitting layer; and a cathode. The partition includes, in a top view, a first region positioned between the first anode and the third anode and extending in the X direction, and a second region positioned between the first anode and the second anode and extending in the Y direction. The height of the first region is larger than the height of the second region in a cross-sectional view of the partition.
    Type: Application
    Filed: January 17, 2022
    Publication date: February 22, 2024
    Inventors: Shunpei YAMAZAKI, Satoshi SEO
  • Patent number: 11908949
    Abstract: A semiconductor device with a high on-state current is provided. The semiconductor device includes a first oxide, a second oxide over the first oxide, a third oxide over the second oxide, a first insulator over the third oxide, a conductor over the first insulator, a second insulator in contact with the second oxide and the third oxide, and a third insulator over the second insulator; the second oxide includes first region to fifth regions; the resistance of the first region and the resistance of the second region are lower than the resistance of the third region; the resistance of the fourth region and the resistance of the fifth region are lower than the resistance of the third region and higher than the resistance of the first region and the resistance of the second region; and the conductor is provided over the third region, the fourth region, and the fifth region to overlap with the third region, the fourth region, and the fifth region.
    Type: Grant
    Filed: December 8, 2022
    Date of Patent: February 20, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuki Hata, Katsuaki Tochibayashi, Junpei Sugao, Shunpei Yamazaki
  • Patent number: 11908850
    Abstract: A display device with high resolution is provided. A display device with high display quality is provided. The display device includes a substrate, an insulating layer, a plurality of transistors, and a plurality of light-emitting diodes. The plurality of light-emitting diodes are provided in a matrix over the substrate. Each of the plurality of transistors is electrically connected to at least one of the plurality of light-emitting diodes. The plurality of light-emitting diodes are positioned closer to the substrate than the plurality of transistors are. The plurality of light-emitting diodes emit light toward the substrate. Each of the plurality of transistors includes a metal oxide layer and a gate electrode. The metal oxide layer includes a channel formation region. The top surface of the gate electrode is substantially level with the top surface of the insulating layer.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: February 20, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Koji Kusunoki, Shingo Eguchi, Takayuki Ikeda
  • Patent number: 11906826
    Abstract: Disclosed is a liquid crystal display device which can be used in a variety of situations and applications. The liquid crystal display device comprises: a first substrate comprising a first display region, a second display region, and a third display region wherein the first display region, the second display region, and the third display region are continuously formed; a second substrate having a form which fits the first substrate; and a liquid crystal interposed between the first substrate and the second substrate. The second display region is interposed between the first display region and the second display region. The second display region is curved, and the first display region and the second display region are substantially flat.
    Type: Grant
    Filed: January 5, 2023
    Date of Patent: February 20, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Tetsuji Ishitani
  • Publication number: 20240055299
    Abstract: A semiconductor device which has favorable electrical characteristics and can be highly integrated is provided. The semiconductor device includes a first insulator; an oxide over the first insulator; a second insulator over the oxide; a first conductor over the second insulator; a third insulator in contact with a top surface of the first insulator, a side surface of the oxide, a top surface of the oxide, a side surface of the second insulator, and a side surface of the first conductor; and a fourth insulator over the third insulator. The third insulator includes an opening exposing the first insulator, and the fourth insulator is in contact with the first insulator through the opening.
    Type: Application
    Filed: October 24, 2023
    Publication date: February 15, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Toshihiko TAKEUCHI, Tsutomu MURAKAWA, Hiroki KOMAGATA, Daisuke MATSUBAYASHI, Noritaka ISHIHARA, Yusuke NONAKA
  • Publication number: 20240057428
    Abstract: A high-resolution or high-definition display device is provided.
    Type: Application
    Filed: January 7, 2022
    Publication date: February 15, 2024
    Inventors: Shunpei YAMAZAKI, Takayuki IKEDA, Kenichi OKAZAKI, Yasumasa YAMANE, Hajime KIMURA, Tatsuya ONUKI
  • Publication number: 20240054955
    Abstract: A display device driven at high speed is provided. The display device includes pixels, a first signal line, a second signal line, a scan line, and an insulating layer. The first signal line includes a region overlapping with the second signal line with the insulating layer therebetween. The pixels each include a first transistor and a second transistor. The first signal line functions as one of a source and a drain of the first transistor in each of pixels in one column including a first pixel. In the first pixel, the first transistor includes a first semiconductor layer. The first semiconductor layer includes a region in contact with a sidewall of a first opening in the insulating layer. The second signal line functions as one of a source and a drain of the second transistor in each of the pixels in one row including the first pixel.
    Type: Application
    Filed: July 28, 2023
    Publication date: February 15, 2024
    Inventors: Hajime KIMURA, Shunpei YAMAZAKI
  • Publication number: 20240057422
    Abstract: A high-resolution display device is provided. A display device having both high display quality and high resolution is provided. The display device includes a plurality of first light-emitting elements and a plurality of second light-emitting elements. The first light-emitting element comprises a first pixel electrode, a first EL layer, a common layer, and a common electrode. The second light-emitting element comprises a second pixel electrode, a second EL layer, the common layer, and the common electrode. The first EL layer and the second EL layer are provided to be apart from each other, and a side surface of the first EL layer and a side surface of the second EL layer are provided to face each other. A first light-emitting unit, a first intermediate layer, and a second light-emitting unit are stacked in the first EL layer. A third light-emitting unit, a second intermediate layer, and a fourth light-emitting unit are stacked in the second EL layer.
    Type: Application
    Filed: January 19, 2022
    Publication date: February 15, 2024
    Inventors: Shunpei YAMAZAKI, Satoshi SEO, Kenichi OKAZAKI
  • Publication number: 20240057453
    Abstract: A highly reliable display device is provided. The display device including a light-emitting element and an insulating layer placed to cover the light-emitting element and the light-emitting element includes a first conductive layer, an EL layer over the first conductive layer, and a second conductive layer over the EL layer and the insulating layer includes a first layer, a second layer over the first layer, and a third layer over the second layer and the first layer has a function of capturing or fixing at least one of water and oxygen, the second layer has a function of inhibiting diffusion of at least one of water and oxygen, and the third layer has a higher concentration of carbon than at least one of the first layer and the second layer.
    Type: Application
    Filed: January 5, 2022
    Publication date: February 15, 2024
    Inventors: Shunpei YAMAZAKI, Yasuhiro JINBO, Yasumasa YAMANE
  • Publication number: 20240055436
    Abstract: One embodiment of the present invention provides a highly reliably display device in which a high mobility is achieved in an oxide semiconductor. A first oxide component is formed over a base component. Crystal growth proceeds from a surface toward an inside of the first oxide component by a first heat treatment, so that a first oxide crystal component is formed in contact with at least part of the base component. A second oxide component is formed over the first oxide crystal component. Crystal growth is performed by a second heat treatment using the first oxide crystal component as a seed, so that a second oxide crystal component is formed. Thus, a stacked oxide material is formed. A transistor with a high mobility is formed using the stacked oxide material and a driver circuit is formed using the transistor.
    Type: Application
    Filed: August 8, 2023
    Publication date: February 15, 2024
    Inventors: Jun KOYAMA, Shunpei YAMAZAKI
  • Publication number: 20240057462
    Abstract: Manufacturing equipment of a display device that is capable of successively performing steps from formation of a pixel circuit up to formation of a light-emitting element is provided. The manufacturing equipment includes a manufacturing apparatus of a light-emitting device that is capable of successively performing a film formation step, a lithography step, an etching step, and a sealing step for formation of an organic EL element and a manufacturing apparatus for formation of a pixel circuit that drives the organic EL element. Formation from the pixel circuit up to the organic EL element can be performed successively, so that a display device with a high yield and high reliability can be formed.
    Type: Application
    Filed: December 15, 2021
    Publication date: February 15, 2024
    Inventors: Shingo EGUCHI, Hiroki ADACHI, Kenichi OKAZAKI, Yasumasa YAMANE, Naoto KUSUMOTO, Kensuke YOSHIZUMI, Shunpei YAMAZAKI
  • Publication number: 20240057404
    Abstract: A high-resolution display device is provided. A display device with both high display quality and high resolution is provided. The display device includes a first light-emitting element and a second light-emitting element. The first light-emitting element includes a first pixel electrode, a first EL layer, and a common electrode. The second light-emitting element includes a second pixel electrode, a second EL layer, and the common electrode. An insulating layer is included between the first pixel electrode and the second pixel electrode. The insulating layer includes a first region overlapping with the first EL layer, a second region overlapping with the second EL layer, and a third region positioned between the first region and the second region. A side surface of the first EL layer and a side surface of the second EL layer are positioned over the insulating layer and are provided to face each other.
    Type: Application
    Filed: January 17, 2022
    Publication date: February 15, 2024
    Inventors: Shunpei YAMAZAKI, Takayuki IKEDA, Kenichi OKAZAKI, Yasumasa YAMANE
  • Publication number: 20240055533
    Abstract: To provide a transistor having a favorable electric characteristics and high reliability and a display device including the transistor. The transistor is a bottom-gate transistor formed using an oxide semiconductor for a channel region. An oxide semiconductor layer subjected to dehydration or dehydrogenation through heat treatment is used as an active layer. The active layer includes a first region of a superficial portion microcrystallized and a second region of the rest portion. By using the oxide semiconductor layer having such a structure, a change to an n-type, which is attributed to entry of moisture to the superficial portion or elimination of oxygen from the superficial portion, and generation of a parasitic channel can be suppressed. In addition, contact resistance between the oxide semiconductor layer and source and drain electrodes can be reduced.
    Type: Application
    Filed: October 25, 2023
    Publication date: February 15, 2024
    Inventors: Shunpei YAMAZAKI, Masayuki SAKAKURA, Ryosuke WATANABE, Junichiro SAKATA, Kengo AKIMOTO, Akiharu MIYANAGA, Takuya HIROHASHI, Hideyuki KISHIDA
  • Publication number: 20240053961
    Abstract: An adder circuit inhibiting overflow is provided. A first memory, a second memory, a third memory, and a fourth memory are included. A step of supplying first data with a sign to the first memory and supplying the first data with a positive sign stored in the first memory, to the second memory; a step of supplying the first data with a negative sign stored in the second memory, to the third memory; a step of generating second data by adding the first data with a positive sign stored in the second memory and the first data with a negative sign stored in the third memory; and a step of storing the second data in the fourth memory are included. When the second data stored in the fourth memory are all second data with a positive sign or all second data with a negative sign, all the second data stored in the fourth memory are added.
    Type: Application
    Filed: September 6, 2023
    Publication date: February 15, 2024
    Inventors: Shunpei YAMAZAKI, Hajime KIMURA, Takahiro FUKUTOME
  • Publication number: 20240057464
    Abstract: Manufacturing equipment of a light-emitting device with which steps from formation to sealing of a light-emitting element can be successively performed can be provided. In the manufacturing equipment of a light-emitting device, a deposition step, a lithography step, an etching step, and a sealing step by forming a protective layer for forming an organic EL element can be successively performed, whereby a downscaled organic EL element achieving high luminance and high reliability can be formed. Moreover, the manufacturing equipment can have an in-line system where apparatuses are arranged in the order of process steps for the light-emitting device, resulting in high throughput manufacturing.
    Type: Application
    Filed: January 7, 2022
    Publication date: February 15, 2024
    Inventors: Shingo EGUCHI, Hiroki ADACHI, Kenichi OKAZAKI, Yasumasa YAMANE, Naoto KUSUMOTO, Kensuke YOSHIZUMI, Shunpei YAMAZAKI
  • Publication number: 20240057382
    Abstract: A novel display device is provided. The display device includes a first layer, a second layer, and a third layer. The first layer, the second layer, and the third layer are provided in different layers. The first layer includes a driver circuit and a functional circuit. The second layer includes a pixel circuit. The third layer includes a display element. The pixel circuit has a function of controlling light emission of the display element. The driver circuit has a function of controlling the pixel circuit. The functional circuit has a function of controlling the driver circuit. The first layer includes a first transistor with a semiconductor layer containing silicon in a channel formation region. The second layer includes a second transistor with a semiconductor layer containing a metal oxide in a channel formation region.
    Type: Application
    Filed: January 6, 2022
    Publication date: February 15, 2024
    Inventors: Shunpei YAMAZAKI, Takayuki IKEDA, Tatsuya ONUKI
  • Patent number: 11899886
    Abstract: An electronic device having a novel structure is provided. A battery is provided in each component of an electronic device, whereby the electronic device includes two batteries. The electronic device including the two batteries and a display portion that can be called a flexible display and has a plurality of foldable portions is provided as a novel device.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: February 13, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Ishikawa
  • Patent number: 11899328
    Abstract: The display device includes a first substrate provided with a driver circuit region that is located outside and adjacent to a pixel region and includes at least one second transistor which supplies a signal to the first transistor in each of the pixels in the pixel region, a second substrate facing the first substrate, a liquid crystal layer between the first substrate and the second substrate, a first interlayer insulating film including an inorganic insulating material over the first transistor and the second transistor, a second interlayer insulating film including an organic insulating material over the first interlayer insulating film, and a third interlayer insulating film including an inorganic insulating material over the second interlayer insulating film. The third interlayer insulating film is provided in part of an upper region of the pixel region, and has an edge portion on an inner side than the driver circuit region.
    Type: Grant
    Filed: November 28, 2022
    Date of Patent: February 13, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuharu Hosaka, Yukinori Shima, Kenichi Okazaki, Shunpei Yamazaki
  • Patent number: 11899478
    Abstract: A low-power semiconductor device is provided. A retention transistor is provided between a control circuit and an output transistor. An output terminal of the control circuit is electrically connected to one of a source and a drain of the retention transistor, and the other of the source and the drain of the retention transistor is electrically connected to a gate of the output transistor. A node to which the other of the source and the drain of the retention transistor and the gate of the output transistor are electrically connected is a retention node. When the retention transistor is in an on state, a potential corresponding to a potential output from the control circuit is written to the retention node. Then, when the retention transistor is in an off state, the potential of the retention node is retained. Thus, a gate potential of the output transistor can be kept at a constant value even when the control circuit is off.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: February 13, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Keita Sato, Yuto Yakubo, Yoshiaki Oikawa, Shunpei Yamazaki
  • Publication number: 20240047655
    Abstract: A secondary battery has a high capacity and little deterioration can be provided. Alternatively, a novel power storage device is provided. The secondary battery includes a positive electrode and a negative electrode. The negative electrode includes a first active material, a second active material, and a graphene compound. At least part of a surface of the first active material includes a region covered with the second active material. A surface of the second active material and at least part of the surface of the first active material each include a region covered with the graphene compound. The first active material includes graphite. The second active material includes silicon. The capacity of the positive electrode is greater than or equal to 50% and less than 100% of the capacity of the negative electrode.
    Type: Application
    Filed: December 3, 2021
    Publication date: February 8, 2024
    Inventors: Kazutaka KURIKI, Taisuke NAKAO, Teruaki OCHIAI, Tatsuyoshi TAKAHASHI, Shunpei YAMAZAKI