Patents by Inventor Stuart Allen

Stuart Allen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160179374
    Abstract: An information handling system includes a processor having a plurality of memory channels. The information handling system also includes a plurality of dual inline memory modules non-symmetrically populated on the memory channels. The dual inline memory modules are divided by bank to create a plurality of interleave groups, and each of the interleave groups spans across all of the memory channels of the processor.
    Type: Application
    Filed: December 19, 2014
    Publication date: June 23, 2016
    Inventor: Stuart Allen Berke
  • Publication number: 20160149495
    Abstract: In accordance with embodiments of the present disclosure, a voltage rectifier may include an alternating-current-to-direct-current (AC/DC) converter configured to convert an alternating current (AC) source voltage to a first direct current (DC) voltage and a direct-current-to-direct-current (DC/DC) converter configured to convert the first DC voltage to a second DC voltage for delivery to a load of the voltage rectifier, wherein the DC/DC converter is configured to operate in a plurality of operating modes in response to a failure of the AC source voltage. The plurality of operating modes may include a first hold-up mode in which a gain of the DC/DC converter is a first gain and a second hold-up mode in which the gain of the DC/DC converter is a second gain.
    Type: Application
    Filed: November 24, 2014
    Publication date: May 26, 2016
    Inventors: Stuart Allen Berke, Mehran Mirjafari, Lei Wang
  • Publication number: 20160132240
    Abstract: Systems and methods are provided for supporting use of non-volatile memory (NVM) on a double data rate (DDR) memory channel for an information handling system so that non-volatile memory devices (e.g., such as Phase Change Memory “PCM” devices) may be employed for main memory usage. In one possible implementation, information handling system memory reads may be managed directly in hardware as memory semantics via use code, while memory writes may be separately handled, e.g., via an operating system (OS)/driver. In another possible implementation, both DRAM-based and NVM-based memory systems may be populated for an information handling system.
    Type: Application
    Filed: January 18, 2016
    Publication date: May 12, 2016
    Inventors: Stuart Allen Berke, Shawn J. Dube
  • Publication number: 20160134443
    Abstract: A receiver includes a plurality of equalization modules each configurable to provide a selectable compensation value to a data bit stream received by the receiver, and a control module configured perform a plurality of back channel adaptations on the data bitstream to achieve a target bit error rate for the receiver, each back channel adaptation being associated with a set of compensation values of the equalization modules, determine a most common set of compensation values derived from the performance of the plurality of back channel adaptations, and determine an optimized set of compensation values based on the most common set of compensation values.
    Type: Application
    Filed: November 6, 2014
    Publication date: May 12, 2016
    Inventors: Stuart Allen Berke, Bhyrav M. Mutnury, Minchuan Wang
  • Publication number: 20160105296
    Abstract: A receiver includes first and second equalization modules adapted to provide first and second compensations to a data signal, and a control module including a list that identifies the first equalization module as being less efficient than the second. The control module provides first and second compensation levels of the first and second compensations, such that the first and second compensations operate on the data signal to meet a bit error rate (BER) target, lowers the first compensation to reduce the power consumption of the receiver based on the list, and determines whether, in response to an increase in the level of the second compensation the BER target is met.
    Type: Application
    Filed: October 8, 2014
    Publication date: April 14, 2016
    Inventors: Stuart Allen Berke, Bhyrav M. Mutnury, Minchuan Wang
  • Patent number: 9313056
    Abstract: A high-speed serial interface includes a transmitter having an output module with settings that select an output impedances of the output module and a tuning value for the output impedance, and a receiver having a plurality of compensation modules each to provide a selectable level of equalization to a data bitstream from the transmitter, and a control module that directs the transmitter to successively select each of the tuning values, that directs the compensation modules, for each tuning value, to successively select each of the levels of equalization, that evaluates an indication of a performance level of the receiver for each of the successively selected levels of equalization and for each of the tuning values, and that selects a particular tuning value based upon the indications of the performance level of the receiver.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: April 12, 2016
    Assignee: DELL PRODUCTS, LP
    Inventors: Stuart Allen Berke, Bhyrav M. Mutnury
  • Patent number: 9310090
    Abstract: A heating, ventilation, and/or air conditioning (HVAC) system includes a system controller having a location determination module configured to cause determination and/or reporting of the location of the HVAC system in response to a first run and/or initialization of the HVAC system. The location determination module may determine and/or report location information via global positioning system (GPS) capability, a service provider (SP), customized data provider (CDP), Internet sites, LAN, WAN, 3G, 4G, and/or any other type of network infrastructure to effect reporting of the location of the HVAC system.
    Type: Grant
    Filed: January 21, 2015
    Date of Patent: April 12, 2016
    Assignee: Trane International Inc.
    Inventor: Stuart Allen Means
  • Publication number: 20160081231
    Abstract: A thermal response engine on an information handling system compares a processor thermal response to a predetermined workload with an expected thermal response to the predetermined workload in order to validate that a heat sink disposed on the processor matches a heat sink used by a thermal controller profile to manage thermal conditions of the information handling system. If the heat sink thermal characteristics fail to match up with expected thermal characteristics, the thermal response engine provides the thermal controller with an appropriate thermal profile and alerts the end user of an incompatibility.
    Type: Application
    Filed: September 11, 2014
    Publication date: March 17, 2016
    Applicant: DELL PRODUCTS L.P.
    Inventors: Stuart Allen Berke, Dinesh Kunnathur Ragupathi
  • Publication number: 20160070328
    Abstract: A power management system includes a power system. A powered component is coupled to the power system. A power detect circuit is coupled to the power system. A power system controller is coupled to the power system, the powered component, and the power detect circuit. The power system controller is operable, for each of at least one workload run using the powered component, to program the power detect circuit with a first threshold for a first system operation setting and determine that the first threshold was not exceeded while the workload was running. The power system controller is then operable to program the power detect circuit with a second threshold for the first system operation setting, determine that the second threshold was exceeded while the workload was running and, in response, use the second threshold to allocate power from the power system.
    Type: Application
    Filed: November 16, 2015
    Publication date: March 10, 2016
    Inventors: Stuart Allen Berke, George G. Richards, III
  • Patent number: 9280497
    Abstract: Systems and methods are provided for supporting use of non-volatile memory (NVM) on a double data rate (DDR) memory channel for an information handling system so that non-volatile memory devices (e.g., such as Phase Change Memory “PCM” devices) may be employed for main memory usage. In one possible implementation, information handling system memory reads may be managed directly in hardware as memory semantics via use code, while memory writes may be separately handled, e.g., via an operating system (OS)/driver. In another possible implementation, both DRAM-based and NVM-based memory systems may be populated for an information handling system.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: March 8, 2016
    Assignee: Dell Products LP
    Inventors: Stuart Allen Berke, Shawn J. Dube
  • Publication number: 20160064100
    Abstract: A method includes modeling a design of a memory channel to provide a plurality of transfer functions associated with the design, multiplying an input spectrum with each of the transfer functions to provide a plurality of results, summing the results to provide an output spectrum for the design, performing an inverse Fast Fourier Transform (FFT) on the output spectrum to provide an output signal for the design, and determining a bit error rate (BER) for the design based on the output signal.
    Type: Application
    Filed: August 29, 2014
    Publication date: March 3, 2016
    Inventors: Bhyrav M. Mutnury, Douglas S. Winterberg, Stuart Allen Berke
  • Patent number: 9274581
    Abstract: An information handling system determines a system configuration including a hardware module, and determines an adjusted power budget for the hardware module. The adjusted power budget is based on a calculation including a difference between a date code read from the hardware module and a baseline date, a baseline power budget, a power reduction period and a power reduction interval. The calculation may optionally include a risk factor. In alternate embodiments, an adjusted power budget for a hardware module may be calculated by an order processing system for information handling systems, or by a planning tool for a data center which contains information handling systems.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: March 1, 2016
    Assignee: Dell Products, LP
    Inventors: Stuart Allen Berke, John E. Jenne
  • Publication number: 20160010888
    Abstract: A heating, ventilation, and/or air conditioning (HVAC) system includes a system controller having a location determination module configured to cause determination and/or reporting of the location of the HVAC system in response to a first run and/or initialization of the HVAC system. The location determination module may determine and/or report location information via global positioning system (GPS) capability, a service provider (SP), customized data provider (CDP), Internet sites, LAN, WAN, 3G, 4G, and/or any other type of network infrastructure to effect reporting of the location of the HVAC system. The system controller may select a climate-based operation parameter value for the HVAC system as a function of a geographic location of the HVAC system.
    Type: Application
    Filed: July 10, 2015
    Publication date: January 14, 2016
    Inventors: Mark Eldo Groskreutz, Karl Mutchnik, Gregory Brown, Kit William Klein, Stuart Allen Means
  • Publication number: 20160011802
    Abstract: A dual inline memory module includes a local memory and a non-volatile memory. The local memory stores data during normal operation of the dual inline memory module. The non-volatile memory includes a first portion and a second portion. The first portion stores the data located in the local memory in response to a power failure of an information handling system in communication with the dual inline memory module. The second portion stores configuration information for the dual inline memory module. The configuration information is utilized to set up the dual inline memory module in a new information handling system.
    Type: Application
    Filed: July 9, 2014
    Publication date: January 14, 2016
    Inventor: Stuart Allen Berke
  • Patent number: 9230137
    Abstract: An authorized information handling system (IHS) generates unique identifier codes for an OEM (programmable) device designed as a component for an IHS. An identifier generation and validation (IGV) controller in the authorized IHS generates a unique encrypted sequence by encrypting identification (ID) data read from the OEM device. The IGV controller generates a unique OEM identifier code by further encrypting the encrypted sequence using a first OEM proprietary code. The IGV controller writes the first identifier code to a pre-specified storage location of the OEM device. According to one embodiment, the IGV controller generates the unique OEM identifier code using a second reversible encryption-decryption component that comprises an Exclusive-OR (XOR) scrambler engine and generates the unique encrypted sequence using a first reversible encryption-decryption component that comprises an LFSR based scrambler, which utilizes polynomial coefficients that are securely generated and maintained.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: January 5, 2016
    Assignee: DELL PRODUCTS, L.P.
    Inventors: Stuart Allen Berke, Mukund Purshottam Khatri
  • Publication number: 20150373876
    Abstract: In accordance with embodiments of the present disclosure, a memory system may include one or more memory modules and a memory controller communicatively coupled to one or more memory modules. The memory controller may be configured to determine a temperature associated with the memory system and determine if the temperature is below a minimum threshold temperature, wherein the minimum threshold temperature is a predetermined margin greater than a critical temperature below which one or more timing parameters of the memory system are of greater durations than they are when the temperature is above the critical temperature, and further wherein the predetermined margin is zero or greater. The memory controller may also be configured to initiate one or more remedial actions to increase the temperature above the minimum threshold temperature if the temperature is below the minimum threshold temperature.
    Type: Application
    Filed: June 23, 2014
    Publication date: December 24, 2015
    Inventor: Stuart Allen Berke
  • Patent number: 9218309
    Abstract: In accordance with embodiments of the present disclosure, a system may include a driver, a plurality of drops, and a plurality of transmission lines, including one transmission line between the driver and one of the plurality of drops and one transmission line between successive adjacent drops. Each particular transmission line of the plurality of transmission lines may be manufactured to have a desired impedance based on a corresponding effective impedance as seen at a drop located on an end of the particular transmission line furthest from the driver in a direction away from the driver.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: December 22, 2015
    Assignee: Dell Products L.P.
    Inventors: Bhyrav M. Mutnury, Stuart Allen Berke, Douglas S. Winterberg
  • Publication number: 20150363712
    Abstract: In accordance with embodiments of the present disclosure, an information handling system comprising a processor, at least one information handling resource communicatively coupled to the processor, and a BIOS comprising a program of instructions executable by the processor and configured to cause the processor to initialize one or more information handling resources of the information handling system. The BIOS may be configured to record information regarding the at least one information handling resource, compare the information to a license for the information handling system to determine if the at least one information handling resource is supported by a provider of the information handling system, and responsive to determining that the information handling system is unsupported by the provider, initiate a remedial action with respect to at least one information handling resource.
    Type: Application
    Filed: June 13, 2014
    Publication date: December 17, 2015
    Inventors: Stuart Allen Berke, Mukund Purshottam Khatri
  • Patent number: 9213385
    Abstract: A supplemental power system includes a powered component, a removable module interface with a plurality of pins, and a plurality of system connections. A system controller detects a first type removable module coupled to the removable module interface and allows signals from the system connections to be transmitted to the first type removable module through the plurality of pins. The system controller detects a second type removable module coupled to the removable module interface and allows power from the second type removable module that is received through the plurality of pins to be transmitted to the powered component while not allowing signals from the system connections to be transmitted to the second type removable module through the plurality of pins. Power that is stored in the second type removable module may be provided to the powered component in response to a detected power excursion by the powered component.
    Type: Grant
    Filed: April 20, 2015
    Date of Patent: December 15, 2015
    Assignee: Dell Products L.P.
    Inventors: Stuart Allen Berke, George G. Richards, III, Mark Muccini
  • Patent number: 9189045
    Abstract: A power management system includes a power system. A powered component is coupled to the power system. A power detect circuit is coupled to the power system. A power system controller is coupled to the power system, the powered component, and the power detect circuit. The power system controller is operable, for each of at least one workload run using the powered component, to program the power detect circuit with a first threshold for a first system operation setting and determine that the first threshold was not exceeded while the workload was running. The power system controller is then operable to program the power detect circuit with a second threshold for the first system operation setting, determine that the second threshold was exceeded while the workload was running and, in response, use the second threshold to allocate power from the power system.
    Type: Grant
    Filed: October 8, 2012
    Date of Patent: November 17, 2015
    Assignee: Dell Products L.P.
    Inventors: Stuart Allen Berke, George G. Richards, III