Patents by Inventor Stuart Allen

Stuart Allen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method of read/write control for dual channel memory modules for robust performance
    Patent number: 9772913
    Abstract: A memory controller for dual-channel DDR DIMMs comprises a first memory channel configured to execute a first memory transaction with a first memory device of a dual-channel DDR DIMM, and a second memory channel configured to execute a second memory transaction with a second memory device of the dual-channel DDR DIMM. The memory controller is configured to determine that the first memory channel is experiencing a degraded performance level in executing the first memory transaction with the first device, and to prevent read-write memory transactions and write-read memory transactions on the first and second memory channels in response to determining that the first memory channel is experiencing the degraded performance level.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: September 26, 2017
    Assignee: DELL PRODUCTS, LP
    Inventors: Bhyrav M. Mutnury, Stuart Allen Berke, Vadhiraj Sankaranarayanan
  • Repeatable backchannel link adaptation for high speed serial interfaces
    Patent number: 9762418
    Abstract: A receiver includes a plurality of equalization modules each configurable to provide a selectable compensation value to a data bit stream received by the receiver, and a control module configured to perform a plurality of back channel adaptations on the data bitstream to achieve a target bit error rate for the receiver, each back channel adaptation being associated with a set of compensation values of the equalization modules, determine a most common set of compensation values derived from the performance of the plurality of back channel adaptations, and determine an optimized set of compensation values based on the most common set of compensation values.
    Type: Grant
    Filed: November 6, 2014
    Date of Patent: September 12, 2017
    Assignee: Dell Products, LP
    Inventors: Stuart Allen Berke, Bhyrav M. Mutnury, Minchuan Wang
  • Systems and methods for hidden battery cell charging and conditioning
    Patent number: 9735590
    Abstract: In accordance with embodiments of the present disclosure, an information handling system may include at least one information handling resource and a battery for supplying electrical energy to the at least one information handling resource. The battery may include a plurality of series-coupled cells and a plurality of switching devices arranged with respect to the plurality of series-coupled cells, the plurality of switching devices configured to be selectively and independently activated and deactivated in order to simultaneously enable one or more of the plurality of series-coupled cells to generate a portion of an output voltage delivered to the at least one information handling resource and bypass one or more of the plurality of series-coupled cells.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: August 15, 2017
    Assignee: Dell Products L.P.
    Inventors: Lei Wang, Stuart Allen Berke
  • Systems and methods for management controller enhanced power supply unit current sharing
    Patent number: 9733686
    Abstract: A method may include, when a management controller is able to control a plurality of power supply units (PSUs): selecting a PSU of the plurality of PSUs as a master of a current share bus; driving, by the PSU selected as the master, a current share signal on the current share bus; and monitoring, by PSUs other than the power supply unit selected as the master, the current share signal. The method may also include, when the management controller is unable to control the plurality of PSUs: attempting, by each of the plurality of PSUs, to drive the current share signal on the current share bus; and monitoring, by each of the PSUs, the current share signal. Each of the PSUs may output current to the power bus in accordance with the current share signal.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: August 15, 2017
    Assignee: Dell Products L.P.
    Inventors: Abey K. Mathew, Padmanabh R. Gharpure, Stuart Allen Berke
  • System Aware Transmitter Adaptation for High Speed Serial Interfaces
    Publication number: 20170230208
    Abstract: A high-speed serial interface includes a transmitter having an output module with settings that select an output impedances of the output module and a tuning value for the output impedance, and a receiver having a plurality of compensation modules each to provide a selectable level of equalization to a data bitstream from the transmitter, and a control module that directs the transmitter to successively select each of the tuning values, that directs the compensation modules, for each tuning value, to successively select each of the levels of equalization, that evaluates an indication of a performance level of the receiver for each of the successively selected levels of equalization and for each of the tuning values, and that selects a particular tuning value based upon the indications of the performance level of the receiver.
    Type: Application
    Filed: April 26, 2017
    Publication date: August 10, 2017
    Inventors: Stuart Allen Berke, Bhyrav M. Mutnury
  • GROOVED VIAS FOR HIGH-SPEED INFORMATION HANDLING SYSTEMS
    Publication number: 20170231091
    Abstract: Systems and methods for grooved vias are described. For example, a method may include: drilling a via hole in a Printed Circuit Board (PCB), where the PCB comprises a first layer having a first trace and a second layer having a second trace, the via hole includes a first portion between the first layer and the second layer and a second portion between the second layer and a bottom surface of the PCB, and the via hole is configured to couple the first trace to the second trace through the first portion; after drilling the via hole, creating a rough internal surface in at least the second portion of the via hole that is configured to reduce a resonance of a signal transmitted from the first trace to the second trace; and forming a via by filling the first and second portions of the via hole with conductive material.
    Type: Application
    Filed: February 9, 2016
    Publication date: August 10, 2017
    Applicant: Dell Products, L.P.
    Inventors: Stuart Allen Berke, Bhyrav M. Mutnury, Sandor Farkas
  • System and method of training optimization for dual channel memory modules
    Patent number: 9728236
    Abstract: A memory channel includes a dual channel double data rate (DDR) memory device having a first bank of memory accessed by a first data bus and a first command/address (C/A) bus, and a second bank of memory accessed by a second data bus and a second C/A bus, and a memory controller configured to train the first and second C/A busses with both the first and second C/A busses active, and to train one of the first and second C/A busses with the other of the first and second C/A busses idle.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: August 8, 2017
    Assignee: Dell Products, LP
    Inventors: Vadhiraj Sankaranarayanan, Bhyrav M. Mutnury, Stuart Allen Berke
  • SYSTEMS AND METHODS FOR MANAGEMENT CONTROLLER ENHANCED POWER SUPPLY UNIT CURRENT SHARING
    Publication number: 20170220089
    Abstract: A method may include, when a management controller is able to control a plurality of power supply units (PSUs): selecting a PSU of the plurality of PSUs as a master of a current share bus; driving, by the PSU selected as the master, a current share signal on the current share bus; and monitoring, by PSUs other than the power supply unit selected as the master, the current share signal. The method may also include, when the management controller is unable to control the plurality of PSUs: attempting, by each of the plurality of PSUs, to drive the current share signal on the current share bus; and monitoring, by each of the PSUs, the current share signal. Each of the PSUs may output current to the power bus in accordance with the current share signal.
    Type: Application
    Filed: February 3, 2016
    Publication date: August 3, 2017
    Applicant: Dell Products L.P.
    Inventors: Abey K. Mathew, Padmanabh R. Gharpure, Stuart Allen Berke
  • System and method for performance optimal partial rank/bank interleaving for non-symmetrically populated DIMMs across DDR channels
    Patent number: 9720825
    Abstract: An information handling system includes a processor having a plurality of memory channels. The information handling system also includes a plurality of dual inline memory modules non-symmetrically populated on the memory channels. The dual inline memory modules are divided by bank to create a plurality of interleave groups, and each of the interleave groups spans across all of the memory channels of the processor.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: August 1, 2017
    Assignee: Dell Products, LP
    Inventor: Stuart Allen Berke
  • Methods of power supply unit rotating in an information handling system
    Patent number: 9710051
    Abstract: A method of power supply unit rotating in an information handling system (IHS) may include a control unit dividing a power loading of an IHS into N sections, where N corresponds to a number of power supply units coupled to the IHS. The control unit may configure a first power supply unit to an active state and configure one or more remaining power supply units to a suspended state during a first time period. The control unit may configure the first power supply unit to the suspended state and configure a second power supply unit to the active state in response to a second time period being reached. The control unit may rotate the active state among the power supply units in response to sequential time periods being reached. In an embodiment the control unit may rotate the active state sequentially between each of the subsequent power supplies.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: July 18, 2017
    Assignee: Dell Products, L.P.
    Inventors: Mark A. Muccini, Mehran Mirjafari, William Draper, Ashish Razdan, Lei Wang, John Evren Jenne, Stuart Allen Berke
  • Systems and methods for virtual current sharing between a power supply unit and a battery back-up unit
    Patent number: 9703348
    Abstract: In accordance with embodiments of the present disclosure, a battery back-up unit for supplying electrical energy to an information handling resource via a power bus in response to a power event affecting an ability of a power supply unit to deliver electrical energy to the information handling resource via the power bus may be configured to, in response to the power event and prior to the power supply unit ceasing to deliver electrical energy to the power bus monitor a current share bus having a current share signal driven at least in part by the power supply unit, the current share signal indicative of a first current driven by the power supply unit to the power bus, drive a second current to the power bus in accordance with the current share signal, and refrain from driving the current share bus.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: July 11, 2017
    Assignee: Dell Products L.P.
    Inventors: Lei Wang, John Erven Jenne, Stuart Allen Berke, Sanjiv Catibog Sinha
  • System and method for providing kernel intrusion prevention and notification
    Patent number: 9703725
    Abstract: A memory protection module includes comparison logic that has a write-once window CSR that stores a memory address range, and window protection logic. The comparison logic receives a memory write transaction, determines a memory address of the memory write transaction, and provides an indication as to whether or not the memory address is included in the memory address range. The window protection logic receives the memory transaction, receives the indication from the comparison logic, allows the memory write transaction to proceed in response to the indication indicating that the memory address is not included in the memory address range, and drops the memory write transaction in response to the indication indicating that the memory address is included in the memory address range.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: July 11, 2017
    Assignee: DELL PRODUCTS, LP
    Inventors: Stuart Allen Berke, Mi Wang, Vivek Dharmadhikari
  • System aware transmitter adaptation for high speed serial interfaces
    Patent number: 9692620
    Abstract: A high-speed serial interface includes a transmitter having an output module with settings that select an output impedances of the output module and a tuning value for the output impedance, and a receiver having a plurality of compensation modules each to provide a selectable level of equalization to a data bitstream from the transmitter, and a control module that directs the transmitter to successively select each of the tuning values, that directs the compensation modules, for each tuning value, to successively select each of the levels of equalization, that evaluates an indication of a performance level of the receiver for each of the successively selected levels of equalization and for each of the tuning values, and that selects a particular tuning value based upon the indications of the performance level of the receiver.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: June 27, 2017
    Assignee: DELL PRODUCTS, LP
    Inventors: Stuart Allen Berke, Bhyrav M. Mutnury
  • Systems and methods for temperature-based performance optimization of memory devices
    Patent number: 9678490
    Abstract: In accordance with embodiments of the present disclosure, a memory system may include one or more memory modules and a memory controller communicatively coupled to one or more memory modules. The memory controller may be configured to determine a temperature associated with the memory system and determine if the temperature is below a minimum threshold temperature, wherein the minimum threshold temperature is a predetermined margin greater than a critical temperature below which one or more timing parameters of the memory system are of greater durations than they are when the temperature is above the critical temperature, and further wherein the predetermined margin is zero or greater. The memory controller may also be configured to initiate one or more remedial actions to increase the temperature above the minimum threshold temperature if the temperature is below the minimum threshold temperature.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: June 13, 2017
    Assignee: Dell Products L.P.
    Inventor: Stuart Allen Berke
  • System and method of selective encoding for enhanced serializer/deserializer throughput
    Patent number: 9673931
    Abstract: A serial communication link including first and second components. The first component includes a first management module and a first encoder that provides A-bit/B-bit encoded data to a first channel, where A<B. The second component includes a second management module and a first decoder/bit-error-rate (BER) module that receives the A-bit/B-bit encoded data from the first channel, determines a BER associated with the A-bit/B-bit encoded data, and provides an indication to the second management module when the BER is higher than a threshold BER level. The second management module communicates the indication to the first management module, and the first management module directs the first encoder to provide C-bit/D-bit encoded data to the first channel in response to receiving the indication, where C<D, C<A, and D<B.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: June 6, 2017
    Assignee: DELL PRODUCTS, LP
    Inventors: Minchuan Wang, Stuart Allen Berke, Bhyrav M. Mutnury
  • SYSTEMS AND METHODS FOR A MULTI-RAIL VOLTAGE REGULATOR WITH CONFIGURABLE PHASE ALLOCATION
    Publication number: 20170147050
    Abstract: In accordance with embodiments of the present disclosure, an information handling system may include a processor and a power system comprising a plurality of voltage regulator phases, wherein at least one of the plurality of voltage regulator phases comprises an allocable voltage regulator phase that is configured to be selectively allocated to one of at least a first voltage rail and a second voltage rail of the information handling system based on a hardware configuration of the information handling system.
    Type: Application
    Filed: November 25, 2015
    Publication date: May 25, 2017
    Applicant: Dell Products L.P.
    Inventors: Stuart Allen Berke, John J. Breen
  • System and Method of Transferring Data over Available Pins
    Publication number: 20170133082
    Abstract: A system includes a memory device and a memory controller. The memory device has a data pin and a first available pin. The memory controller has a data pin coupled to the data pin of the memory device, and has a first available pin coupled to the first available pin of the memory device. The memory controller transfers memory data on the first available pin of the memory controller, and the memory device receives memory data on the first available pin of the memory device.
    Type: Application
    Filed: November 5, 2015
    Publication date: May 11, 2017
    Inventors: Vadhiraj Sankaranarayanan, Stuart Allen Berke, Bhyrav M. Mutnury
  • Systems and methods for support of non-volatile memory on a DDR memory channel
    Patent number: 9645746
    Abstract: Systems and methods are provided for supporting use of non-volatile memory (NVM) on a double data rate (DDR) memory channel for an information handling system so that non-volatile memory devices (e.g., such as Phase Change Memory “PCM” devices) may be employed for main memory usage. In one possible implementation, information handling system memory reads may be managed directly in hardware as memory semantics via use code, while memory writes may be separately handled, e.g., via an operating system (OS)/driver. In another possible implementation, both DRAM-based and NVM-based memory systems may be populated for an information handling system.
    Type: Grant
    Filed: January 18, 2016
    Date of Patent: May 9, 2017
    Assignee: Dell Products L.P.
    Inventors: Stuart Allen Berke, Shawn J. Dube
  • DYNAMIC POWER BUDGET ALLOCATION
    Publication number: 20170123482
    Abstract: A dynamic power budget allocation system includes a plurality of powered subsystems. A power system controller is coupled to the plurality of powered subsystems. The power system controller is operable, for each of a plurality of time intervals, to retrieve power usage data from each of the plurality of subsystems during a current time interval. The power system controller is then operable to project power requirements for the plurality of subsystems for a subsequent time interval using the power usage data. The power system controller is then operable to determine at least one power setting for at least one of the plurality of subsystems using the power requirements, and program the at least one of the plurality of subsystems with the at least one power setting. Each powered subsystem may include a voltage regulator that provides the power usage data and is programmed with the at least one power setting.
    Type: Application
    Filed: January 12, 2017
    Publication date: May 4, 2017
    Inventors: Stuart Allen Berke, George G. Richards, III
  • System and Method to Proactively Screen Component Wear Through Time Domain Response Profiling
    Publication number: 20170102756
    Abstract: A receiver of a serial communication channel including a memory to store an initial channel characteristic of the serial communication channel, a detector to measure a current channel characteristic of the serial communication channel, and a processor to compare the initial channel characteristic to the current channel characteristic, and to provide an indication when the difference between the initial channel characteristic to the current channel characteristic is greater than a threshold.
    Type: Application
    Filed: October 12, 2015
    Publication date: April 13, 2017
    Inventors: Minchuan Wang, Stuart Allen Berke, Bhyrav M. Mutnury