Abstract: A solid-state imaging device for high-speed photography includes an imaging element area in which a plurality of pixel portions having photodetectors for photography are disposed in a matrix form. The solid-state imaging device generates image data by capturing pixel information obtained from the photodetectors for photography. The solid-state imaging device for high-speed photography further includes: a change detection element that detects a change in an amount of incident light, which is disposed in the imaging element area or at a predetermined position surrounding the imaging element area; and a controller that controls starting or stopping of capturing of pixel information obtained from the photodetectors for photography in accordance with a trigger signal based on a detection signal output from the change detection element.

Abstract: A MOS image pick-up device including a semiconductor substrate, an imaging region formed on the semiconductor substrate by arraying plural unit pixels, and a peripheral circuit region including a driving circuit for operating the imaging region formed on the semiconductor substrate; the unit pixels include a photodiode, MOS (metal-oxide-semiconductor) transistors and a first device-isolation portion, the peripheral circuit region includes a second device-isolation portion for isolating devices in the driving circuit; wherein each of the first device-isolation portion and the second device-isolation portion is at least one portion selected from an electrically insulating film formed on the substrate in order not to erode the substrate, a electrically insulating film formed on the substrate so as to erode the substrate to a depth ranging from 1 nm to 50 nm, and an impurity diffusion region formed within the substrate. The MOS image pick-up device is incorporated in a camera.

Abstract: A solid-state imaging device is formed on a silicon substrate for providing a MOS type solid-state imaging device which has a device isolation structure and causes a small amount of leak current. The solid-state imaging device includes, for each pixel, an imaging region which includes a photodiode having a charge accumulation region of a first conductivity type, a transistor and a device isolation region whose depth is less than a depth of the charge accumulation region of the first conductivity type, at which an impurity density is at maximum.

Abstract: A solid-state imaging device includes a plurality of light-receiving units two-dimensionally arrayed in a semiconductor substrate, a filter unit operable to transmit incident lights of selected wavelengths to the plurality of light receiving units and a light shielding unit operable to shield incident light, the light shielding unit having a plurality of apertures, each aperture opposing a corresponding light receiving unit. Here, on a path of incident light from the light shielding unit to the plurality of light shielding units, the filter unit is disposed between the light shielding unit and the plurality of light-receiving units. The solid-state imaging device prevents color mixing caused by oblique light.

Abstract: The solid-state image pickup element comprises a filter film made of a single-layer inorganic material which exhibits a maximum value at a specific wavelength on transmission spectra of incident light in accordance with a film thickness thereof, and a photoelectrical conversion part for generating a signal charge in accordance with light quantity of the incident light transmitted through the filter film. For the filter film, a number of the filter films of at least two kinds having different film thickness is provided, and a number of the filter films are arranged in parallel based on a prescribed arrangement. Image pickup signals outputted from the solid-state image pickup element are signal-processed by a signal processor.

Abstract: In a MOS type sensor including a floating diffusion (FD) amplifier in each pixel, the number of pulse lines is reduced, so as to improve the numerical aperture. For this purpose, a read pulse for a read transistor of a first pixel and a reset pulse for a reset transistor of a second pixel adjacent to the first pixel in a column direction are supplied through a common gate line; a LOW level potential of a drain line connected to a drain region (a region for supplying a pulse voltage to an FD portion through the reset transistor) of the first pixel is set to a potential higher than a potential depth of a photodiode of the first pixel in resetting the second pixel; and potential below the gate of the reset transistor of the first pixel obtained by applying a LOW level voltage to this gate is set to a potential higher than the LOW level potential of the drain line.

Abstract: A plurality of pixels that are arranged two-dimensionally, a horizontal scanning circuit and a vertical scanning circuit that output a signal for reading out an accumulated charge in the pixel, and a multiplexer circuit that supplies a control signal to elements constituting each of the pixels based on the signal outputted from the vertical scanning circuit are provided. The vertical scanning circuit is used singly to output a scanning signal for reading out the accumulated charge and a scanning signal for clearing the accumulated charge in the pixel, and the multiplexer circuit is used singly to supply an accumulated charge readout signal and an accumulated charge clearing signal as the control signal based on the scanning signal for reading out the accumulated charge and the scanning signal for clearing the accumulated charge.

Abstract: The consumed power of a MOS type sensor including a floating diffusion (FD) amplifier in each pixel is reduced. For this purpose, drain regions (regions for supplying a pulse voltage to FD portions through reset transistors) of unit pixels are connected to different drain lines row by row, so as to selectively supply a power pulse to each row. The power pulse is set to a HIGH level potential at least during a period when signal charge stored in the FD portion is reset and a period when the signal charge stored in the FD portion is detected.

Abstract: In a method for manufacturing a solid-state imaging device of the present invention, a pad insulting film 2 made of an oxide film and an anti-oxidizing film 3 made of a nitride film are deposited on a n-type semiconductor substrate 1. Then, an opening 4 is formed to expose an element isolation formation region of the semiconductor substrate 1. Next, an anti-oxidizing film (not shown) for burying the opening 4 is formed on the substrate and anisotropic etching is performed to form a sidewall 5. Subsequently, a trench 6 is formed using the anti-oxidizing film 3 and the sidewall 5 as a mask. Then, a p-type impurity is implanted into a part of the semiconductor substrate 1 which is exposed at the side face of the trench 6 and a thermal oxide film is formed in the surface portion of the trench 6 in the semiconductor substrate 1. Thereafter, the trench 6 is buried with a burying film 8.

Abstract: A solid-state imaging device is formed on a silicon substrate for providing a MOS type solid-state imaging device which has a device isolation structure and causes a small amount of leak current. The solid-state imaging device includes, for each pixel, an imaging region which includes a photodiode having a charge accumulation region of a first conductivity type, a transistor and a device isolation region whose depth is less than a depth of the charge accumulation region of the first conductivity type, at which an impurity density is at maximum.

Abstract: The present invention provides a small, high-performance imaging device and its application to products at low cost by preventing noise superimposed on a timing pulse feed line from affecting the output of an imaging chip. The imaging device includes two chips: an imaging chip 101 including a sensor 102 and an image processing chip 106 including an image processing circuit 110. The transistors of all circuits in the imaging chip 101 are formed as either nMOS or pMOS transistors. The imaging chip 101 is stacked on the image processing chip 106.

Abstract: By making an aperture 13a to which light of an R (Red) component enters larger than other apertures (apertures 12a, 14a, and 15a), an attenuation ratio of light of the R component can be reduced when compared with the case where each aperture has a same size. Therefore, deterioration in sensitivity to the light of the R component can be suppressed, and deterioration in image quality can be reduced.

Abstract: An object of the present invention is to provide a small solid-state image sensor which realizes significant improvement in sensitivity. The solid-state image sensor of the present invention includes a semiconductor substrate in which photoelectric conversion units are formed, a light-blocking film which is formed above the semiconductor substrate and has apertures formed so as to be positioned above respective photoelectric conversion units, and a high refractive index layer formed in the apertures. Here, each aperture has a smaller aperture width than a maximum wavelength in a wavelength of light in a vacuum converted from a wavelength of the light entering the photoelectric conversion unit through the apertures, and the high refractive index is made of a high refractive index material having a refractive index which allows transmission of light having the maximum wavelength through the aperture.

Abstract: A noise reduction circuit includes a plurality of electric charge accumulating sections and a plurality of switching sections. In the noise reduction circuit, electric charge in an amount corresponding to a signal containing a noise is accumulated in each of the electric charge accumulating sections, and thereafter the switching sections are turned on to connect the electric charge accumulating sections in parallel or in series with each other, thereby outputting a signal corresponding to the average of, or the sum total of, the amounts of electric charge accumulated in the respective electric charge accumulating sections.

Abstract: A solid-state imaging device includes a color filter that selectively transmits incoming light. The color filter includes two ?/4 multilayer films, and an insulation layer sandwiched between the two ?/4 multilayer films. Here, each of the ?/4 multilayer films is constituted by a plurality of dielectric layers, and the optical thickness of the insulation layer is not ?/4. Since this color filter has a smaller thickness, the solid-state imaging device has a smaller size.

Abstract: Photoelectric converters are arranged two-dimensionally in a semiconductor substrate. A planarizing layer, a light shielding film, a further planarizing layer and condenser lenses are formed sequentially on the semiconductor substrate and the photoelectric converters. The light shielding film has apertures at positions corresponding to the photoelectric conversion devices. Multilayer interference filters that transmit either a red, green or blue wavelength component of light are disposed in the apertures.

Abstract: A semiconductor device of the present invention includes a substrate; an imaging region which is formed at part of the substrate and in which photoelectric conversion cells including photoelectric conversion sections are arranged in the form of an array; a control-circuit region which is formed at part of the substrate and in which the imaging region is controlled and a signal from the imaging region is outputted; and a copper-containing interconnect layer formed above the substrate and made of a material containing copper. Furthermore, a first anti-diffusion layer and a second anti-diffusion layer are formed, as anti-diffusion layers for preventing the copper from diffusing into each photoelectric conversion section, on the photoelectric conversion section and the copper-containing interconnect layer, respectively.

Abstract: An imaging element includes a photoelectric conversion element, a readout transistor, an accumulated element, a detection transistor, and a reset transistor. The readout transistor reads a signal charge when a gate potential to be supplied to the gate terminal is changed from a first state to a second state. The detection transistor detects a voltage signal after the gate potential to be supplied to the gate terminal of the readout transistor is changed from the second state to the first state. A reset potential supplied from the reset transistor to the accumulated element has an intermediate potential between the gate potential in the first state that is supplied to the gate terminal of the readout transistor and a predetermined VDD potential.

Abstract: Provided is a solid-state imaging device which can obtain an output characteristic without preventing linearity even in a high light-intensity range, and at the same time achieve a much wider dynamic range. The solid-state imaging device 1 includes: a photo-detecting element (a photoelectric transducer PD) for transducing incident light to electric charges and accumulate the electric charges; an accumulation element (a floating de-fusion FD) for accumulating the electric charges; and a transfer circuit (a MOS transistor Q11 and a pulse generating circuit 50a) for transferring the electric charges accumulated in the photo-detecting element to the accumulation element, wherein the transfer circuit has two operation modes as follows: a whole transfer for transferring almost all of the accumulated electric charges to the accumulation element; and a partial transfer for transferring only a part of the accumulated electric charges which exceeds a predetermined amount to the accumulation element.

Abstract: The present invention aims to provide a solid-state imaging apparatus that realizes less leakage current, high image quality and low noise during the driving operation, and manufacturing method for the same. A MOS type imaging apparatus 1 includes an imaging region 10 and a driving region 20 both formed on a p-type silicon substrate (hereinafter called an “Si substrate”) 31. The imaging region 10 includes six pixels 11 to 16 disposed in a shape of a matrix having 2 rows and 3 columns. The driving region 20 includes a timing generation circuit 21, a vertical shift resistor 22, a horizontal shift resistor 23, a pixel selection circuit 24, and so on. All transistors included in the pixels 11 to 16 in the imaging region and the circuits 21 to 24 in the driving circuit region 20 are of n-channel MOS type.