Abstract: A circuit design support system, a circuit design support method, a circuit design support program, and a recording medium having the program recorded thereon are provided by which a design can be performed in consideration of the stochastic operation of the stochastic operation element and the influence caused by the stochastic operation of the stochastic operation element on the operation reliability of the circuit can be evaluated.

Abstract: In reading of a memory unit, an read failure operation due to variation in characteristic of a transistor in a dynamic load is reduced. A read circuit that reads a voltage obtained by a voltage division of a dynamic load unit and the memory unit as an output of the memory unit includes the dynamic load unit having one end connected to a side of a power supply and the other end connected to a side of the memory unit, and a feedback unit that, by a feedback of the voltage obtained by the voltage division that is divided between the dynamic load unit and the memory unit, holds the voltage obtained by the voltage division. The dynamic load unit has an array structure in which a plurality of resistive memory elements are connected in series, in parallel, or in series-parallel. The dynamic load unit has the array structure of the resistive memory elements and this structure can suppress the read failure operation due to the variation in dynamic load.

Abstract: The magnetic memory element (100) includes: a conductive layer that includes a heavy metal layer (10) containing a 5d transition metal; a first ferromagnetic layer (20) that is adjacent to the conductive layer and contains a ferromagnetic layer having a reversible magnetization; a barrier layer (30) that is adjacent to the first ferromagnetic layer (20) and includes an insulating material; a reference layer (40) that is adjacent to the barrier layer (30) and has at least one second ferromagnetic layer (41) having a fixed magnetization direction; a cap layer (50) that is adjacent to the reference layer (40) and includes a conductive material; a first terminal (T1) that is capable of introducing a current into one end of the heavy metal layer (10) in the longitudinal direction; a second terminal (T2) that is capable of introducing a current into the other end of the heavy metal layer (10) in the longitudinal direction; and a third terminal (T3) that is capable of introducing a current into the cap layer (50).

Abstract: A memory circuit device includes multiple memory cells that are each constituted of a resistive memory element; a write circuit unit that is configured to write data to any one of the memory cells which is designated by cell designating information, and a read circuit unit that is configured to read out, from the memory cell designated by the cell designating information, data written in the memory cell. The memory circuit device has a configuration including a selection circuit unit that is shared by both of the write circuit unit and the read circuit unit and configured to select a memory cell to be activated from the multiple memory cells based on cell designating information, and a control circuit unit that is configured to selectively enable any one of writing of data by the write circuit unit and reading of data by the read circuit unit with respect to the memory cell selected by the selection circuit unit.

Abstract: A magnetic tunnel junction element configured by stacking, in a following stack order, a fixed layer formed of a ferromagnetic body and in which a magnetization direction is fixed, a magnetic coupling layer formed of a nonmagnetic body, a reference layer formed of a ferromagnetic body and in which the magnetization direction is fixed, a barrier layer formed of a nonmagnetic body, and a recording layer formed of a ferromagnetic body, a barrier layer formed of a nonmagnetic body, and a recording layer formed by sandwiching an insertion layer formed of a nonmagnetic body between first and second ferromagnetic layers, wherein the magnetic coupling layer is formed using a sputtering gas in which a value of a ratio in which a mass number of an element used in the magnetic coupling layer divided by the mass number of the sputtering gas itself is 2.2 or smaller.

Abstract: A memory device capable of reading reference data while achieving optimization of electric power consumption is provided. A memory device includes a memory area storing reference data of N (?1) dimensions each composed of M (?1) bits. A number of memory grains each composed of nonvolatile memory and power drivers paired with the memory grains to supply electrical power to the memory grains are provided in each region specified by column lines in the number and M row lines, the number being one to N inclusive. When the power driver receives a control signal from the corresponding one of the column lines, a control signal from the corresponding one of the M row lines, and a clock signal, the power driver supplies electrical power to the memory grain in synchronization with the clock signal.

Abstract: A memory device capable of reading reference data while achieving optimization of electric power consumption is provided. A memory device includes a memory area storing reference data of N (?1) dimensions each composed of M (?1) bits. A number of memory grains each composed of nonvolatile memory and power drivers paired with the memory grains to supply electrical power to the memory grains are provided in each region specified by column lines in the number and M row lines, the number being one to N inclusive. When the power driver receives a control signal from the corresponding one of the column lines, a control signal from the corresponding one of the M row lines, and a clock signal, the power driver supplies electrical power to the memory grain in synchronization with the clock signal.

Abstract: A method for producing a three-dimensional structure, a method for producing a vertical transistor, a vertical transistor wafer, and a vertical transistor substrate, capable of suppressing the emission of Si due to a heat treatment and making an interface between an oxide film and a core mainly consisting of Si relatively smooth include: forming a three-dimensional shape by processing (for example, by etching) a surface layer of a monocrystalline silicon substrate, the surface layer having an oxygen concentration of 1×1017 atoms/cm3 or more; and then forming an oxide film on the surface of the three-dimensional shape by performing a heat treatment. The three-dimensional structure has a shape having projections and recesses in a thickness direction of the silicon substrate, and a height in the thickness direction of the silicon substrate is between 1 nm and 1000 nm, and preferably between 1 nm and 100 nm.

Abstract: A data write device for a resistive memory element, the resistive memory element including: a conductive electrode provided at one end of the memory element; and a reading electrode provided at the other end of the memory element being configured to vary a resistance of the memory element by applying a write current to the conductive electrode, the data write device for the resistive memory element further includes: a writing means, an output means, and a control means. The output means is provided between a power supply and the reading electrode. As output signals, a read signal from the memory element and a monitor signal to monitor a writing status of the memory element written by the writing means are output from the output means. By the monitor signal, a termination of data-writing into the resistive memory element is detected.

Abstract: A switching circuit device includes high-side and low-side switching element circuits, and high-side and low-side drive circuits. The high-side switching element circuit includes a high-side switching element connected between an output terminal and a high-voltage terminal of a high voltage source. The low-side switching element circuit includes a low-side switching element connected between the output terminal and a reference potential terminal. The high-side drive circuit turns on the high-side switching element. The low-side drive circuit turns on the low-side switching element. The high-side drive circuit includes a bootstrap capacitor connected to a drive power source. The bootstrap capacitor is charged while the low-side switching element is ON. The high-side drive circuit applies a gate voltage to the high-side switching element while the low-side switching element is OFF. The gate voltage is defined by adding a voltage of the output terminal to a voltage of the bootstrap capacitor.

Abstract: A memory device includes a memory cell array in which plural memory cells are arranged in a matrix manner, and a mode selection part. The mode selection part has at least any two of a first mode, a second mode, a third mode and selects any operation mode. The first mode is for reading and writing 1-bit data with the first memory cell or the second memory cell. The second mode is for reading and writing the 1-bit data with a cell unit including the N first memory cells and the N second memory cells connected to a bit line pair. The third mode is for reading and writing the 1-bit data with a cell unit including the M first memory cells and the M second memory cells connected to the bit line pair. M and N are 1 or more integers which are different from each other.

Abstract: A memory circuit (11) includes: a memory cell (MCij) including a variable-resistance element in which a resistance value varies substantially between two levels; a resistance-voltage conversion circuit that converts the resistance value of a memory cell (MCij) to be read into a data voltage; a reference circuit (RCi) including a series circuit of a variable-resistance element and a linear resistor, the variable-resistance element including substantially the same configuration as the configuration of the variable-resistance element included in the memory cell MCij and being set to a lower resistance of two levels; a reference voltage conversion circuit that converts the resistance value of the reference circuit (RCi) into a reference voltage; and a sense amplifier (SA) that determines data stored in the memory cell (MCij) by comparing the data voltage with the reference voltage.

Abstract: A magnetoresistance effect element includes first and second magnetic layers having a perpendicular magnetization direction, and a first non-magnetic layer disposed adjacent to the first magnetic layer and on a side opposite to a side on which the second magnetic layer is disposed. An interfacial perpendicular magnetic anisotropy exists at an interface between the first magnetic layer and the first non-magnetic layer, and the anisotropy causes the first magnetic layer to have a magnetization direction perpendicular to the surface of the layers. An atomic fraction of all magnetic elements to all magnetic and non-magnetic elements included in the second magnetic layer is smaller than that of the first magnetic layer.

Abstract: A method for producing a magnetic memory includes: forming a magnetic film having a non-magnetic layer between a first magnetic layer and a second magnetic layer on a substrate having an electrode layer; performing annealing treatment at a first treatment temperature in a state where a magnetic field is applied in a direction perpendicular to a film surface of the first or the second magnetic layer in vacuum; forming a magnetic tunnel junction element; forming a protective film protecting the magnetic tunnel junction element; a formation accompanied by thermal history, in which a constituent element of a magnetic memory is formed after the protective film formation on the substrate; and implementing annealing treatment at a second treatment temperature lower than the first treatment temperature on the substrate in an annealing treatment chamber, in vacuum or inert gas wherein no magnetic field is applied.

Abstract: A memory device and a memory system capable of flexibly corresponding to the number of dimensions of reference data and having a compact circuit configuration at searching for data similar to search data are provided. A memory system capable of reducing processing time to search for data similar to search data and reducing a circuit area is provided. A memory device includes a plurality of read circuits, an input search data storing circuit configured to divide search data to output, a plurality of similarity evaluation cells and a plurality of current accumulators. The memory system is configured by including a main core and a branch core thus configured.

Abstract: A magnetoresistance effect element includes a bias layer comprised of an antiferromagnetic material and having a shape in which a first length in a first direction greater than a second length in a second direction perpendicular to the first direction, a recording layer comprised of a ferromagnetic material and being disposed on the bias layer, a direction of magnetization of the recording layer being reversible, a barrier layer comprised of an insulation material and being disposed on the recording layer, and a reference layer comprised of a ferromagnetic material and being disposed on the barrier layer, a direction of magnetization of the reference layer being substantially fixed.

Abstract: Provided is a magnetoresistance effect element in which the magnetization direction of the recording layer is perpendicular to the film surface and which has a high thermal stability factor ?, and a magnetic memory. A recording layer having a configuration of first magnetic layer/first non-magnetic coupling layer/first magnetic insertion layer/second non-magnetic coupling layer/second magnetic layer is sandwiched between the first and second non-magnetic layers and stacked so that a magnetic coupling force is generated between the first magnetic layer and the second magnetic layer.

Abstract: A data write circuit of a resistive memory element is provided, the device being capable of writing with low writing energy using a simple circuit. The data write circuit of the resistive memory element, includes: a complementary resistive memory element; writing means for making the complementary resistive memory element cause a resistance change; detection means for detecting a writing state in the complementary resistive memory element; and control means for controlling writing by the writing means, based on a detected signal of the detection means.

Abstract: A magnetic tunnel junction element with a high tunnel magnetic resistance ratio can prevent a recording layer from being damaged. A reference layer includes a ferromagnetic body, and has magnetization direction fixed in the vertical direction. A barrier layer includes non-magnetic body, and disposed on one surface side of the reference layer. A recording layer is disposed to sandwich barrier layer between itself and reference layer. The recording layer includes a first ferromagnetic layer including at least one of Co and Fe, and having a magnetization direction variable in a vertical direction; a first non-magnetic layer including at least one of Mg, MgO, C, Li, Al, and Si, second non-magnetic layer including at least one of Ta, Hf, W, Mo, Nb, Zr, Y, Sc, Ti, V, and Cr, and second ferromagnetic layer including at least one of Co and Fe, and having a magnetization direction variable in a vertical direction.

Abstract: The present invention provides a magnetoresistance effect element which has a high thermal stability factor ? and in which a magnetization direction of a recording layer is a perpendicular direction with respect to a film surface, and a magnetic memory including the same. Magnetic layers of a recording layer of the magnetoresistance effect element are divided into at least two, and an Fe composition with respect to a sum total of atomic fractions of magnetic elements in each magnetic layer is changed before stacking the magnetic layers.