Patents by Inventor Tetsuya Itano

Tetsuya Itano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9307174
    Abstract: A solid-state imaging apparatus includes a plurality of pixels arrayed in a matrix, and configured to generate signals by photoelectric conversion; a plurality of read-out circuits disposed on each column of the plurality of pixels arrayed in a matrix pattern, and configured to read out the signals from the plurality of pixels; a plurality of comparison units configured to compare the signals output from the plurality of read-out circuits with a reference signal whose level changes with time; a counter configured to count a clock signal after the level of the reference signal starts a change; a storage unit configured, when a magnitude relationship between the signals output from the plurality of the read-out circuits and the reference signal is reversed; and a reset unit configured to reset the count value stored in the storage unit.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: April 5, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tetsuya Itano, Hiroki Hiyama, Kazuhiro Saito, Kohichi Nakamura, Yu Maehashi
  • Patent number: 9288415
    Abstract: A solid-state imaging apparatus includes a pixel section in which a plurality of pixels are arranged in a matrix, a column signal line configured to output a pixel signal from the pixel section, a column amplifier circuit configured to invert and amplify the pixel signal, a bypass circuit configured to bypass the column amplifier circuit, an AD converter, and a control unit configured to change an operation mode of the AD converter in accordance with the operation of the bypass circuit.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: March 15, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuo Yamazaki, Tetsuya Itano, Hiroki Hiyama
  • Patent number: 9269738
    Abstract: At least one exemplary embodiment is directed to a solid state image sensor including at least one antireflective layer and/or non rectangular shaped wiring layer cross section to reduce dark currents and 1/f noise.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: February 23, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toru Koizumi, Akira Okita, Tetsuya Itano, Sakae Hashimoto, Ryuichi Mishima
  • Publication number: 20160013236
    Abstract: An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.
    Type: Application
    Filed: September 22, 2015
    Publication date: January 14, 2016
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa
  • Patent number: 9232165
    Abstract: A solid-state imaging apparatus includes: a ramp signal generator for generating first and second time-changing ramp signals during first and second analog-to-digital conversion periods, respectively; comparators for comparing a reset signal of a pixel with the first ramp signal during the first analog-to-digital conversion period, and comparing a pixel signal with the second ramp signal during the second analog-to-digital conversion period; and memories for storing, as first and second digital data, count values of counting from a start of changing the first and second ramp signals until an inversion of outputs of the comparators, during the first and second analog-to-digital conversion periods, wherein the ramp signal generator supplies a current from a current generator to a first capacitor element by a sampling and holding operation of a switch, and generates the first and second ramp signals based on the same bias voltage held by the first capacitor element.
    Type: Grant
    Filed: August 14, 2012
    Date of Patent: January 5, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kazuhiro Saito, Hiroki Hiyama, Tetsuya Itano, Kohichi Nakamura
  • Publication number: 20150325610
    Abstract: A photoelectric conversion device includes a photoelectric conversion region having a plurality of photoelectric conversion elements and a first MOS transistor configured to read a signal in response to an electric charge of each photoelectric conversion element; and a peripheral circuit region having a second MOS transistor configured to drive the first MOS transistor and/or amplify the signal read from the photoelectric conversion region, the photoelectric conversion region and the peripheral circuit region being located on the same semiconductor substrate, wherein an impurity concentration in a drain of the first MOS transistor is lower than an impurity concentration in a drain of the second MOS transistor.
    Type: Application
    Filed: July 22, 2015
    Publication date: November 12, 2015
    Inventors: Takanori Watanabe, Tetsuya Itano, Hidekazu Takahashi, Shunsuke Takimoto, Kotaro Abukawa, Hiroaki Naruse, Shigeru Nishimura, Masatsugu Itahashi
  • Patent number: 9178081
    Abstract: An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.
    Type: Grant
    Filed: May 20, 2013
    Date of Patent: November 3, 2015
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa
  • Patent number: 9177979
    Abstract: A solid-state image pickup device includes a pixel region including photoelectric conversion units, FDs, and transfer transistors, reset transistors, amplifier transistors, and a reference voltage supply line used to supply reference voltages to the photoelectric conversion units. In the device, the pixel region and the reference voltage supply line are disposed on a first semiconductor substrate, and at least the reset transistors or the amplifier transistors are disposed on a second semiconductor substrate. Furthermore, power supply lines used to supply voltages to the reference voltage supply line are disposed on the second semiconductor substrate. The device further includes second electric connection units which electrically connect the reference voltage supply line to the power supply line. The first electric connection units are disposed in the pixel region whereas the second electric connection units are disposed outside the pixel region.
    Type: Grant
    Filed: December 13, 2010
    Date of Patent: November 3, 2015
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kazuo Yamazaki, Tetsuya Itano, Nobuyuki Endo, Kyouhei Watanabe
  • Publication number: 20150296163
    Abstract: An image capturing apparatus includes: plural pixels arranged in matrix, each outputting a signal from a photoelectric conversion element; and plural readout circuits each provided for a corresponding column of the pixels, signals from the pixels being input to the readout circuits. The readout circuit includes an amplifier unit configured to amplify the signal from the pixel, and have a variable gain, and a hold capacitance connected to an output terminal of the amplifier unit via a sampling switch, and having a variable capacitance value. When the variable gain of the amplifier unit is set to be a first gain, the variable capacitance value of the hold capacitance is set to be a first capacitance value. When the variable gain is set to be a second gain larger than the first gain, the variable capacitance value is set to be a second capacitance value smaller than the first capacitance value.
    Type: Application
    Filed: April 8, 2015
    Publication date: October 15, 2015
    Inventors: Kohichi Nakamura, Tetsuya Itano, Hideo Kobayashi
  • Publication number: 20150287755
    Abstract: A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.
    Type: Application
    Filed: June 18, 2015
    Publication date: October 8, 2015
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Junji Iwata
  • Publication number: 20150229832
    Abstract: Provided is a photoelectric conversion apparatus including: a pixel array having pixels arranged in matrix; a pixel output line provided according to each column of the pixel array and transmitting a pixel signal output from a pixel of each column of the pixel array; a column signal processing unit provided according to each column of the pixel array and into which the pixel signal is input from the pixel output line, in which the column signal processing unit has a plurality of horizontal adding up or averaging units configured to add up or average the plurality of pixel signals based on the pixels of different columns of the pixel array; and a plurality of adding up or averaging modes with different numbers of columns subjected to adding up or averaging can be selected by selectively using one or a plurality of the plurality of horizontal adding up or averaging units.
    Type: Application
    Filed: February 5, 2015
    Publication date: August 13, 2015
    Inventors: Tetsuya Itano, Kohichi Nakamura, Hideo Kobayashi
  • Patent number: 9093350
    Abstract: A member for a solid-state image pickup device having a bonding plane with no gaps and a method for manufacturing the same are provided. The manufacturing method includes the steps of providing a first substrate provided with a photoelectric converter on its primary face and a first wiring structure, providing a second substrate provided with a part of a peripheral circuit on its primary face and a second wiring structure, and performing bonding so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. In addition, at least one of an upper face of the first wiring structure and an upper face of the second wiring structure has a concave portion, and a conductive material forms a bottom face of the concave portion.
    Type: Grant
    Filed: July 4, 2011
    Date of Patent: July 28, 2015
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Junji Iwata
  • Publication number: 20150201144
    Abstract: A solid-state imaging apparatus includes: a pixels in a matrix for generating a pixel signal; and A/D converting units, corresponding to columns of the matrix, to convert the pixel signal into a n-bit digital value. The A/D converting units includes first storage units for storing the n-bit digital value one bit by one bit, and second storage units corresponding to the first storage units, to hold the digital value transferred from the first storage unit. In each of the columns of the plurality of pixels, arranged corresponding thereto are the first storage units and the second storage units form n-pairs. Each pair including the first storage unit and the second storage unit hold the digital value of the same bit. The n-pairs are arrayed in a matrix.
    Type: Application
    Filed: January 7, 2015
    Publication date: July 16, 2015
    Inventors: Hideo Kobayashi, Kohichi Nakamura, Tetsuya Itano, Yasushi Matsuno
  • Patent number: 9083906
    Abstract: Provided is an A/D converter including an input terminal, a reference signal line for supplying a reference signal which changes temporally, a comparator, a correction capacitor connected to an inverting input terminal of the comparator; and an output circuit which outputs digital data corresponding to an analog signal input to the input terminal. In a first state in which a total voltage of a first analog signal and an offset voltage of the comparator is held in the correction capacitor, a second analog signal input to the input terminal is supplied to a non-inverting input terminal of the comparator, and the second analog signal or the total voltage is changed using the reference signal, thereby outputting, from the output circuit, digital data.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: July 14, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kohichi Nakamura, Hiroki Hiyama, Tetsuya Itano, Kazuhiro Saito
  • Patent number: 9077918
    Abstract: A photoelectric conversion apparatus includes, on one substrate, a pixel driving unit and a signal processing unit that includes a digital circuit configured to execute signal processing. A first voltage and a second voltage different in value from the first voltage are supplied to the digital circuit of the pixel driving unit. A third voltage and a fourth voltage different in value from the third voltage are supplied to the digital circuit of the signal processing unit. A main portion of a first conductor that supplies the first voltage to the digital circuit of the pixel driving unit and a main portion of a second conductor that supplies the third voltage to the digital circuit of the signal processing unit are isolated from each other.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: July 7, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroki Hiyama, Tetsuya Itano, Kazuhiro Saito, Kohichi Nakamura, Yu Maehashi, Koichiro Iwata
  • Publication number: 20150172581
    Abstract: First processing of causing a hold unit to hold a first signal from an amplification unit based on reset of the amplification unit, second processing of performing AD conversion of the held first signal and outputting a second signal obtained by superposing a signal based on charges generated in a photoelectric conversion unit of a first-row pixel on the first signal, third processing of performing an operation of performing AD conversion of the held second signal and an operation of resetting the amplification unit at least partly in parallel, and fourth processing of causing the hold unit to hold a fourth signal obtained by superposing a signal based on charges generated in the photoelectric conversion unit of a second-row pixel on a third signal from the amplification unit based on resetting of the amplification unit and is output from the amplification unit are performed.
    Type: Application
    Filed: December 12, 2014
    Publication date: June 18, 2015
    Inventors: Tetsuya Itano, Kazuo Yamazaki, Kohichi Nakamura, Koichiro Iwata
  • Patent number: 9040887
    Abstract: Provided is an A/D converter including an input terminal, a reference signal line for supplying a reference signal which changes temporally, a comparator, a correction capacitor connected to an inverting input terminal of the comparator; and an output circuit which outputs digital data corresponding to an analog signal input to the input terminal. In a first state in which a total voltage of a first analog signal and an offset voltage of the comparator is held in the correction capacitor, a second analog signal input to the input terminal is supplied to a non-inverting input terminal of the comparator, and the second analog signal or the total voltage is changed using the reference signal, thereby outputting, from the output circuit, digital data.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: May 26, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kohichi Nakamura, Hiroki Hiyama, Tetsuya Itano, Kazuhiro Saito
  • Publication number: 20150138388
    Abstract: The present invention relates to a solid-state image pickup device. The device includes a first substrate including a photoelectric conversion element and a transfer gate electrode configured to transfer charge from the photoelectric conversion element, a second substrate having a peripheral circuit portion including a circuit configured to read a signal based charge generated in the photoelectric conversion element, the first and second substrates being laminated. The device further includes a multilayer interconnect structure, disposed on the first substrate, including an aluminum interconnect and a multilayer interconnect structure, disposed on the second substrate, including a copper interconnect.
    Type: Application
    Filed: November 17, 2014
    Publication date: May 21, 2015
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa
  • Patent number: 9029752
    Abstract: A solid-state imaging apparatus comprises a plurality of matrix pixels, a reference signal generator for generating a ramp signal, a counter for performing counting according to the ramp signal output, and an AD converter, arranged for each pixel column, for performing AD conversion by comparing a pixel signal from the pixel with the ramp signal. Further, the AD converter includes a comparator to which the pixel signal and the reference signal are input, a storage for storing the AD conversion result, and an slope converter, between the output terminal of the reference signal generator and the input terminal of the comparator, for changing a gradient of the ramp signal, so that the noise overlaid on the ramp signal changes depending on the gradient of the ramp signal. Thus, it is possible to prevent generation of a horizontal-line noise in the ramp signal.
    Type: Grant
    Filed: July 2, 2012
    Date of Patent: May 12, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuhiro Saito, Hiroki Hiyama, Tetsuya Itano, Kohichi Nakamura
  • Publication number: 20150122975
    Abstract: A solid-state imaging apparatus comprises a plurality of matrix pixels, a reference signal generator for generating a ramp signal, a counter for performing counting according to the ramp signal output, and an AD converter, arranged for each pixel column, for performing AD conversion by comparing a pixel signal from the pixel with the ramp signal. Further, the AD converter includes a comparator to which the pixel signal and the reference signal are input, a storage for storing the AD conversion result, and an slope converter, between the output terminal of the reference signal generator and the input terminal of the comparator, for changing a gradient of the ramp signal, so that the noise overlaid on the ramp signal changes depending on the gradient of the ramp signal. Thus, it is possible to prevent generation of a horizontal-line noise in the ramp signal.
    Type: Application
    Filed: January 12, 2015
    Publication date: May 7, 2015
    Inventors: Kazuhiro Saito, Hiroki Hiyama, Tetsuya Itano, Kohichi Nakamura