Patents by Inventor Tetsuya Itano

Tetsuya Itano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SOLID-STATE IMAGING DEVICE
    Publication number: 20150115136
    Abstract: In a solid-state imaging device, a photoelectric conversion unit, a transfer transistor, and at least a part of electric charge holding unit, among pixel constituent elements, are disposed on a first semiconductor substrate. An amplifying transistor, a signal processing circuit other than a reset transistor, and a plurality of common output lines, to which signals are read out from a plurality of pixels, are disposed on a second semiconductor substrate.
    Type: Application
    Filed: January 8, 2015
    Publication date: April 30, 2015
    Inventors: Kazuo Yamazaki, Tetsuya Itano, Nobuyuki Endo, Kyouhei Watanabe
  • Analog-to-digital converter, photoelectric conversion device, and imaging system
    Patent number: 8994866
    Abstract: A photoelectric conversion device includes a counter circuit configured to count a first clock signal to output a count signal thereof, a second clock signal generation unit configured to generate a second clock signal based on the first clock signal, and a clock synchronization unit configured to output a count start signal in synchronization with the second clock signal, wherein the counter circuit performs a counting operation in response to the count start signal synchronized with the second clock signal.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: March 31, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kohichi Nakamura, Hiroki Hiyama, Tetsuya Itano, Kazuhiro Saito, Yu Maehashi, Koichiro Iwata
  • SOLID-STATE IMAGING APPARATUS AND IMAGING SYSTEM
    Publication number: 20150077607
    Abstract: A solid-state imaging apparatus includes a pixel section in which a plurality of pixels are arranged in a matrix, a column signal line configured to output a pixel signal from the pixel section, a column amplifier circuit configured to invert and amplify the pixel signal, a bypass circuit configured to bypass the column amplifier circuit, an AD converter, and a control unit configured to change an operation mode of the AD converter in accordance with the operation of the bypass circuit.
    Type: Application
    Filed: August 27, 2014
    Publication date: March 19, 2015
    Inventors: Kazuo Yamazaki, Tetsuya Itano, Hiroki Hiyama
  • Solid-state imaging device
    Patent number: 8963271
    Abstract: In a solid-state imaging device, a photoelectric conversion unit, a transfer transistor, and at least a part of electric charge holding unit, among pixel constituent elements, are disposed on a first semiconductor substrate. An amplifying transistor, a signal processing circuit other than a reset transistor, and a plurality of common output lines, to which signals are read out from a plurality of pixels, are disposed on a second semiconductor substrate.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: February 24, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuo Yamazaki, Tetsuya Itano, Nobuyuki Endo, Kyouhei Watanabe
  • PHOTOELECTRIC CONVERSION APPARATUS AND IMAGE PICKUP SYSTEM
    Publication number: 20150036032
    Abstract: Column signal processing units are provided in correspondence with respective columns of a pixel array. The column signal processing unit includes a sample-and-hold unit configured to hold an analog signal output from a pixel, a buffer unit configured to buffer the signal held in the sample-and-hold unit, and an AD conversion unit. The AD conversion unit converts the signal held by the sample-and-hold unit and buffered by the buffer unit into a digital signal.
    Type: Application
    Filed: July 30, 2014
    Publication date: February 5, 2015
    Inventors: Tetsuya Itano, Kazuo Yamazaki, Kohichi Nakamura, Koichiro Iwata, Yasuji Ikeda
  • SOLID-STATE IMAGE SENSOR AND IMAGING SYSTEM
    Publication number: 20150008494
    Abstract: At least one exemplary embodiment is directed to a solid state image sensor including at least one antireflective layer and/or non rectangular shaped wiring layer cross section to reduce dark currents and 1/f noise.
    Type: Application
    Filed: September 24, 2014
    Publication date: January 8, 2015
    Inventors: Toru Koizumi, Akira Okita, Tetsuya Itano, Sakae Hashimoto, Ryuichi Mishima
  • Solid-state imaging apparatus and method of driving the same
    Patent number: 8928786
    Abstract: A solid-state imaging apparatus includes: a plurality of pixels arranged in a matrix; a plurality of amplifier circuits each arranged correspondingly to each of columns of the pixels, for amplifying a signal from the pixel; and a current source transistor whose source is supplied with a power source voltage and which supplies the amplifier circuit with a bias current. When the current source transistor is operating in the saturation region, the gate voltage of the current source transistor that is supplied from the bias line is sampled and held. The gate voltage of the current source transistor with respect to the power source voltage is controlled to the sampled voltage, thereby suppressing variation. This suppression can, in turn, suppress occurrence of line noise and a lateral smear due to difference of drop in voltage of a power source line concerning a column circuit on each row.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: January 6, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koichiro Iwata, Hiroki Hiyama, Tetsuya Itano, Kohichi Nakamura, Kazuhiro Saito
  • Solid-state image pickup device and image pickup system
    Patent number: 8912578
    Abstract: The present invention relates to a solid-state image pickup device. The device includes a first substrate including a photoelectric conversion element and a transfer gate electrode configured to transfer charge from the photoelectric conversion element, a second substrate having a peripheral circuit portion including a circuit configured to read a signal based charge generated in the photoelectric conversion element, the first and second substrates being laminated. The device further includes a multilayer interconnect structure, disposed on the first substrate, including an aluminum interconnect and a multilayer interconnect structure, disposed on the second substrate, including a copper interconnect.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: December 16, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Nobuyuki Endo, Tetsuya Itano, Kazuo Yamazaki, Kyouhei Watanabe, Takeshi Ichikawa
  • Solid state image pickup device and camera
    Patent number: 8896029
    Abstract: A solid state image pickup device which can prevent color mixture by using a layout of a capacitor region provided separately from a floating diffusion region and a camera using such a device are provided. A photodiode region is a rectangular region including a photodiode. A capacitor region includes a carrier holding unit and is arranged on one side of the rectangle of the photodiode region as a region having a side longer than the one side. In a MOS unit region, an output unit region including an output unit having a side longer than the other side which crosses the one side of the rectangle of the photodiode region is arranged on the other side. A gate region and the FD region are arranged between the photodiode region and the capacitor region.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: November 25, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toru Koizumi, Akira Okita, Masanori Ogura, Shin Kikuchi, Tetsuya Itano
  • Solid-state image sensor and imaging system
    Patent number: 8878268
    Abstract: At least one exemplary embodiment is directed to a solid state image sensor including at least one antireflective layer and/or non rectangular shaped wiring layer cross section to reduce dark currents and 1/f noise.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: November 4, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toru Koizumi, Akira Okita, Tetsuya Itano, Sakae Hashimoto, Ryuichi Mishima
  • Solid-state imaging device and imaging system using buffered counter value of a counter
    Patent number: 8848079
    Abstract: A solid-state imaging device includes a plurality of pixels arranged in a matrix, a plurality of readout circuits provided in each column of the plurality of pixels arranged in a matrix, configured to read out for each column a signal of the plurality of pixels, a plurality of comparison units configured to compare a signal output from the plurality of readout circuits with a reference signal whose level changes with time, a counter configured to perform a count operation from when the level of the reference signal starts to change, first and second buffers each configured to buffer a count value of the counter, and a plurality of storing units connected to the plurality of comparison units, configured to store a count value of the counter when a magnitude relation between a signal output from the plurality of the readout circuits and the reference signal is inverted.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: September 30, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tetsuya Itano, Hiroki Hiyama, Kazuhiro Saito, Kohichi Nakamura, Koichiro Iwata, Takeshi Akiyama, Kazuo Yamazaki, Daisuke Yoshida
  • Solid-state imaging apparatus and method of driving the same
    Patent number: 8836838
    Abstract: A solid-state imaging apparatus includes a plurality of pixels arranged two-dimensionally in a matrix, a reference signal generating circuit adapted to generate a ramp signal, a counter circuit adapted to perform a counting operation according to output of the ramp signal, comparators arranged on a column by column basis and adapted to compare signals read out of the pixels with the ramp signal, and memories arranged on a column by column basis and adapted to store digital data, wherein if output of the comparator is not changed during an AD conversion period, digital data of a predetermined value is stored in the memory. The solid-state imaging apparatus implements overflow handling using a simplified circuit configuration.
    Type: Grant
    Filed: August 16, 2012
    Date of Patent: September 16, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kohichi Nakamura, Hiroki Hiyama, Tetsuya Itano, Kazuhiro Saito
  • Ramp signal output circuit, analog-to-digital conversion circuit, imaging device, method for driving ramp signal output circuit, method for driving analog-to-digital conversion circuit, and method for driving imaging device
    Patent number: 8760213
    Abstract: A circuit configured to output a ramp signal having a potential varying depending on time includes a voltage supply unit configured to supply a plurality of voltages having different amplitudes, a current supply unit, an integration circuit configured to output the ramp signal, and a capacitive element. The voltage supply unit is connected to one terminal of the capacitive element. The integration circuit and the current supply unit are connected to another terminal of the capacitive element.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: June 24, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuhiro Saito, Hiroki Hiyama, Tetsuya Itano, Kohichi Nakamura
  • Solid state image pickup device and camera which can prevent color mixture
    Patent number: 8749675
    Abstract: A solid state image pickup device which can prevent color mixture by using a layout of a capacitor region provided separately from a floating diffusion region and a camera using such a device are provided. A photodiode region is a rectangular region including a photodiode. A capacitor region includes a carrier holding unit and is arranged on one side of the rectangle of the photodiode region as a region having a side longer than the one side. In a MOS unit region, an output unit region including an output unit having a side longer than the other side which crosses the one side of the rectangle of the photodiode region is arranged on the other side. A gate region and the FD region are arranged between the photodiode region and the capacitor region.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: June 10, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toru Koizumi, Akira Okita, Masanori Ogura, Shin Kikuchi, Tetsuya Itano
  • Solid-state image pickup device and method for driving the same
    Patent number: 8736730
    Abstract: A solid-state image pickup device includes a plurality of common output lines receiving signals from a plurality of pixels, a plurality of column amplifier units amplifying the signals, a plurality of storage capacitors storing the amplified signals, a first transistor controlling electrical conduction between the output node of the column amplifier unit and the input node of a storage capacitor, a switch switching current for operating the column amplifier unit between a first current and a second current smaller than the first current, and a controller inhibiting, while the second current is flowing through the column amplifier unit, a potential at the output node of the column amplifier unit from approaching an off-state voltage supplied to a gate of the first transistor in an OFF state of the first transistor.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: May 27, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tomoyuki Noda, Tetsuya Itano
  • Solid-state imaging apparatus
    Patent number: 8723099
    Abstract: An imaging apparatus includes a plurality of unit pixels arranged in a matrix and configured to generate a signal by photoelectric conversion, a plurality of pixel output lines connected to each column of the unit pixels, a plurality of column amplifiers configured to amplify a signal of the pixel output lines, and a driving circuit configured to generate a control signal of the column amplifiers. Each of the column amplifiers includes first and second input terminals, an output terminal, an input capacitance between the first and second input terminals, and a first switch between the second input and output terminals. The driving circuit is configured to generate the control signal so as to make a period for switching the first switch from a conductive state to a non-conductive state longer than a period for switching the first switch from the non-conductive state to the conductive state.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: May 13, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tetsuya Itano, Hiroki Hiyama, Kazuhiro Saito, Kohichi Nakamura, Koichiro Iwata, Yu Maehashi, Takeshi Akiyama
  • Solid-state imaging apparatus
    Patent number: 8711259
    Abstract: A solid-state imaging apparatus includes: an amplifier circuit configured to amplify a signal from pixel; and a reference signal generating circuit configured to generate a ramp signal, wherein feedback capacitor elements having the same structure are electrically connected to a capacitive feedback type amplifier of the amplifier circuit and to a capacitive feedback type amplifier of the reference signal generating circuit respectively, and a connecting configuration between an amplifier of the amplifier circuit and the feedback capacitor element and a connecting configuration between an amplifier of the reference signal generating circuit and the feedback capacitor element are the same.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: April 29, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yu Maehashi, Hiroki Hiyama, Tetsuya Itano, Kazuhiro Saito, Kohichi Nakamura
  • Solid-state image pickup device and camera having arrayed pixels including amplifying units
    Patent number: 8698935
    Abstract: An solid state image pickup device including a plurality of photoelectric conversion regions (PD1, PD2) for generating carriers by photoelectric conversions to accumulate the generated carriers, an amplifying unit for amplifying the carriers, being commonly provided to at least two photoelectric conversion regions, a first and a second transfer units (Tx-MOS1, Tx-MOS2) for transferring the carriers accumulated in the first and the second photoelectric conversion regions, respectively, a first and a second carrier accumulating units (Cs1, Cs2) for accumulating the carriers flowing out from the first and the second photoelectric conversion regions through a first and a second fixed potential barriers, respectively, and a third and a fourth transfer units (Cs-MOS1, Cs-MOS2) for transferring the carriers accumulated in the first and the second carrier accumulating units to the amplifying unit, respectively.
    Type: Grant
    Filed: April 10, 2013
    Date of Patent: April 15, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Akira Okita, Toru Koizumi, Masanori Ogura, Shin Kikuchi, Tetsuya Itano
  • PHOTOELECTRIC CONVERSION DEVICE AND IMAGING SYSTEM
    Publication number: 20140098272
    Abstract: A photoelectric conversion device includes a plurality of pixels arranged in a plurality of columns, a plurality of comparators provided correspondingly to the respective columns, a reference signal generation unit configured to supply a reference signal to the plurality of comparators, a counter configured to generate a count signal that includes a plurality of bits in synchronization with a first clock signal, a synchronization unit configured to synchronize the plurality of bits with a second clock signal to generate a synchronized count signal and to output the generated synchronized count signal, and a plurality of memories provided correspondingly to the respective comparators, the memories each being configured to store the synchronized count signal in response to a change in an output of a corresponding one of the comparators.
    Type: Application
    Filed: October 1, 2013
    Publication date: April 10, 2014
    Inventors: Kohichi Nakamura, Koichiro Iwata, Kazuhiro Saito, Takeshi Akiyama, Tetsuya Itano, Hiroki Hiyama, Takashi Muto
  • Solid-state imaging apparatus, A/D converter, and control method thereof
    Patent number: 8692920
    Abstract: In an A/D converter, a first analog signal which is input to an input terminal in a state in which the input terminal and a reference voltage line are connected via a first capacitor is converted into digital data when a reference signal is supplied to the reference signal line in a state in which the reference signal line and a first input terminal of a comparator are connected via the first capacitor. A second analog signal which is input to the input terminal in a state in which the input terminal and the reference voltage line are connected via a second capacitor is converted into digital data when the reference signal is supplied to the reference signal line in a state in which the reference signal line and the first input terminal of the comparator are connected via the second capacitor.
    Type: Grant
    Filed: August 9, 2012
    Date of Patent: April 8, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroki Hiyama, Kohichi Nakamura, Kazuhiro Saito, Tetsuya Itano